- 22 Mar, 2021 11 commits
-
-
Qi Zhang authored
Add new FDIR filter type to forward GTPU packets by matching TEID or QFI. The filter is only enabled when COMMS DDP package is downloaded. Signed-off-by: Yahui Cao <yahui.cao@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Tested-by: Chen Bo <BoX.C.Chen@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
-
Qi Zhang authored
Add new filter type that allow forward non-IP Ethernet packets base on its ethertype. The filter is only enabled when COMMS DDP package is loaded. Signed-off-by: Yahui Cao <yahui.cao@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Tested-by: Chen Bo <BoX.C.Chen@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
-
Qi Zhang authored
Add two new actions support for VF FDIR: A passthrough action does not specify the destination queue, but just allow the packet go to next pipeline stage, a typical use cases is combined with a software mark (FDID) action. Allow specify a 2^n continuous queues as the destination of a FDIR rule. Packet distribution is based on current RSS configure. Signed-off-by: Yahui Cao <yahui.cao@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Tested-by: Chen Bo <BoX.C.Chen@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
-
Qi Zhang authored
Add basic FDIR flow list and pattern / action parse functions for VF. Signed-off-by: Yahui Cao <yahui.cao@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Tested-by: Chen Bo <BoX.C.Chen@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
-
Qi Zhang authored
The virtual channel is going to be extended to support FDIR and RSS configure from AVF. New data structures and OP codes will be added, the patch enable the FDIR part. To support above advanced AVF feature, we need to figure out what kind of data structure should be passed from VF to PF to describe an FDIR rule or RSS config rule. The common part of the requirement is we need a data structure to represent the input set selection of a rule's hash key. An input set selection is a group of fields be selected from one or more network protocol layers that could be identified as a specific flow. For example, select dst IP address from an IPv4 header combined with dst port from the TCP header as the input set for an IPv4/TCP flow. The patch adds a new data structure virtchnl_proto_hdrs to abstract a network protocol headers group which is composed of layers of network protocol header(virtchnl_proto_hdr). A protocol header contains a 32 bits mask (field_selector) to describe which fields are selected as input sets, as well as a header type (enum virtchnl_proto_hdr_type). Each bit is mapped to a field in enum virtchnl_proto_hdr_field guided by its header type. +------------+-----------+------------------------------+ | | Proto Hdr | Header Type A | | | +------------------------------+ | | | BIT 31 | ... | BIT 1 | BIT 0 | | |-----------+------------------------------+ |Proto Hdrs | Proto Hdr | Header Type B | | | +------------------------------+ | | | BIT 31 | ... | BIT 1 | BIT 0 | | |-----------+------------------------------+ | | Proto Hdr | Header Type C | | | +------------------------------+ | | | BIT 31 | ... | BIT 1 | BIT 0 | | |-----------+------------------------------+ | | .... | +-------------------------------------------------------+ All fields in enum virtchnl_proto_hdr_fields are grouped with header type and the value of the first field of a header type is always 32 aligned. enum proto_hdr_type { header_type_A = 0; header_type_B = 1; .... } enum proto_hdr_field { /* header type A */ header_A_field_0 = 0, header_A_field_1 = 1, header_A_field_2 = 2, header_A_field_3 = 3, /* header type B */ header_B_field_0 = 32, // = header_type_B << 5 header_B_field_0 = 33, header_B_field_0 = 34 header_B_field_0 = 35, .... }; So we have: proto_hdr_type = proto_hdr_field / 32 bit offset = proto_hdr_field % 32 To simply the protocol header's operations, couple help macros are added. For example, to select src IP and dst port as input set for an IPv4/UDP flow. we have: struct virtchnl_proto_hdr hdr[2]; VIRTCHNL_SET_PROTO_HDR_TYPE(&hdr[0], IPV4) VIRTCHNL_ADD_PROTO_HDR_FIELD(&hdr[0], IPV4, SRC) VIRTCHNL_SET_PROTO_HDR_TYPE(&hdr[1], UDP) VIRTCHNL_ADD_PROTO_HDR_FIELD(&hdr[1], UDP, DST) The byte array is used to store the protocol header of a training package. The byte array must be network order. The patch added virtual channel support for iAVF FDIR add/validate/delete filter. iAVF FDIR is Flow Director for Intel Adaptive Virtual Function which can direct Ethernet packets to the queues of the Network Interface Card. Add/delete command is adding or deleting one rule for each virtual channel message, while validate command is just verifying if this rule is valid without any other operations. To add or delete one rule, driver needs to config TCAM and Profile, build training packets which contains the input set value, and send the training packets through FDIR Tx queue. In addition, driver needs to manage the software context to avoid adding duplicated rules, deleting non-existent rule, input set conflicts and other invalid cases. NOTE: Supported pattern/actions and their parse functions are not be included in this patch, they will be added in a separate one. Signed-off-by: Jeff Guo <jia.guo@intel.com> Signed-off-by: Yahui Cao <yahui.cao@intel.com> Signed-off-by: Simei Su <simei.su@intel.com> Signed-off-by: Beilei Xing <beilei.xing@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Tested-by: Chen Bo <BoX.C.Chen@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
-
Qi Zhang authored
We are going to enable FDIR configure for AVF through virtual channel. The first step is to add helper functions to support control VSI setup. A control VSI will be allocated for a VF when AVF creates its first FDIR rule through ice_vf_ctrl_vsi_setup(). The patch will also allocate FDIR rule space for VF's control VSI. If a VF asks for flow director rules, then those should come entirely from the best effort pool and not from the guaranteed pool. The patch allow a VF VSI to have only space in the best effort rules. Signed-off-by: Xiaoyun Li <xiaoyun.li@intel.com> Signed-off-by: Yahui Cao <yahui.cao@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Tested-by: Chen Bo <BoX.C.Chen@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
-
Qi Zhang authored
Separate IPv4 and IPv6 ptype bit mask table into 2 tables: with or without L4 protocols. When a flow filter without any l4 type is specified, the ICE_FLOW_SEG_HDR_IPV_OTHER flag can be used to describe if user want to create a IP rule target for all IP packet or just IP packet without l4 header. Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Tested-by: Chen Bo <BoX.C.Chen@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
-
Qi Zhang authored
To apply different input set for GTP-U packet with or without extend header as well as GTP-U uplink and downlink, we need to add TCAM mask matching capability. This allows comprehending different PTYPE attributes by examining flags from the parser. Using this method, different profiles can be used by examining flag values from the parser. Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Tested-by: Chen Bo <BoX.C.Chen@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
-
Qi Zhang authored
Add more protocol support in flow filter, these include PPPoE, L2TPv3, GTP, PFCP, ESP and AH. Signed-off-by: Ting Xu <ting.xu@intel.com> Signed-off-by: Yahui Cao <yahui.cao@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Tested-by: Chen Bo <BoX.C.Chen@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
-
Qi Zhang authored
To support FDIR input set with protocol field like DSCP, TTL, PROT, etc. which is not word aligned, we need to enable field vector masking. Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Tested-by: Chen Bo <BoX.C.Chen@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
-
Qi Zhang authored
Add more protocol and field support for flow filter include: ETH, VLAN, ICMP, ARP and TCP flag. Signed-off-by: Kevin Scott <kevin.c.scott@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Tested-by: Chen Bo <BoX.C.Chen@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
-
- 21 Mar, 2021 9 commits
-
-
Vladimir Oltean authored
This reverts commit e9bf9694. The topic of the reverted patch is the support for switches with global VLAN filtering, added by commit 061f6a50 ("net: dsa: Add ndo_vlan_rx_{add, kill}_vid implementation"). Be there a switch with 4 ports swp0 -> swp3, and the following setup: ip link add br0 type bridge vlan_filtering 1 ip link set swp0 master br0 ip link set swp1 master br0 What would happen with VLAN-tagged traffic received on standalone ports swp2 and swp3? Well, it would get dropped, were it not for the .ndo_vlan_rx_add_vid and .ndo_vlan_rx_kill_vid implementations (called from vlan_vid_add and vlan_vid_del respectively). Basically, for DSA switches where VLAN filtering is a global attribute, we enforce the standalone ports to have 'rx-vlan-filter: off [fixed]' in their ethtool features, which lets the user know that all VLAN-tagged packets that are not explicitly added in the RX filtering list are dropped. As for the sja1105 driver, at the time of the reverted patch, it was operating in a pretty handicapped mode when it had ports under a bridge with vlan_filtering=1. Specifically, it was unable to terminate traffic through the CPU port (for further explanation see "Traffic support" in Documentation/networking/dsa/sja1105.rst). However, since then, the sja1105 driver has made considerable progress, and that limitation is no longer as severe now. Specifically, since commit 2cafa72e ("net: dsa: sja1105: add a new best_effort_vlan_filtering devlink parameter"), the driver is able to perform CPU termination even when some ports are under bridges with vlan_filtering=1. Then, since commit 8841f6e6 ("net: dsa: sja1105: make devlink property best_effort_vlan_filtering true by default"), this even became the default operating mode. So we can now take advantage of the logic in the DSA core. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-
Heiner Kallweit authored
Add support for the ethtool get_ringparam operation. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-
David S. Miller authored
Alex Elder says: ==================== net: ipa: more configuration data updates This series starts with two patches that should have been included in an earlier series. With these in place, QSB settings are programmed from information found in the data files rather than being embedded in code. Support is then added for reprenting another QSB property (supported for IPA v4.0+). The third patch updates the definition of the sequencer type used for an endpoint. Previously a set of 2-byte symbols with fairly long names defined the sequencer type, but now those are broken into 1-byte halves whose names are a little more informative. The fourth patch moves the sequencer type definition so it only applies to TX endpoints (they aren't valid for RX endpoints). And the last makes some minor documentation updates. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
-
Alex Elder authored
Fix/expand some comments in "ipa_data.h". Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
-
Alex Elder authored
We only program the sequencer type for TX endpoints. So move the definition of the sequencer type fields into the TX-specific portion of the endpoint configuration data. There's no need to maintain this in the IPA structure; we can extract it from the configuration data it points to in the one spot it's needed. We previously specified the sequencer type for RX endpoints with INVALID values. These are no longer needed, so get rid of them. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
-
Alex Elder authored
An IPA endpoint has a sequencer that must be configured based on how the endpoint is to be used. Currently the IPA code programs the sequencer type by splitting a value into four 4-bit nibbles. Doing that doesn't really add much value, and regardless, a better way of splitting the sequencer type is into two halves--the lower byte describing how normal packet processing is handled, and the next byte describing information about processing replicas. So split the sequencer type into two sub-parts: the sequencer type and the replication sequencer type. Define the values supported for the "main" sequencer type, and define the values supported for the replication part separately. In addition, the sequencer type names are quite verbose, encoding what the type includes, but also what it *excludes*. Rename the sequencer types in a way that mainly describes the number of passes that a packet takes through the IPA processing pipeline, and how many of those passes end by supplying the processed packet to the microprocessor. The result expands the supported types beyond what is required for now, but simplifies the way these are defined. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
-
Alex Elder authored
Starting with IPA v4.0, a limit is placed on the number of bytes outstanding in a transaction, to reduce latency. The limit is imposed only if this value is non-zero. We don't use a non-zero value for SC7180, but newer versions of IPA do. Prepare for that by allowing a programmed value to be specified in the platform configuration data. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
-
Alex Elder authored
Use the QSB configuration data in ipa_hardware_config_qsb(), rather than determining in code what values to use based on IPA version. Pass configuration data to ipa_hardware_config() so it can be passed to ipa_hardware_config_qsb(). Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
-
Sai Kalyaan Palla authored
Made changes to coding style as suggested by checkpatch.pl changes are of the type: open brace '{' following struct go on the same line do not use assignment in if condition Signed-off-by: Sai Kalyaan Palla <saikalyaan63@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-
- 19 Mar, 2021 20 commits
-
-
git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queueDavid S. Miller authored
Tony Nguyen says: ==================== 1GbE Intel Wired LAN Driver Updates 2021-03-19 This series contains updates to igc and e1000e drivers. Sasha removes unused defines in igc driver. Jiapeng Zhong changes bool assignments from 0/1 to false/true for igc. Wei Yongjun marks e1000e_pm_prepare() as __maybe_unused to resolve a defined but not used warning under certain configurations. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
-
Wei Yongjun authored
The function e1000e_pm_prepare() may have no callers depending on configuration, so it must be marked __maybe_unused to avoid harmless warning: drivers/net/ethernet/intel/e1000e/netdev.c:6926:12: warning: 'e1000e_pm_prepare' defined but not used [-Wunused-function] 6926 | static int e1000e_pm_prepare(struct device *dev) | ^~~~~~~~~~~~~~~~~ Fixes: ccf8b940 ("e1000e: Leverage direct_complete to speed up s2ram") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
-
Jiapeng Zhong authored
Fix the following coccicheck warnings: ./drivers/net/ethernet/intel/igc/igc_main.c:4961:2-14: WARNING: Assignment of 0/1 to bool variable. ./drivers/net/ethernet/intel/igc/igc_main.c:4955:2-14: WARNING: Assignment of 0/1 to bool variable. ./drivers/net/ethernet/intel/igc/igc_main.c:4933:1-13: WARNING: Assignment of 0/1 to bool variable. ./drivers/net/ethernet/intel/igc/igc_main.c:4592:1-24: WARNING: Assignment of 0/1 to bool variable. ./drivers/net/ethernet/intel/igc/igc_main.c:4438:2-25: WARNING: Assignment of 0/1 to bool variable. ./drivers/net/ethernet/intel/igc/igc_main.c:4396:2-25: WARNING: Assignment of 0/1 to bool variable. ./drivers/net/ethernet/intel/igc/igc_main.c:4018:2-25: WARNING: Assignment of 0/1 to bool variable. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Jiapeng Zhong <abaci-bugfix@linux.alibaba.com> Tested-by: Dvora Fuxbrumer <dvorax.fuxbrumer@linux.intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
-
Sasha Neftin authored
MII_CR_LOOPBACK masks not in use in i225 device and can be removed. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Dvora Fuxbrumer <dvorax.fuxbrumer@linux.intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
-
Sasha Neftin authored
Force PHY speed not supported for i225 devices. MII_CR_SPEED masks not in use in i225 device and can be removed. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Dvora Fuxbrumer <dvorax.fuxbrumer@linux.intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
-
Eric Dumazet authored
I was working on a syzbot issue, claiming one device could not be dismantled because its refcount was -1 unregister_netdevice: waiting for sit0 to become free. Usage count = -1 It would be nice if syzbot could trigger a warning at the time this reference count became negative. This patch adds CONFIG_PCPU_DEV_REFCNT options which defaults to per cpu variables (as before this patch) on SMP builds. v2: free_dev label in alloc_netdev_mqs() is moved to avoid a compiler warning (-Wunused-label), as reported by kernel test robot <lkp@intel.com> Signed-off-by: Eric Dumazet <edumazet@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-
David S. Miller authored
Alex Elder says: ==================== net: ipa: update configuration data Each IPA version has a "data" file defining how various things are configured. This series gathers a few updates to this information: - The first patch makes all configuration data constant - The second fixes an incorrect (but seemingly harmless) value - The third simplifies things a bit by using implicit zero initialization for memory regions that are empty - The fourth adds definitions for memory regions that exist but are not yet used - The fifth use configuration data rather than conditional code to set some bus parameters ====================
-
Alex Elder authored
Define the maximum number of reads and writes to configure for the QSB masters used for IPA in configuration data. We don't use these values yet; the next commit takes care of that. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
-
Alex Elder authored
There are several memory regions that are defined starting with IPA v4.0, but which were not used for the SC7180 SoC (IPA v4.2). Even though they're not used (yet), define them so they are ready to be used for SoCs when they become supported. There are two QUOTA statistics memory regions, one for the modem and one for the AP. Define distinct names for these regions, and get rid of the definition of IPA_MEM_STATS_QUOTA. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
-
Alex Elder authored
The AP_HEADER memory region for both the SDM845 and SC7180 SoCs has zero size, and has no canaries. Defining an offset for such a zero-length region is not meaningful, so it's better not to define it at all. The size of this region is used in the code, but its value will still be zero because the memory regions are defined in statically initialized memory. For the SC7180, the STATS_DROP memory region has a zero size and no canaries as well. These regions are the only place where a zero-sized region is defined despite having no canaries. Remove them. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
-
Alex Elder authored
There should be no canary values written before the beginning of the UC_INFO memory region. This was correct for SDM845, but somehow was committed with the wrong value for SC7180. This bug seems to cause no harm, so we'll just correct it without back-porting. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
-
Alex Elder authored
All of the platform configuration data should be constant, but that isn't the case for the memory regions, interconnects, and clocks. Fix this. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
-
Sasha Neftin authored
MII_CR_RESET mask not in use in i225 device and can be removed Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Dvora Fuxbrumer <dvorax.fuxbrumer@linux.intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
-
David S. Miller authored
Bjarni Jonasson says: ==================== Fixes applied to VCS8584 family Three different fixes applied to VSC8584 family: 1. LCPLL reset 2. Serdes calibration 3. Coma mode disabled The same fixes has already been applied to VSC8514 and most of the functionality can be reused for the VSC8584. v1 -> v2: Preserved reversed christmas tree ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
-
Bjarni Jonasson authored
This patch releases coma mode for VSC8584 as done for VSC8514 in commit ca0d7fd0 ("net: phy: mscc: coma mode disabled for VSC8514") Fixes: a5afc167 ("net: phy: mscc: add support for VSC8584 PHY.") Signed-off-by: Bjarni Jonasson <bjarni.jonasson@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-
Bjarni Jonasson authored
Introduced 'FOJI' serdes calibration in commit 85e97f0b ("net: phy: mscc: improved serdes calibration applied to VSC8514") Now including the VSC8584 family. Fixes: a5afc167 ("net: phy: mscc: add support for VSC8584 PHY.") Signed-off-by: Bjarni Jonasson <bjarni.jonasson@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-
Bjarni Jonasson authored
Introduced LCPLL reset in commit d15e08d9fb82 ("net: phy: mscc: adding LCPLL reset to VSC8514"). Now applying this reset to the VSC8584 phy familiy. Fixes: a5afc167 ("net: phy: mscc: add support for VSC8584 PHY.") Signed-off-by: Bjarni Jonasson <bjarni.jonasson@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-
Vladimir Oltean authored
Michael reports that after the blamed patch, unbinding a VF would cause these transactions to remain pending, and trigger some warnings with the DMA API debug: $ echo 1 > /sys/bus/pci/devices/0000\:00\:00.0/sriov_numvfs pci 0000:00:01.0: [1957:ef00] type 00 class 0x020001 fsl_enetc_vf 0000:00:01.0: Adding to iommu group 19 fsl_enetc_vf 0000:00:01.0: enabling device (0000 -> 0002) fsl_enetc_vf 0000:00:01.0 eno0vf0: renamed from eth0 $ echo 0 > /sys/bus/pci/devices/0000\:00\:00.0/sriov_numvfs DMA-API: pci 0000:00:01.0: device driver has pending DMA allocations while released from device [count=1] One of leaked entries details: [size=2048 bytes] [mapped with DMA_BIDIRECTIONAL] [mapped as coherent] WARNING: CPU: 0 PID: 2547 at kernel/dma/debug.c:853 dma_debug_device_change+0x174/0x1c8 (...) Call trace: dma_debug_device_change+0x174/0x1c8 blocking_notifier_call_chain+0x74/0xa8 device_release_driver_internal+0x18c/0x1f0 device_release_driver+0x20/0x30 pci_stop_bus_device+0x8c/0xe8 pci_stop_and_remove_bus_device+0x20/0x38 pci_iov_remove_virtfn+0xb8/0x128 sriov_disable+0x3c/0x110 pci_disable_sriov+0x24/0x30 enetc_sriov_configure+0x4c/0x108 sriov_numvfs_store+0x11c/0x198 (...) DMA-API: Mapped at: dma_entry_alloc+0xa4/0x130 debug_dma_alloc_coherent+0xbc/0x138 dma_alloc_attrs+0xa4/0x108 enetc_setup_cbdr+0x4c/0x1d0 enetc_vf_probe+0x11c/0x250 pci 0000:00:01.0: Removing from iommu group 19 This happens because stupid me moved enetc_teardown_cbdr outside of enetc_free_si_resources, but did not bother to keep calling enetc_teardown_cbdr from all the places where enetc_free_si_resources was called. In particular, now it is no longer called from the main unbind function, just from the probe error path. Fixes: 4b47c0b8 ("net: enetc: don't initialize unused ports from a separate code path") Reported-by: Michael Walle <michael@walle.cc> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Tested-by: Michael Walle <michael@walle.cc> Signed-off-by: David S. Miller <davem@davemloft.net>
-
Colin Ian King authored
There is a spelling mistake in an error message. Fix it. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-
Wei Yongjun authored
The driver allocates the spinlock but not initialize it. Use spin_lock_init() on it to initialize it correctly. Fixes: d8ce30e0 ("octeontx2-pf: add tc flower stats handler for hw offloads") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-