- 13 Feb, 2021 9 commits
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Thomas Bogendoerfer authored
protected_cache_op is only used for flushing user addresses, so we only need to define protected_cache_op different in EVA mode and be done with it. Signed-off-by:Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Thomas Bogendoerfer authored
This reverts commit 6ebda44f. All icache flushes in this code paths are done via flush_icache_range(), which only uses normal cache instruction. And this is the correct thing for EVA mode, too. So no need to do set_fs(KERNEL_DS) here. Signed-off-by:
Christoph Hellwig <hch@lst.de>
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Christoph Hellwig authored
Just select DMA_NONCOHERENT and ARCH_HAS_SETUP_DMA_OPS from the MIPS_GENERIC platform instead. Signed-off-by:
Huacai Chen <chenhuacai@kernel.org> Signed-off-by:
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Christoph Hellwig authored
CONFIG_DMA_MAYBE_COHERENT just guards two early init options now. Just enable them unconditionally for CONFIG_DMA_NONCOHERENT. Signed-off-by:
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Christoph Hellwig authored
Lift the dma_default_coherent variable from the mips architecture code to the driver core. This allows an architecture to sdefault all device to be DMA coherent at run time, even if the kernel is build with support for DMA noncoherent device. By allowing device_initialize to set the ->dma_coherent field to this default the amount of arch hooks required for this behavior can be greatly reduced. Signed-off-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by:
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Christoph Hellwig authored
Replace the global coherentio enum, and the hw_coherentio (fake) boolean variables with a single boolean dma_default_coherent flag. Signed-off-by:
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Christoph Hellwig authored
Factor out a alchemy_dma_coherent helper that determines if the platform is DMA coherent. Also stop initializing the hw_coherentio variable, given that is only ever set to a non-zero value by the malta setup code. Signed-off-by:
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Christoph Hellwig authored
Given that plat_mem_setup runs before earlyparams are handled and malta selects CONFIG_DMA_MAYBE_COHERENT, coherentio can only be set to IO_COHERENCE_DEFAULT at this point. So remove the checking for other options and merge plat_enable_iocoherency into plat_setup_iocoherency to simplify the code a bit. Signed-off-by:
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Tiezhu Yang authored
In the current code, arch_has_single_step() is not defined on MIPS, that means MIPS does not support instruction single-step for user mode. Delve is a debugger for the Go programming language, the ptrace syscall PtraceSingleStep() failed [1] on MIPS and then the single step function can not work well, we can see that PtraceSingleStep() definition returns ptrace(PTRACE_SINGLESTEP) [2]. So it is necessary to support ptrace single step on MIPS. At the beginning, we try to use the Debug Single Step exception on the Loongson 3A4000 platform, but it has no effect when set CP0_DEBUG SSt bit, this is because CP0_DEBUG NoSSt bit is 1 which indicates no single-step feature available [3], so this way which is dependent on the hardware is almost impossible. With further research, we find out there exists a common way used with break instruction in arch/alpha/kernel/ptrace.c, it is workable. For the above analysis, define arch_has_single_step(), add the common function user_enable_single_step() and user_disable_single_step(), set flag TIF_SINGLESTEP for child process, use break instruction to set breakpoint. We can use the following testcase to test it: tools/testing/selftests/breakpoints/step_after_suspend_test.c $ make -C tools/testing/selftests TARGETS=breakpoints $ cd tools/testing/selftests/breakpoints Without this patch: $ ./step_after_suspend_test -n TAP version 13 1..4 # ptrace(PTRACE_SINGLESTEP) not supported on this architecture: Input/output error ok 1 # SKIP CPU 0 # ptrace(PTRACE_SINGLESTEP) not supported on this architecture: Input/output error ok 2 # SKIP CPU 1 # ptrace(PTRACE_SINGLESTEP) not supported on this architecture: Input/output error ok 3 # SKIP CPU 2 # ptrace(PTRACE_SINGLESTEP) not supported on this architecture: Input/output error ok 4 # SKIP CPU 3 # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:4 error:0 With this patch: $ ./step_after_suspend_test -n TAP version 13 1..4 ok 1 CPU 0 ok 2 CPU 1 ok 3 CPU 2 ok 4 CPU 3 # Totals: pass:4 fail:0 xfail:0 xpass:0 skip:0 error:0 [1] https://github.com/go-delve/delve/blob/master/pkg/proc/native/threads_linux.go#L50 [2] https://github.com/go-delve/delve/blob/master/vendor/golang.org/x/sys/unix/syscall_linux.go#L1573 [3] http://www.t-es-t.hu/download/mips/md00047f.pdfReported-by:
Guoqi Chen <chenguoqi@loongson.cn> Signed-off-by:
Xingxing Su <suxingxing@loongson.cn> Signed-off-by:
Tiezhu Yang <yangtiezhu@loongson.cn> Reported-by:
kernel test robot <lkp@intel.com> Signed-off-by:
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- 11 Feb, 2021 3 commits
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Lukas Bulwahn authored
Commit ffe1f935 ("MAINTAINERS: Add Loongson-2/Loongson-3 maintainers") adds quite generic file entries for drivers/*/*loongson{2,3}* and drivers/*/*/*loongson{2,3}* to be informed on changes to all loongson{2,3} files in drivers. However, only the pattern 'drivers/*/*loongson2*' matches to one file in the repository, i.e., drivers/cpufreq/loongson2_cpufreq.c; all other patterns have no file matches. Hence, ./scripts/get_maintainer.pl --self-test=patterns complains: warning: no file matches F: drivers/*/*/*loongson2* warning: no file matches F: drivers/*/*/*loongson3* warning: no file matches F: drivers/*/*loongson3* As in the last two and half years, no further files and drivers have showed up to match those patterns, just name the one file that matches explicitly and delete the others without a match. Signed-off-by:
Lukas Bulwahn <lukas.bulwahn@gmail.com> Signed-off-by:
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Tiezhu Yang authored
According to MIPS EJTAG Specification [1], a Debug Breakpoint exception occurs when an SDBBP instruction is executed, the CP0_DEBUG bit DBp indicates that a Debug Breakpoint exception occurred. When I read the original code, it looks a little confusing at first glance, just check bit DBp for SDBBP to make the code more readable, it will be much easier to understand. [1] http://www.t-es-t.hu/download/mips/md00047f.pdfSigned-off-by:
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Kees Cook authored
As started by commit 05a5f51c ("Documentation: Replace lkml.org links with lore"), replace lkml.org links with lore to better use a single source that's more likely to stay available long-term. Signed-off-by:
Kees Cook <keescook@chromium.org> Signed-off-by:
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- 09 Feb, 2021 7 commits
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Thomas Bogendoerfer authored
This reverts commit 9308579f. Signed-off-by:
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Youling Tang authored
Replace kmap_atomic_pfn() with kmap_local_pfn() which is preemptible and can take page faults. Remove the indirection of the dump page and the related cruft which is not longer required. Remove unused or redundant header files. Signed-off-by:
Youling Tang <tangyouling@loongson.cn> Signed-off-by:
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Serge Semin authored
This reverts commit 3751cbda. Originally the patch was created to fix the reserved-memory DT-node parsing failure on the early stages of the platform memory initialization. That happened due to the two early memory allocators utilization that time: bootmem and memblock. At first the platform-specific memory mapping array was initialized. Then the early_init_fdt_scan_reserved_mem() was called, which couldn't fully parse the "reserved-memory" DT-node since neither memblock nor bootmem allocators hadn't been initialized at that stage, so the fdt_init_reserved_mem() method failed on the memory allocation calls. Only after that the platform-specific memory mapping were used to create proper bootmem and memblock structures and let the early memory allocations work. That's why we had to call the fdt_init_reserved_mem() method one more time to retry the initialization of the features like CMA. The necessity to have that fix was disappeared after the full memblock support had been added to the MIPS kernel and all plat_mem_setup() had been fixed to add the memory regions right into the memblock memory pool. Let's revert that patch then especially after having Paul reported that the second fdt_init_reserved_mem() call causes the reserved memory pool being created twice bigger than implied. Fixes: a94e4f24 ("MIPS: init: Drop boot_mem_map") Reported-by:
Paul Cercueil <paul@crapouillou.net> Signed-off-by:
Serge Semin <Sergey.Semin@baikalelectronics.ru> Signed-off-by:
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Jinyang He authored
unwind_stack_by_address and unwind_stack need <asm/stacktrace.h>. arch_align_stack needs <asm/exec.h> link: https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org/thread/ZPL2RRA6RZKRQZI5IGOVLFXN2GVZBN3L/Reported-by:
Jinyang He <hejinyang@loongson.cn> Signed-off-by:
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Alexander Lobakin authored
Commit 1e35918a ("MIPS: Enable Undefined Behavior Sanitizer UBSAN") added a possibility to build the entire kernel with UBSAN instrumentation for MIPS, with the exception for VDSO. However, self-extracting head wasn't been added to exceptions, so this occurs: mips-alpine-linux-musl-ld: arch/mips/boot/compressed/decompress.o: in function `FSE_buildDTable_wksp': decompress.c:(.text.FSE_buildDTable_wksp+0x278): undefined reference to `__ubsan_handle_shift_out_of_bounds' mips-alpine-linux-musl-ld: decompress.c:(.text.FSE_buildDTable_wksp+0x2a8): undefined reference to `__ubsan_handle_shift_out_of_bounds' mips-alpine-linux-musl-ld: decompress.c:(.text.FSE_buildDTable_wksp+0x2c4): undefined reference to `__ubsan_handle_shift_out_of_bounds' mips-alpine-linux-musl-ld: arch/mips/boot/compressed/decompress.o: decompress.c:(.text.FSE_buildDTable_raw+0x9c): more undefined references to `__ubsan_handle_shift_out_of_bounds' follow Add UBSAN_SANITIZE := n to mips/boot/compressed/Makefile to exclude it from instrumentation scope and fix this issue. Fixes: 1e35918a ("MIPS: Enable Undefined Behavior Sanitizer UBSAN") Cc: stable@vger.kernel.org # 5.0+ Signed-off-by:
Alexander Lobakin <alobakin@pm.me> Signed-off-by:
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Jinyang He authored
The type of the VMLINUX_LOAD_ADDRESS macro is the (unsigned long long) in 32bits kernel but (unsigned long) in the 64-bit kernel. Although there is no error here, avoid using it to calculate kaslr_offset. Signed-off-by:
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Jinyang He authored
Provide kaslr_offset() to get the kernel offset when KASLR is enabled. Error may occur before update_kaslr_offset(), so put it at the end of the offset branch. Fixes: a307a4ce ("MIPS: Loongson64: Add KASLR support") Reported-by:
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- 04 Feb, 2021 9 commits
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Tiezhu Yang authored
Add perf_event_mips_regs/perf_reg_value/perf_reg_validate to support features HAVE_PERF_REGS/HAVE_PERF_USER_STACK_DUMP in kernel. [ayan@wavecomp.com: Repick this patch for unwinding userstack backtrace by perf and libunwind on MIPS based CPU.] [ralf@linux-mips.org: Add perf_get_regs_user() which is required after 'commit 88a7c26a ("perf: Move task_pt_regs sampling into arch code")'.] [yangtiezhu@loongson.cn: Fix build error about perf_get_regs_user() after commit 76a4efa8 ("perf/arch: Remove perf_sample_data::regs_user_copy"), and also separate the original patches into two parts (MIPS kernel and perf tools) to merge easily.] The original patches: https://lore.kernel.org/patchwork/patch/1126521/ https://lore.kernel.org/patchwork/patch/1126520/Signed-off-by:
David Daney <david.daney@cavium.com> Signed-off-by:
Ralf Baechle <ralf@linux-mips.org> Signed-off-by:
Archer Yan <ayan@wavecomp.com> Signed-off-by:
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Alexander Lobakin authored
Since commit 02bd530f ("MIPS: generic: Increase NR_IRQS to 256") include/asm/mach-pistachio/irq.h just does nothing. Remove the file along with mach-pistachio folder and include compiler directive. Signed-off-by:
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Bert Vermeulen authored
Signed-off-by:
Bert Vermeulen <bert@biot.com> Signed-off-by:
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Bert Vermeulen authored
Signed-off-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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Bert Vermeulen authored
This is just enough system to boot the kernel with earlycon working. Signed-off-by:
Sander Vanheule <sander@svanheule.net> Signed-off-by:
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Bert Vermeulen authored
The RTL838x/839x family of SoCs are Realtek switches with an embedded MIPS core. * RTL838x - 500MHz 4kce single core - 1Gbit ports and L2 features * RTL839x - 700MHz 34Kc single core - 1Gbit ports and L2 features These switches, depending on the exact part number, will have anywhere between 8 and 52 ports. The MIPS core is wired to a switch cpu port which has a tagging feature allowing us to make use of the DSA subsystem. The SoCs are somewhat basic in certain areas, getting better with more advanced features on newer series. The switch functionality is MMIO-mapped via a large MFD region. The SoCs have the following peripherals * ethernet * switch * uart - ns16550a * spi-flash interface * gpio * wdt * led The code was derived from various vendor SDKs based on Linux v2.6 kernels. This patchset allows us to boot RTL838x/RTL839x units with basic support. Most of the other drivers are already written and functional, and work to get them upstream is already in progress. Signed-off-by:
Birger Koblitz <mail@birger-koblitz.de> Signed-off-by:
John Crispin <john@phrozen.org> Signed-off-by:
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Bert Vermeulen authored
Signed-off-by:
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Sander Vanheule authored
Reset lines with indices smaller than 8 are currently considered invalid by the rt2880-reset reset controller. The MT7621 SoC uses a number of these low reset lines. The DTS defines reset lines "hsdma", "fe", and "mcm" with respective values 5, 6, and 2. As a result of the above restriction, these resets cannot be asserted or de-asserted by the reset controller. In cases where the bootloader does not de-assert these lines, this results in e.g. the MT7621's internal switch staying in reset. Change the reset controller to only ignore the system reset, so all reset lines with index greater than 0 are considered valid. Signed-off-by:
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Thomas Bogendoerfer authored
Selection of the DTB to be used was burried in more or less readable code in head.S. Move this code into a inline helper function and use it. Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com>
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- 03 Feb, 2021 4 commits
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Bhaskar Chowdhury authored
s/logcal/logical/ s/intercpu/inter-CPU/ Signed-off-by:
Bhaskar Chowdhury <unixbhaskar@gmail.com> Acked-by:
Randy Dunlap <rdunlap@infradead.org> Signed-off-by:
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Yang Li authored
Eliminate the following coccicheck warning: ./arch/mips/mti-malta/malta-time.c:141:2-3: Unneeded semicolon Reported-by:
Abaci Robot <abaci@linux.alibaba.com> Signed-off-by:
Yang Li <yang.lee@linux.alibaba.com> Signed-off-by:
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Yang Li authored
Eliminate the following coccicheck warning: ./arch/mips/kvm/mips.c:151:2-3: Unneeded semicolon Reported-by:
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Huang Pei authored
MIPS always save kernel stack pointer in regs[29] Signed-off-by:
Huang Pei <huangpei@loongson.cn> Signed-off-by:
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- 27 Jan, 2021 6 commits
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Tiezhu Yang authored
Fix the following build error when make M=samples/bpf used with Clang: CLANG-bpf samples/bpf/sockex2_kern.o In file included from samples/bpf/sockex2_kern.c:7: In file included from ./include/uapi/linux/if_tunnel.h:7: In file included from ./include/linux/ip.h:16: In file included from ./include/linux/skbuff.h:28: In file included from ./include/net/checksum.h:22: ./arch/mips/include/asm/checksum.h:161:9: error: unsupported inline asm: input with type 'unsigned long' matching output with type '__wsum' (aka 'unsigned int') : "0" ((__force unsigned long)daddr), ^~~~~~~~~~~~~~~~~~~~~~~~~~~~ 1 error generated. This is a known issue on MIPS [1], the changed code can be compiled successfully by both GCC and Clang. [1] https://lore.kernel.org/linux-mips/CAG_fn=W0JHf8QyUX==+rQMp8PoULHrsQCa9Htffws31ga8k-iw@mail.gmail.com/Signed-off-by: -
Yanteng Si authored
MIPS can now use the default uncached_access like other archs. Signed-off-by:
Yanteng Si <siyanteng@loongson.cn> Acked-by:
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Yanteng Si authored
We no longer need the MESA workaround, so remove it. Signed-off-by:
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Chengyang Fan authored
Remove a superfluous semicolon after function definition. Signed-off-by:
Chengyang Fan <cy.fan@huawei.com> Signed-off-by:
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Thomas Bogendoerfer authored
I couldn't find any user of the dubious vpe_getcwd so far. So remove it and get rid of another set_fs(KERNEL_DS). Signed-off-by: -
Souptick Joarder authored
kernel test robot throws below warning -> arch/mips/kernel/cacheinfo.c:112:3: warning: Variable 'level' is modified but its new value is never used. [unreadVariable] Remove unnecessary increment of level at the end. Reported-by:
Souptick Joarder <jrdr.linux@gmail.com> Reviewed-by:
Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by:
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- 25 Jan, 2021 2 commits
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Jinyang He authored
For those leaf functions, they are likely to have no stack operations. Add is_jr_ra_ins() to determine whether jr ra has been touched before the frame_size is found. Without this patch, the get frame_size operation may be out of range and get the frame_size from the next nested function. There is no POOL32A format in uapi/asm/inst.h, so some bits here use the format of r_format instead. e.g. --------------------------------------------------------------------- | format | 31:26 | 25:21 | 20:16 | 15:6 | 5:0 | -----------------+---------+-------+-------+------------+------------ | pool32a_format | pool32a | rt | rs | jalrc | pool32axf | -----------------+---------+-------+-------+------------+------------ | r_format | opcode | rs | rt | rd:5, re:5 | func | --------------------------------------------------------------------- Signed-off-by:
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Jinyang He authored
[1]: Commit b6c7a324 ("MIPS: Fix get_frame_info() handling of microMIPS function size") [2]: Commit 2b424cfc ("MIPS: Remove function size check in get_frame_info()") First patch added a constant to check the number of iterations against. Second patch fixed the situation that info->func_size is zero. However, func_size member became useless after the second commit. Without ip_end, the get frame_size operation may be out of range although KALLSYMS enabled. Thus, check func_size first. Then make ip_end be the sum of ip and a constant (512) if func_size is equal to 0. Otherwise make ip_end be the sum of ip and func_size. Signed-off-by:
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