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  1. 21 Jun, 2020 1 commit
  3. 10 Jun, 2020 1 commit
    • Anup Patel's avatar
      irqchip: RISC-V per-HART local interrupt controller driver · 6b7ce892
      Anup Patel authored 
      The RISC-V per-HART local interrupt controller manages software
interrupts, timer interrupts, external interrupts (which are routed
via the platform level interrupt controller) and other per-HART
local interrupts.

We add a driver for the RISC-V local interrupt controller, which
eventually replaces the RISC-V architecture code, allowing for a
better split between arch code and drivers.

The driver is compliant with RISC-V Hart-Level Interrupt Controller
DT bindings located at:
Documentation/devicetree/bindings/interrupt-controller/riscv,cpu-intc.txt
Co-developed-by: default avatarPalmer Dabbelt <palmer@dabbelt.com>
Signed-off-by: default avatarAnup Patel <anup.patel@wdc.com>
[Palmer: Cleaned up warnings]
Signed-off-by: default avatarPalmer Dabbelt <palmer@dabbelt.com>
      6b7ce892
  5. 01 Jun, 2020 1 commit
    • Ingo Molnar's avatar
      irqchip: Fix "Loongson HyperTransport Vector support" driver build on all non-MIPS platforms · d77aeb5d
      Ingo Molnar authored 
      This commit:

  818e915f: ("irqchip: Add Loongson HyperTransport Vector support")

Added a MIPS-only driver, but turned on compilation on all other architectures as well:

 config LOONGSON_HTVEC
        bool "Loongson3 HyperTransport Interrupt Vector Controller"
        depends on MACH_LOONGSON64 || COMPILE_TEST

But this driver was never build tested on any other architecture than MIPS:

  drivers/irqchip/irq-loongson-htvec.c: In function ‘htvec_irq_dispatch’:
  drivers/irqchip/irq-loongson-htvec.c:59:3: error: implicit declaration of function ‘spurious_interrupt’; did you mean ‘smp_reboot_interrupt’? [-Werror=implicit-function-declaration]

Because spurious_interrupt() only exists on MIPS.

So make it MIPS-only.
Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
      d77aeb5d
  7. 29 May, 2020 3 commits
  9. 25 Mar, 2020 2 commits
  11. 08 Mar, 2020 1 commit
  13. 29 Jan, 2020 1 commit
  15. 20 Jan, 2020 3 commits
  17. 10 Nov, 2019 2 commits
  19. 19 Aug, 2019 1 commit
    • YueHaibing's avatar
      irqchip/irq-ingenic-tcu: Fix COMPILE_TEST building · 8084499b
      YueHaibing authored 
      While do COMPILE_TEST building, if GENERIC_IRQ_CHIP is
not selected, it fails:

drivers/irqchip/irq-ingenic-tcu.o: In function `ingenic_tcu_intc_cascade':
irq-ingenic-tcu.c:(.text+0x13f): undefined reference to `irq_get_domain_generic_chip'
drivers/irqchip/irq-ingenic-tcu.o: In function `ingenic_tcu_irq_init':
irq-ingenic-tcu.c:(.init.text+0x97): undefined reference to `irq_generic_chip_ops'
irq-ingenic-tcu.c:(.init.text+0xdd): undefined reference to `__irq_alloc_domain_generic_chips'
irq-ingenic-tcu.c:(.init.text+0x10b): undefined reference to `irq_get_domain_generic_chip'

select GENERIC_IRQ_CHIP to fix this.
Reported-by: default avatarHulk Robot <hulkci@huawei.com>
Fixes: 9536eba0 ("irqchip: Add irq-ingenic-tcu driver")
Signed-off-by: default avatarYueHaibing <yuehaibing@huawei.com>
Acked-by: default avatarThomas Gleixner <tglx@linutronix.de>
Signed-off-by: default avatarPaul Burton <paul.burton@mips.com>
Cc: <jason@lakedaemon.net>
Cc: <maz@kernel.org>
Cc: <paul@crapouillou.net>
Cc: <malat@debian.org>
Cc: <linux-kernel@vger.kernel.org>
Cc: <linux-mips@vger.kernel.org>
Cc: <linux-clk@vger.kernel.org>
      8084499b
  21. 08 Aug, 2019 1 commit
  23. 03 Jul, 2019 2 commits
  25. 17 Jun, 2019 1 commit
  27. 11 Jun, 2019 1 commit
  29. 29 May, 2019 1 commit
  31. 21 May, 2019 1 commit
  33. 01 May, 2019 3 commits
  35. 29 Apr, 2019 1 commit
  37. 19 Apr, 2019 1 commit
    • Linus Walleij's avatar
      irqchip: Add driver for IXP4xx · 5b978c10
      Linus Walleij authored 
      The IXP4xx (arch/arm/mach-ixp4xx) is an old Intel XScale
platform that has very wide deployment and use.

As part of modernizing the platform, we need to implement a
proper irqchip in the irqchip subsystem.

The IXP4xx irqchip is tightly jotted together with the GPIO
controller, and whereas in the past we would deal with this
complex logic by adding necessarily different code, we can
nowadays modernize it using a hierarchical irqchip.

The actual IXP4 irqchip is a simple active low level IRQ
controller, whereas the GPIO functionality resides in a
different memory area and adds edge trigger support for
the interrupts.

The interrupts from GPIO lines 0..12 are 1:1 mapped to
a fixed set of hardware IRQs on this IRQchip, so we
expect the child GPIO interrupt controller to go in and
allocate descriptors for these interrupts.

For the other interrupts, as we do not yet have DT
support for this platform, we create a linear irqdomain
and then go in and allocate the IRQs that the legacy
boards use. This code will be removed on the DT probe
path when we add DT support to the platform.

We add some translation code for supporting DT
translations for the fwnodes, but we leave most of that
for later.

Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Acked-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      5b978c10
  39. 19 Feb, 2019 2 commits
  41. 14 Feb, 2019 1 commit
  43. 18 Dec, 2018 2 commits
  45. 13 Dec, 2018 1 commit
  47. 25 Oct, 2018 2 commits
  49. 02 Oct, 2018 1 commit
  51. 13 Aug, 2018 1 commit
  53. 03 Aug, 2018 2 commits
    • Palmer Dabbelt's avatar
      genirq/irqchip: Remove MULTI_IRQ_HANDLER as it's now obselete · 4f7799d9
      Palmer Dabbelt authored 
      Now that every user of MULTI_IRQ_HANDLER has been convereted over to use
GENERIC_IRQ_MULTI_HANDLER remove the references to MULTI_IRQ_HANDLER.
Signed-off-by: default avatarPalmer Dabbelt <palmer@sifive.com>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Cc: linux@armlinux.org.uk
Cc: catalin.marinas@arm.com
Cc: Will Deacon <will.deacon@arm.com>
Cc: jonas@southpole.se
Cc: stefan.kristiansson@saunalahti.fi
Cc: shorne@gmail.com
Cc: jason@lakedaemon.net
Cc: marc.zyngier@arm.com
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: nicolas.pitre@linaro.org
Cc: vladimir.murzin@arm.com
Cc: keescook@chromium.org
Cc: jinb.park7@gmail.com
Cc: yamada.masahiro@socionext.com
Cc: alexandre.belloni@bootlin.com
Cc: pombredanne@nexb.com
Cc: Greg KH <gregkh@linuxfoundation.org>
Cc: kstewart@linuxfoundation.org
Cc: jhogan@kernel.org
Cc: mark.rutland@arm.com
Cc: ard.biesheuvel@linaro.org
Cc: james.morse@arm.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: openrisc@lists.librecores.org
Link: https://lkml.kernel.org/r/20180622170126.6308-6-palmer@sifive.com
      4f7799d9
    • Palmer Dabbelt's avatar
      irqchip: Port the ARM IRQ drivers to GENERIC_IRQ_MULTI_HANDLER · 08fb550c
      Palmer Dabbelt authored 
      GENERIC_IRQ_MULTI_HANDLER is incompatible with MULTI_IRQ_HANDLER because
they define the same symbols.  Multiple generic irqchip drivers select
MULTI_IRQ_HANDLER, which is now defined on all architectures that
provide set_handle_irq().

To solve this select GENERIC_IRQ_MULTI_HANDLER for all drivers that used to
select MULTI_IRQ_HANDLER, but only when MULTI_IRQ_HANDLER doesn't exist.

After that every architecture can be converted over from MULTI_IRQ_HANDLER
to GENERIC_IRQ_MULTI_HANDLER before removing the extra MULTI_IRQ_HANDLER
scaffolding.
Signed-off-by: default avatarPalmer Dabbelt <palmer@sifive.com>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Cc: linux@armlinux.org.uk
Cc: catalin.marinas@arm.com
Cc: Will Deacon <will.deacon@arm.com>
Cc: jonas@southpole.se
Cc: stefan.kristiansson@saunalahti.fi
Cc: shorne@gmail.com
Cc: jason@lakedaemon.net
Cc: marc.zyngier@arm.com
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: nicolas.pitre@linaro.org
Cc: vladimir.murzin@arm.com
Cc: keescook@chromium.org
Cc: jinb.park7@gmail.com
Cc: yamada.masahiro@socionext.com
Cc: alexandre.belloni@bootlin.com
Cc: pombredanne@nexb.com
Cc: Greg KH <gregkh@linuxfoundation.org>
Cc: kstewart@linuxfoundation.org
Cc: jhogan@kernel.org
Cc: mark.rutland@arm.com
Cc: ard.biesheuvel@linaro.org
Cc: james.morse@arm.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: openrisc@lists.librecores.org
Cc: Shea Levy <shea@shealevy.com>
Link: https://lkml.kernel.org/r/20180622170126.6308-2-palmer@sifive.com
      08fb550c
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