- 07 Dec, 2009 5 commits
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Adam Jackson authored
IGD* isn't a useful name. Replace with the codenames, as sourced from pci.ids. Signed-off-by:
Adam Jackson <ajax@redhat.com> [anholt: Fixed up for merge with pineview/ironlake changes] Signed-off-by:
Eric Anholt <eric@anholt.net>
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Adam Jackson authored
IGD* isn't a useful name. Replace with the codenames, as sourced from pci.ids. Signed-off-by:
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Chris Wilson authored
These are handled by the error return being propagated to user-space and do not any add any information to the original error, so are useless. Signed-off-by:
Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by:
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Jesse Barnes authored
If we don't detect a supported memory configuration, we can't enable CxSR. Warn the user in this case so they can file a bug.
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Jesse Barnes authored
This patch brings the tree up to date with some fixes that were in a more recent version of the page flipping patch you applied. It fixes pre-965 flip support, removes a leftover hack that forced alignment, and initializes the pipe & plane CRTC mappings. Signed-off-by:
Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by:
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- 02 Dec, 2009 3 commits
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Zhao Yakui authored
Signed-off-by:
Zhao Yakui <yakui.zhao@intel.com> Signed-off-by:
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Zhao Yakui authored
Add the missing clonemask for display port on Ironlake. Signed-off-by:
Zhenyu Wang <zhenyuw@linux.intel.com> cc: stable@kernel.org Signed-off-by:
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Zhao Yakui authored
We were always looking for the PORT_IDPB entry. Signed-off-by:
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- 01 Dec, 2009 22 commits
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Eric Anholt authored
This is a sync of a fix I made in the old UMS code. If the BIOS uses the GMBUS and doesn't clear that setup, then our bit-banging I2C can fail, leading to monitors not being detected. Signed-off-by: -
Zhao Yakui authored
Without this, on some boots the TV wouldn't be detected. Testing showed 15ms to be insufficient. https://bugs.freedesktop.org/show_bug.cgi?id=24290 https://bugs.freedesktop.org/show_bug.cgi?id=20785Signed-off-by:
Yan Seiner <yan@seiner.com> Signed-off-by:
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Kristian Høgsberg authored
Signed-off-by:
Kristian Høgsberg <krh@bitplanet.net> Signed-off-by:
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Li Peng authored
In current vblank-wait implementation, if we turn off VGA output, drm_wait_vblank will still wait on the disabled pipe until timeout, because vblank on the pipe is assumed be enabled. This would cause slow system response on some system such as moblin. This patch resolve the issue by adding a drm helper function drm_vblank_off which explicitly clear vblank_enabled[crtc], wake up any waiting queue and save last vblank counter before turning off crtc. It also slightly change drm_vblank_get to ensure that we will will return immediately if trying to wait on a disabled pipe. Signed-off-by:
Li Peng <peng.li@intel.com> Reviewed-by:
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Adam Jackson authored
Otherwise, I'd get stuck in a loop where (afaict) output scan would trigger a TV interrupt, which would trigger a scan, etc. TV load detection not being the fastest thing in the world, X would process requests very slowly. https://bugs.freedesktop.org/show_bug.cgi?id=24404Signed-off-by:
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Chris Wilson authored
Only update the render-clock on transition from busy to idle and vice versa, or else we burn a significant percentage of the cpu just rewriting the register -- not quite as power-friendly as intended ;-) Signed-off-by:
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Adam Jackson authored
Assume that either the presence of an LVDS entry in the VBT or an ACPI lid device indicates an LVDS device. ACPI lid alone is not sufficient. Signed-off-by:
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Eric Anholt authored
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Jesse Barnes authored
Add a GETPARAM request for checking if page flipping is supported. Useful for the 2D driver to enable the flipping path. Signed-off-by:
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Jesse Barnes authored
We don't actually know which frame number the flip will complete on, so userspace needs a specific flip notification to tell it when the last flip completed. Signed-off-by:
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Kristian Høgsberg authored
Acked-by:
Jakob Bornecrantz <jakob@vmware.com> Acked-by:
Thomas Hellström <thomas@shipmail.org> Review-by:
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Eric Anholt authored
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Zhenyu Wang authored
PineView only has 2 ports for LVDS and CRT. Don't enable other ports for it. Cc: Shaohua Li <shaohua.li@intel.com> Signed-off-by:
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Zhao Yakui authored
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Zhao Yakui authored
We not only check the device type, but also check the addin_offset. If the addin_offset is zero, it won't be initialized. Signed-off-by:
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Zhao Yakui authored
Use the child device array to decide whether the given DP output should be initialized. If the given DP port can't be found in child device array, it is not present and won't be initialized. Signed-off-by:
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Zhao Yakui authored
Use the child device array to decide whether the given HDMI output should be initialized. If the given HDMI port can't be found in child device array, it is not present and won't be initialized. Signed-off-by:
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Zhao Yakui authored
On some laptops there is no HDMI/DP. But the xrandr still reports several disconnected HDMI/display ports. In such case the user will be confused. >DVI1 disconnected (normal left inverted right x axis y axis) >DP1 disconnected (normal left inverted right x axis y axis) >DVI2 disconnected (normal left inverted right x axis y axis) >DP2 disconnected (normal left inverted right x axis y axis) >DP3 disconnected (normal left inverted right x axis y axis) This patch set is to use the child device parsed in VBT to decide whether the HDMI/DP/LVDS/TV should be initialized. Parse the child device from VBT. The device class type is also added for LFP, TV, HDMI, DP output. https://bugs.freedesktop.org/show_bug.cgi?id=22785Signed-off-by:
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Kristian Høgsberg authored
Otherwise the chip may scribble over free memory. Signed-off-by:
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Kristian Høgsberg authored
This also extends the mutex to cover fbc disabling, which is safe. Signed-off-by:
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Kristian Høgsberg authored
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Shaohua Li authored
if no VBT is present, crt_ddc_bus will be left at 0, and cause us to use that for the GPIO register offset. That's never a valid register offset, so let the "undefined" value be 0 instead of -1. Signed-off-by:
Shaohua Li <shaohua.li@intel.com> Signed-off-by:
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- 30 Nov, 2009 5 commits
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Chris Wilson authored
In commit d2d9f232, the guard for a valid video mode was removed. This caused the regression: kernel crash during kms graphic boot on Intel GM4500 platform https://bugzilla.redhat.com/show_bug.cgi?id=540218 This patches changes the logic slightly not to rely on a coupled variable, but to just check whether the video_modes is valid before dereferencing. Signed-off-by:
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Daniel Vetter authored
When switching to interruptible sleeps in the overlay code, I've forgotten to recover from interruptions at one site. This resulted in the overlay still running when it should have been switched off. This in turn caused a hang on resume because it tried to disable the (not-running) overlay in preparation for the resume modeset. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=24980 Tested-by: maximlevitsky@gmail.com Signed-off-by:
Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by:
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Daniel Vetter authored
I've suspected some bug there wrt to suspend, but that was not the case. Clean up the code anyway. Signed-off-by:
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Shaohua Li authored
HW guys have an evaluation about the impact about EOS, and say the impact is quite small, so they have removed EOS detection support. This patch removes EOS feature. revert commit 04302965 directly reverting it gives a hunk error, so please use this one. Signed-off-by:
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Shaohua Li authored
20ms delay is quite big and the routine isn't called in atomic context. better use msleep to let other tasks run. This can reduce cpu time used by Xorg, so potentially boost boot. Signed-off-by:
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- 25 Nov, 2009 5 commits
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Shaohua Li authored
In failure path, make sure encoder is cleaned up, otherwise there is a kernel oops. Signed-off-by:
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Zhenyu Wang authored
In disable sequence, all output ports on PCH have to be disabled before PCH transcoder, but LVDS port was left always enabled. This one fixes that by disable LVDS port properly during pipe disable process, and resolved stability issue seen on Ironlake. Also move panel fitting disable time just after pipe disable to align with the spec. Signed-off-by:
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Zhao Yakui authored
The DPLL calculation logic for 9xx platform is changed in: commit 652c393a Author: Jesse Barnes <jbarnes@virtuousgeek.org> Date: Mon Aug 17 13:31:43 2009 -0700 drm/i915: add dynamic clock frequency control Maybe we will get the different M/N/P combination with that by using the previous dpll calculation logic. So restore the DPLL calculation logic for 9xx platform. Signed-off-by:
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Zhao Yakui authored
Enumerate the LVDS panel timing info entry list in VBT to check whether the LVDS downclock is found. If found, the downclock is also used to switch dynamically between low and high frequency for LVDS. Signed-off-by:
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Zhao Yakui authored
If more than one mode with the same resolution defined in EDID has different refresh rate, it is thought that the downclock is found for LVDS. We will program the different FPx0/1 register so that we can select dynamically between the low and high frequency. On the g4x platform we will use the CxSR feature to switch the different refresh rate if the LVDS downclock feature is supported. Signed-off-by:
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