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  1. 17 May, 2010 12 commits
    • Thomas Abraham's avatar
      ARM: S5PV210: Add support for VPLL · f445dbd5
      Thomas Abraham authored 
      This patch adds the following.

1. Adds 'clk_sclk_hdmi27m' clock to represent the HDMI 27MHz clock.
2. Adds 'clk_vpllsrc; clock of type clksrc_clk to represent the
   input clock for VPLL.
3. Adds 'clk_sclk_vpll' clock of type clksrc_clk to represent the
   output of the MUX_VPLL mux.
4. Add clk_sclk_hdmi27m, clk_vpllsrc and clk_sclk_vpll to the list
   of clocks to be registered.
5. Adds boot time print of 'clk_sclk_vpll' clock rate.
6. Adds 'clk_fout_vpll' clock to plat-s5p such that it is reusable
   on other s5p platforms.
Signed-off-by: default avatarThomas Abraham <thomas.ab@samsung.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
      f445dbd5
    • Thomas Abraham's avatar
      ARM: S5PV210: Remove usage of clk_p66 and add clk_pclk_psys clock · f44cf78b
      Thomas Abraham authored 
      The clk_p83 clock, which is the PCLK clock for PSYS domain, is of
type 'struct clk' whereas on S5PV210, this clock is suitable to be
of type clksrc_clk clock (since it has a clock divider). So this
patch replaces the 'struct clk' type clock to 'struct clksrc_clk'
type clock for the PCLK PSYS clock.

This patch modifies the following.

1. Removes definitions and usage of 'clk_p66' clock.
2. Adds 'clk_pclk_psys' clock which is of type 'struct clksrc_clk'.
3. Replaces all usage of clk_p66 with clk_pclk_psys clock.
4. Adds clk_pclk_psys into list of clocks to be registered.
5. Removes the sys_clks array since it is no longer required.
   Also the registration of clocks in sys_clks is also removed.
6. Remove the 'GET_DIV' as it is no longer required.
Signed-off-by: default avatarThomas Abraham <thomas.ab@samsung.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
      f44cf78b
    • Thomas Abraham's avatar
      ARM: S5PV210: Remove usage of clk_p83 and add clk_pclk_dsys clock\ · 58772cd3
      Thomas Abraham authored 
      The clk_p83 clock, which is the PCLK clock for DSYS domain, is of
type 'struct clk' whereas on S5PV210, this clock is suitable to be
of type clksrc_clk clock (since it has a clock divider). So this
patch replaces the 'struct clk' type clock to 'struct clksrc_clk'
type clock for the PCLK DSYS clock.

This patch modifies the following.

1. Remove definitions and usage of 'clk_p83' clock.
2. Adds 'clk_pclk_dsys' clock which is of type 'struct clksrc_clk'.
3. Replace all usage of clk_p83 with clk_pclk_dsys clock.
4. Adds clk_pclk_dsys into list of clocks to be registered.
Signed-off-by: default avatarThomas Abraham <thomas.ab@samsung.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
      58772cd3
    • Thomas Abraham's avatar
      ARM: S5PV210: Fix clk_get_rate issue with the clk_h100 clock · 664f5b20
      Thomas Abraham authored 
      The clk_h100 clock represents the IMEM clock for the MSYS domain.
This clock rate of this clock is always half of the hclk_msys clock.
There is an issue when getting the clock rate of the clk_h100 clock
(clock get_rate hclk_h100 always returns clock rate that is equal to
the hclk_msys clock rate).

This patch modifies the following.

1. Moves the definition of the clk_h100 clock into the 'init_clocks'
   list with the appropriate parent, ctrlbit, enable and ops fields.

2. The name of the clock is changed from 'clk_h100' to 'hclk_imem'
   to represent more clearly that is represents the IMEM clock in
   the MSYS domain.

3. The function to get the clock rate of the hclk_imem clock is added.
Signed-off-by: default avatarThomas Abraham <thomas.ab@samsung.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
      664f5b20
    • Thomas Abraham's avatar
      ARM: S5PV210: Remove usage of clk_p100 and add clk_pclk_msys clock · 6ed91a20
      Thomas Abraham authored 
      The clk_p100 clock, which is the PCLK clock for MSYS domain, is of
type 'struct clk' whereas on S5PV210, this clock is suitable to be
of type clksrc_clk clock (since it has a choice of clock source
and a pre-divider). So this patch replaces the 'struct clk' type
clock to 'struct clksrc_clk' type clock for the PCLK MSYS clock.

This patch modifies the following.

1. Remove definitions and usage of 'clk_p100' clock.
2. Adds 'clk_pclk_msys' clock which is of type 'struct clksrc_clk'.
3. Replace all usage of clk_p100 with clk_pclk_msys clock.
4. Adds clk_pclk_msys into list of clocks to be registered.
Signed-off-by: default avatarThomas Abraham <thomas.ab@samsung.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
      6ed91a20
    • Thomas Abraham's avatar
      ARM: S5PV210: Remove usage of clk_h133 and add clk_hclk_psys clock · acfa245f
      Thomas Abraham authored 
      The clk_h133 clock, which is the HCLK clock for PSYS domain, is of
type 'struct clk' whereas on S5PV210, this clock is suitable to be
of type clksrc_clk clock (since it has a choice of clock source
and a pre-divider). So this patch replaces the 'struct clk' type
clock to 'struct clksrc_clk' type clock for the HCLK PSYS clock.

This patch modifies the following.

1. Remove definitions and usage of 'clk_h133' clock.
2. Adds 'clk_hclk_psys' clock which is of type 'struct clksrc_clk'.
3. Replace all usage of clk_h133 with clk_hclk_psys clock.
4. Adds clk_hclk_psys into list of clocks to be registered.
5. Removes the clock rate calculation of hclk133 and replaces
   it with code that derives the HCLK PSYS clock rate from
   the clk_hclk_psys clock.
6. Modify printing of the system clock rates.
Signed-off-by: default avatarThomas Abraham <thomas.ab@samsung.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
      acfa245f
    • Thomas Abraham's avatar
      ARM: S5PV210: Remove usage of clk_h166 and add clk_hclk_dsys clock · 0fe967a1
      Thomas Abraham authored 
      The clk_h166 clock, which is the HCLK clock for DSYS domain, is of
type 'struct clk' whereas on S5PV210, this clock is suitable to be
of type clksrc_clk clock (since it has a choice of clock source
and a pre-divider). So this patch replaces the 'struct clk' type
clock to 'struct clksrc_clk' type clock for the HCLK DSYS clock.

This patch modifies the following.

1. Remove definitions and usage of 'clk_h166' clock.

2. Adds 'clk_sclk_a2m' clock which is one of possible parent clock
   sources for the DSYS HCLK clock.

3. Adds 'clk_hclk_dsys' clock which is of type 'struct clksrc_clk'.

4. Replace all usage of clk_h166 with clk_hclk_dsys clock.

5. Adds clk_sclk_a2m and clk_hclk_dsys into list of clocks to
   be registered.

6. Removes the clock rate calculation of hclk166 and replaces
   it with code that derives the HCLK DSYS clock rate from
   the clk_hclk_dsys clock.
Signed-off-by: default avatarThomas Abraham <thomas.ab@samsung.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
      0fe967a1
    • Thomas Abraham's avatar
      ARM: S5PV210: Remove usage of clk_h200 clock and add clk_hclk_msys clock · af76a201
      Thomas Abraham authored 
      The clk_h200 represents the HCLK for the MSYS domain. This clock
is of type 'struct clk' but on V210, it is more suitable to be of
type 'struct clksrc_clk' (since it is a divided version of the
armclk). The replacement clock is renamed as clk_hclk_msys to
indicate that it represents the HCLK for MSYS domain.

This patch modifies the following.

1. Removes the usage of the clk_h200 clock.
2. Adds the new clock 'clk_hclk_msys'.
3. Adds clk_hclk_msys to the list of sysclks to be registered.
4. Modifies the hclk_msys clock rate calculation procedure to
   be based on the new clk_hclk_msys clock.
Signed-off-by: default avatarThomas Abraham <thomas.ab@samsung.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
      af76a201
    • Thomas Abraham's avatar
      ARM: S5PV210: Add armclk of clksrc_clk clock type · 374e0bf5
      Thomas Abraham authored 
      This patch modifies the following.

1. Adds arm clock 'clk_armclk' of type clksrc_clk clock type.
2. Adds arm clock to the list of system clocks 'sysclks' for
   registering it along with other system clocks.
3. Modifies the armclk clock rate calculation procedure to be
   based on the new clk_armclk clock.
Signed-off-by: default avatarThomas Abraham <thomas.ab@samsung.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
      374e0bf5
    • Thomas Abraham's avatar
      ARM: S5PV210: Rearrange assignment of clock for fout apll/mpll/epll clocks · c62ec6a9
      Thomas Abraham authored 
      The assignment of clock rates for fout apll/mpll/epll is moved further
up in the s5pv210_setup_clocks function because the subsequent patches
require the clock rate of fout clocks to be setup.
Signed-off-by: default avatarThomas Abraham <thomas.ab@samsung.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
      c62ec6a9
    • Thomas Abraham's avatar
      ARM: S5PV210: Register apll/mpll/epll clksrc_clk clocks · eb1ef1ed
      Thomas Abraham authored 
      This patch modifies the following.

1. Registers the mout_apll clksrc_clk clock.

2. The mout_mpll and mout_epll clocks were registered as 'struct clk'
   types and then their parents were setup using the s3c_set_clksrc
   function. This patch reduces the two steps into one by registering
   the mout_mpll and mout_epll clocks using the s3c_register_clksrc
   function.

3. As per point 2 above, the init_parents array is no longer required.
   So the mout clocks are now put together in a new array named 'sysclks'.
   The sysclks array will list the system level clocks and more
   clocks will be added to it in the subsequent patches.

4. The clks array is left empty because of the movement of mpll and epll
   clocks into the sysclks array. It is not deleted since subsequent
   patches will add clocks into this array.

Signed-off-by: Thomas Abraham <thomas.ab <at> samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim <at> samsung.com>
Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
      eb1ef1ed
    • Thomas Abraham's avatar
      ARM: S5PV210: Rearrange the system clock definitions · 59cda520
      Thomas Abraham authored 
      The system clock definitions are currently defined below the
peripheral clock definitions in the V210 clock code. For the V210
clock updates that follow this patch, it is required that the
system clock definitions such as the mout_apll and mout_mpll be
defined prior to the device clock definitions. This patch
re-arranges the system clock defintions for the clock updates that
follow this patch.
Signed-off-by: default avatarThomas Abraham <thomas.ab@samsung.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
      59cda520
  3. 05 May, 2010 7 commits
  5. 04 May, 2010 9 commits
  7. 03 May, 2010 12 commits
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