Merge tag 'tegra-for-6.1-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

arm64: tegra: Device tree changes for v6.1-rc1

These changes enable PCI, Ethernet and HDA support on Jetson AGX Orin.
DMA support is enabled for I2C on a number of SoC generations and the
Google Pixel C (a.k.a. Smaug) device receives Bluetooth and Wi-Fi
support.

Other than that this also contains some minor cleanups and fixes.

* tag 'tegra-for-6.1-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: tegra: Add GPCDMA support for Tegra I2C
  arm64: tegra: Add iommus for HDA on Tegra234
  arm64: tegra: Enable HDA node for Jetson AGX Orin
  arm64: tegra: Add context isolation domains on Tegra234
  arm64: tegra: Fixup iommu-map property formatting
  arm64: dts: tegra: smaug: Add Wi-Fi node
  arm64: dts: tegra: smaug: Add Bluetooth node
  arm64: tegra: Enable MGBE on Jetson AGX Orin Developer Kit
  arm64: tegra: Add MGBE nodes on Tegra234
  arm64: tegra: Fix up compatible for Tegra234 GPCDMA
  arm64: tegra: Enable PCIe slots in P3737-0000 board
  arm64: tegra: Add P2U and PCIe controller nodes to Tegra234 DT
  arm64: tegra: Add regulators required for PCIe

Link: https://lore.kernel.org/r/20220916101957.1635854-5-thierry.reding@gmail.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'tegra-for-6.1-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

dt-bindings: Changes for v6.1-rc1

Adds device tree bindings for the MGBE found on Tegra234 SoCs, as well
as stream IDs for the shared host1x context devices.

* tag 'tegra-for-6.1-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  dt-bindings: Add Host1x context stream IDs on Tegra234
  dt-bindings: net: Add Tegra234 MGBE

Link: https://lore.kernel.org/r/20220916101957.1635854-4-thierry.reding@gmail.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>

AT91 DT for v6.1 #2

It contains:
- new SAMA5D3 based board, namely SAMA5D3-EDS
- adjustments to pass the DT binding validations
- disable AES on some LAN966 based boards as they are reserverd by
  secure OS

* tag 'at91-dt-6.1-2' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  spi: dt-bindings: atmel,at91rm9200-spi: Add DMA related properties
  ARM: dts: at91: Add `atmel,usart-mode` required property to serial nodes
  ARM: dts: at91: sam9x60ek: Add DBGU compatibles to uart1
  ARM: dts: at91: sama7g5: Swap rx and tx for spi11
  dts: arm: at91: Add SAMA5D3-EDS Board
  dt-bindings: arm: at91: Add info on SAMA5D3-EDS
  ARM: dts: lan966x: disable aes

Link: https://lore.kernel.org/r/20220916105407.1287452-1-claudiu.beznea@microchip.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>

The DT nodes of the SPI IP's may contain DMA related properties so
make sure that the binding is able to properly validate those as
well by making it aware of these optional properties.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220913142205.162399-5-sergiu.moga@microchip.com

Add the missing required DT property `atmel,usart-mode` to the serial
nodes of Atmel/Microchip DT files.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220913142205.162399-4-sergiu.moga@microchip.com

Maintain consistency among the compatibles of the serial nodes of
sam9x60ek and highlight the incremental characteristic of its serial
IP's by making sure that all serial nodes contain both the sam9x60
and sam9260 usart/dbgu compatibles.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220913142205.162399-3-sergiu.moga@microchip.com

Swap the rx and tx of the DMA related DT properties of the spi11 node
in order to maintain consistency across Microchip/Atmel SoC files.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220913142205.162399-2-sergiu.moga@microchip.com

This pull request contains Broadcom ARM64-based SoC changes for 6.1,
please pull the following:

- Rafal adds the BCM4908 LED controller node and describes all 32 LED
pins, he also adds support for the Asus GC-AC5300 LEDs

* tag 'arm-soc/for-6.1/devicetree-arm64' of https://github.com/Broadcom/stblinux:
  arm64: dts: broadcom: bcm4908: add Asus GT-AC5300 LEDs
  arm64: dts: broadcom: bcm4908: add LEDs controller block
  arm64: dts: broadcom: bcm4908: add remaining LED pins

Link: https://lore.kernel.org/r/20220915023044.2350782-3-f.fainelli@gmail.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>

This pull request contains Broadcom ARM-based SoC Device Tree updates
for 6.1, please pull the following:

- Rafal improves the BCM5301X PCIe DT nodes schema validation by
flagging the PCIe controller with a missing "device_type" property

- William merges BCM4908 within BCMBCA since this chip is part of the
Broadcom Broadband Carrier Access group and follows the architecture of
those chips

* tag 'arm-soc/for-6.1/devicetree' of https://github.com/Broadcom/stblinux:
  arm64: bcmbca: Merge ARCH_BCM4908 to ARCH_BCMBCA
  arm64: dts: Add BCM4908 generic board dts
  arm64: dts: Move BCM4908 dts to bcmbca folder
  arm64: dts: bcmbca: update BCM4908 board dts files
  dt-bindings: arm64: bcmbca: Update BCM4908 description
  dt-bindings: arm64: bcmbca: Merge BCM4908 into BCMBCA
  ARM: dts: BCM5301X: Add basic PCI controller properties

Link: https://lore.kernel.org/r/20220915023044.2350782-2-f.fainelli@gmail.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>

Add dma properties to support GPCDMA for I2C in Tegra 186 and later
chips
Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Add the iommus property to the HDA node on Tegra234.
Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Enable HDA node for the Jetson AGX Orin platform.
Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Add Host1x context isolation domains on Tegra234. On Tegra234 we have
two IOMMUs that are connected to Host1x-channel programmed engines,
so we have to include domains for each of them.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Make sure that each phandle-array is enclosed in a set of angular
brackets and properly indent each entry.
Signed-off-by: Thierry Reding <treding@nvidia.com>

The Google Pixel C contains a BRCM4354 Wi-Fi + BT module.
Add a DT node for its Wi-Fi functionality. Tested on Pixel C.
Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
Signed-off-by: Thierry Reding <treding@nvidia.com>

The Google Pixel C contains a BRCM4354 Wi-Fi + BT module.
Add a DT node for its BT functionality. Tested on Pixel C.
Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
Signed-off-by: Thierry Reding <treding@nvidia.com>

A Multi-Gigabit Ethernet (MGBE) instance drives the primary Ethernet
port on the Jetson AGX Orin Developer Kit. Enable it.
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Add device tree nodes for the four instances of the Multi-Gigabit
Ethernet (MGBE) IP found on NVIDIA Tegra234 SoCs.
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

There is no need to list the Tegra194-specific compatible for Tegra234
because the backwards-compatibility goes back all the way to Tegra186.
Signed-off-by: Thierry Reding <treding@nvidia.com>

Enable PCIe controller nodes to enable respective PCIe slots on
P3737-0000 board. Following is the ownership of slots by different
PCIe controllers.
Controller-1 : On-board Broadcom WiFi controller
Controller-4 : M.2 Key-M slot
Controller-5 : CEM form-factor x8 slot
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Add P2U (PIPE to UPHY) and PCIe controller nodes to device tree.
The Tegra234 SoC contains 10 PCIe controllers and 24 P2U instances
grouped into three different PHY bricks namely High-Speed IO (HSIO-8 P2Us)
NVIDIA High Speed (NVHS-8 P2Us) and Gigabit Ethernet (GBE-8 P2Us)
respectively.
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Add regulator supplies required for PCIe functionality. The supplies
include 1.8V, 3.3V and 12V.
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Add defines for stream IDs used for Host1x context isolation
on Tegra234. The same stream IDs are used for both NISO0 and
NISO1 SMMUs since Host1x's stream ID protection tables don't
make a distinction between the two.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>

The SAMA5D3-EDS board is an Ethernet Development Platform allowing for
evaluating many Microchip ethernet switch and PHY products.  Various
daughter cards can connect via an RGMII connector or an RMII connector.

The EDS board is not intended for stand-alone use and has no ethernet
capabilities when no daughter board is connected.  As such, this device
tree is intended to be used with a DT overlay defining the add-on board.
To better ensure consistency, some items are defined here as a form of
documentation so that all add-on overlays will use the same terms.

Link: https://www.microchip.com/en-us/development-tool/SAMA5D3-ETHERNET-DEVELOPMENT-SYSTEMSigned-off-by: Jerry Ray <jerry.ray@microchip.com>
[claudiu.beznea: s/gpio-inputs/gpio-keys in at91-sama5d3_eds.dts]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220909163022.13022-2-jerry.ray@microchip.com

Adding the SAMA5D3-EDS board from Microchip into the atmel AT91 board
description yaml file.
Signed-off-by: Jerry Ray <jerry.ray@microchip.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220909163022.13022-1-jerry.ray@microchip.com

Disable AES node on lan966x pcb8290, pcb891 and pcb8309 because these
boards have lan966x that uses secure OS which reserves the AES block.
Therefore it can't be exposed to non-secure world.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220908070451.3730608-1-horatiu.vultur@microchip.com

Merge tag 'samsung-dt64-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

Samsung DTS ARM64 changes for v6.0

1. Add binding headers for several Exynos850 and ExynosAutov9 clocks.
2. ExynosAutov9: Add FSYS clock controller nodes.
3. ExynosAutov9: Document serial compatible (used in DTS).
4. Exynos850: Add Audio, IS, MFC clock controllers. Add IOMMU nodes.

* tag 'samsung-dt64-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  dt-bindings: serial: samsung: add exynosautov9-uart compatible
  arm64: dts: exynos: Add SysMMU nodes for Exynos850
  arm64: dts: exynos: Add CMU_AUD, CMU_IS and CMU_MFCMSCL for Exynos850
  arm64: dts: exynosautov9: add fsys0/1 clock DT nodes
  dt-bindings: clock: exynos850: Add Exynos850 CMU_MFCMSCL
  dt-bindings: clock: exynos850: Add Exynos850 CMU_IS
  dt-bindings: clock: exynos850: Add Exynos850 CMU_AUD
  dt-bindings: clock: exynosautov9: add schema for cmu_fsys0/1
  dt-bindings: clock: exynosautov9: add fsys1 clock definitions
  dt-bindings: clock: exynosautov9: add fys0 clock definitions
  dt-bindings: clock: exynosautov9: correct clock numbering of peric0/c1

Link: https://lore.kernel.org/r/20220909150849.820523-2-krzysztof.kozlowski@linaro.orgSigned-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'stm32-dt-for-v6.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt

STM32 DT for v6.1, round 1

Highlights:
----------

- MPU:
  - General:
    - Add I2C support (5 instances) on STM32MP13.
    - Add SPI support (5 instabces) on STM32MP13.
    - Add timer interrupts support on STM32MP15.

  - ST boards:
    - Enable I2C1 and I2C5 on stm32mp135f-dk board.
    - Add SPI5 on stm32mp135f-dk board but disabled as only available on
      the GPIO expansion connector.

  - ARGON:
    - Remove spidev node as not used by the code.

* tag 'stm32-dt-for-v6.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
  ARM: dts: stm32: argon: remove spidev node
  ARM: dts: stm32: Create separate pinmux for qspi cs pin in stm32mp15-pinctrl.dtsi
  ARM: dts: stm32: Fix typo in license text for Engicam boards
  ARM: dts: stm32: Add timer interrupts on stm32mp15
  ARM: dts: stm32: add pinctrl and disabled spi5 node in stm32mp135f-dk
  ARM: dts: stm32: add spi nodes into stm32mp131.dtsi
  ARM: dts: stm32: enable i2c1 and i2c5 on stm32mp135f-dk.dts
  ARM: dts: stm32: add i2c nodes into stm32mp131.dtsi

Link: https://lore.kernel.org/r/d80afc20-2745-24a2-ab70-a5a03439bd50@foss.st.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'v6.1-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt

Adapt emac nodes to make them conform to the newly yaml-converted binding.

* tag 'v6.1-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: restyle emac nodes
  ARM: dts: rockchip: fix rk3036 emac node compatible string

Link: https://lore.kernel.org/r/4766760.31r3eYUQgx@philSigned-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'v6.1-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt

New boards the Anberic RG353P and RG503, Radxa Rock4c+ (variant with
different display outputs), Pine64 Pinephone Pro, Open AI Lab EAIDK-610.

New components of the rk356x (Video encoder/decoder, pcie, CSI dphy).

New board-peripherals for rock3a (pcie, i2c, regulators, rtc), quartz64-b
(pcie, analog audio) and BPI-R2-Pro (pcie), ROCK Pi (leds), Odroid Go (charger)

Usage of the new-ish bclk special handling for audio on rk3399.

* tag 'v6.1-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (29 commits)
  arm64: dts: rockchip: use BCLK to GPIO switch on rk3399
  arm64: dts: rockchip: Add Hantro encoder node to rk356x
  arm64: dts: rockchip: Add VPU support for RK3568/RK3566
  arm64: dts: rockchip: Enable PCIe controller on rock3a
  arm64: dts: rockchip: add rtc to rock3a
  arm64: dts: rockchip: Add PCIe 2 nodes to quartz64-b
  arm64: dts: rockchip: add Anbernic RG353P and RG503
  dt-bindings: arm: rockchip: Add Anbernic RG353P and RG503
  dt-bindings: vendor-prefixes: add Anbernic
  arm64: dts: rockchip: Add regulator suffix to BPI-R2-Pro
  arm64: dts: rockchip: add LEDs for ROCK 4C+
  arm64: dts: rockchip: add LED for ROCK Pi 4A/B/C/A+/B+
  arm64: dts: rockchip: add rk817 chg to Odroid Go Advance
  arm64: dts: rockchip: Fix SD card controller probe on Pinephone Pro
  arm64: dts: rockchip: rk3399: Radxa ROCK 4C+
  arm64: dts: rockchip: Add RK3399-T OPP table
  dt-bindings: arm: rockchip: Document Radxa ROCK 4C+
  arm64: dts: rockchip: Add initial support for Pine64 PinePhone Pro
  dt-bindings: arm: rockchip: Add PinePhone Pro bindings
  arm64: dts: rockchip: Add dts for a rk3399 based board EAIDK-610
  ...

Link: https://lore.kernel.org/r/5600929.DvuYhMxLoT@philSigned-off-by: Arnd Bergmann <arnd@arndb.de>

Commit 956b200a ("spi: spidev: Warn loudly if instantiated from DT
as "spidev"") states that there should not be spidev nodes in DTs.
Remove this non-HW description. There won't be a regression because it
won't bind since 2015 anyhow.

Fixes: 16e3e44c ("ARM: dts: stm32: Add support for the emtrion emSBC-Argon")
Cc: Reinhold Mueller <reinhold.mueller@emtrion.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

Create a separate pinmux for qspi chip select in stm32mp15-pinctrl.dtsi.
In the case we want to use transfer_one() API to communicate with a SPI
device, chip select signal must be driven individually.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

Fix the Amarula Solutions typo mistake in license text added in below
commits.

commit <3ff0810f> ("ARM: dts: stm32: Add Engicam i.Core STM32MP1
C.TOUCH 2.0 10.1" OF")
commit <6ca2898d> ("ARM: dts: stm32: Add Engicam i.Core STM32MP1
C.TOUCH 2.0")
commit <adc04961> ("ARM: dts: stm32: Add Engicam i.Core STM32MP1
EDIMM2.2 Starter Kit")
commit <30f9a9da> ("ARM: dts: stm32: Add Engicam i.Core STM32MP1
SoM")
commit <1d278204> ("ARM: dts: stm32: Add Engicam MicroGEA STM32MP1
MicroDev 2.0 7" OF")
commit <f838dae7> ("ARM: dts: stm32: Add Engicam MicroGEA STM32MP1
MicroDev 2.0 board")
commit <0be81dfa> ("ARM: dts: stm32: Add Engicam MicroGEA STM32MP1
SoM")
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

The timer units in the stm32mp15x CPUs have interrupts, depending on the
timer flavour either one "global" or four dedicated ones. Add the irqs
to the timer units on stm32mp15x.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

Add pinctrl information and a disabled spi5 node within
stm32mp135f-dk.dts in order to use the spi5 bus which is
available via the GPIO expansion pins of the STM32MP135 Discovery board.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

Add the 5 instances of spi busses supported by the stm32mp131.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

Enable the two i2c busses i2c1 and i2c5 available on the
stm32mp135f-dk Discovery board.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

Add the 5 instances of i2c busses supported by the stm32mp131.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

We discoverd that the state of BCLK on, LRCLK off and SD_MODE on
may cause the speaker melting issue. Removing LRCLK while BCLK
is present can cause unexpected output behavior including a large
DC output voltage as described in the Max98357a datasheet.

In order to:
  1. prevent BCLK from turning on by other component.
  2. keep BCLK and LRCLK being present at the same time

This patch adjusts the device tree to allow BCLK to switch
to GPIO func before LRCLK output, and switch back during
LRCLK is output.
Signed-off-by: Judy Hsiao <judyhsiao@chromium.org>
Reviewed-by: Brian Norris <briannorris@chromium.org>
Link: https://lore.kernel.org/r/20220708080726.4170711-1-judyhsiao@chromium.orgSigned-off-by: Heiko Stuebner <heiko@sntech.de>