1. 19 Dec, 2016 2 commits
  2. 14 Dec, 2016 2 commits
    • Vineet Gupta's avatar
      ARCv2: intc: default all interrupts to priority 1 · 107177b1
      Vineet Gupta authored
      ARC HS Cores support configurable multiple interrupt priorities of upto
      16 levels. In commit dec2b284 ("ARCv2: intc: Allow interruption by
      lowest priority interrupt") we switched to 15 which seems a bit
      excessive given that there would be rare hardware implementing so many
      preemption levels AND running Linux. It would seem that 2 levels will be
      more common so switch to 1 as the default priority level. This will be
      the "lower" priority level saving 0 for implementing NMI style support.
      
      This scheme also works in systems with more than 2 prioity levels as
      well.
      Signed-off-by: default avatarVineet Gupta <vgupta@synopsys.com>
      107177b1
    • Vineet Gupta's avatar
      ARCv2: entry: document intr disable in hard isr · 78833e79
      Vineet Gupta authored
      And while at it - use the proper assembler macro which includes the
      optional irq tracing already - de-uglify'ing the code a bit
      Signed-off-by: default avatarVineet Gupta <vgupta@synopsys.com>
      78833e79
  3. 13 Dec, 2016 1 commit
  4. 30 Nov, 2016 14 commits
  5. 29 Nov, 2016 1 commit
  6. 28 Nov, 2016 2 commits
  7. 27 Nov, 2016 5 commits
  8. 26 Nov, 2016 13 commits