- 05 Jan, 2022 9 commits
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Sam Protsenko authored
"watchdog_src" clock is optional and may not be present for some SoCs supported by this driver. Nevertheless, in case the clock is provided but some error happens during its getting, that error should be handled properly. Use devm_clk_get_optional() API for that. Also report possible errors using dev_err_probe() to handle properly -EPROBE_DEFER error (if clock provider is not ready by the time WDT probe function is executed). Fixes: e249d01b ("watchdog: s3c2410: Support separate source clock") Reported-by:
kernel test robot <lkp@intel.com> Reported-by:
Dan Carpenter <dan.carpenter@oracle.com> Suggested-by:
Guenter Roeck <linux@roeck-us.net> Signed-off-by:
Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20211212170247.30646-1-semen.protsenko@linaro.orgSigned-off-by:
Wim Van Sebroeck <wim@linux-watchdog.org>
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Lad Prabhakar authored
platform_get_resource(pdev, IORESOURCE_IRQ, ..) relies on static allocation of IRQ resources in DT core code, this causes an issue when using hierarchical interrupt domains using "interrupts" property in the node as this bypassed the hierarchical setup and messed up the irq chaining. In preparation for removal of static setup of IRQ resource from DT core code use platform_get_irq(). Signed-off-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by:
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Rob Herring authored
With 'unevaluatedProperties' support implemented, the atmel,sama5d4-wdt example has the following warning: /home/rob/proj/git/linux-dt/.build-arm64/Documentation/devicetree/bindings/watchdog/atmel,sama5d4-wdt.example.dt.yaml: watchdog@fc068640: Unevaluated properties are not allowed ('interrupts' was unexpected) Document the missing 'interrupts' property. Cc: Wim Van Sebroeck <wim@linux-watchdog.org> Cc: Guenter Roeck <linux@roeck-us.net> Cc: Nicolas Ferre <nicolas.ferre@microchip.com> Cc: Alexandre Belloni <alexandre.belloni@bootlin.com> Cc: Ludovic Desroches <ludovic.desroches@microchip.com> Cc: Eugen Hristev <eugen.hristev@microchip.com> Cc: linux-watchdog@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by:Rob Herring <robh@kernel.org> Acked-by:
Thierry Reding <treding@nvidia.com> Acked-by:
Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20211206174045.2294873-1-robh@kernel.orgSigned-off-by:
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Tzung-Bi Shih authored
The watchdog pre-timeout (bark) interrupt is optional. Use platform_get_irq_optional() to avoid seeing such following error message: >>> mtk-wdt 10007000.watchdog: IRQ index 0 not found Signed-off-by:
Tzung-Bi Shih <tzungbi@google.com> Reviewed-by:
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Biju Das authored
Add Watchdog Timer driver for RZ/G2L SoC. WDT IP block supports normal watchdog timer function and reset request function due to CPU parity error. This driver currently supports normal watchdog timer function and later will add support for reset request function due to CPU parity error. Signed-off-by:
Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by:
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Biju Das authored
Describe the WDT hardware in the RZ/G2L series. Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by:
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Andrej Picej authored
Commit 5ea29919c294 ("watchdog: da9063: use atomic safe i2c transfer in reset handler") implements atomic save i2c transfer which uses i2c functions directly. Add I2C hard dependency which overrides COMPILE_TEST. Reported-by:Andrej Picej <andrej.picej@norik.com> Reviewed-by:
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Sander Vanheule authored
Realtek MIPS SoCs (platform name Otto) have a watchdog timer with pretimeout notifitication support. The WDT can (partially) hard reset, or soft reset the SoC. This driver implements all features as described in the devicetree binding, except the phase2 interrupt, and also functions as a restart handler. The cpu reset mode is considered to be a "warm" restart, since this mode does not reset all peripherals. Being an embedded system though, the "cpu" and "software" modes will still cause the bootloader to run on restart. It is not known how a forced system reset can be disabled on the supported platforms. This means that the phase2 interrupt will only fire at the same time as reset, so implementing phase2 is of little use. Signed-off-by:
Sander Vanheule <sander@svanheule.net> Reviewed-by:
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Sander Vanheule authored
Add a binding description for Realtek's watchdog timer as found on several of their MIPS-based SoCs (codenamed Otto), such as the RTL838x, RTL839x, and RTL930x series of switch SoCs. Signed-off-by:
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- 28 Dec, 2021 26 commits
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Sam Protsenko authored
Exynos850 is a bit different from SoCs already supported in WDT driver: - AUTOMATIC_WDT_RESET_DISABLE register is removed, so its value is always 0; .disable_auto_reset callback is not set for that reason - MASK_WDT_RESET_REQUEST register is replaced with CLUSTERx_NONCPU_IN_EN register; instead of masking (disabling) WDT reset interrupt it's now enabled with the same value; .mask_reset callback is reused for that functionality though - To make WDT functional, WDT counter needs to be enabled in CLUSTERx_NONCPU_OUT register; it's done using .enable_counter callback Also Exynos850 has two CPU clusters, each has its own dedicated WDT instance. Different PMU registers and bits are used for each cluster. So driver data is now modified in probe, adding needed info depending on cluster index passed from device tree. Signed-off-by: -
Yunus Bas authored
This patch is based on commit 057b52b4 ("watchdog: da9062: make restart handler atomic safe"), which uses the atomic transfer capability of the i2c framework. Signed-off-by:
Yunus Bas <y.bas@phytec.de> Signed-off-by:
Adam Thomson <Adam.Thomson.Opensource@diasemi.com> Reviewed-by:
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Changcheng Deng authored
do_div() does a 64-by-32 division. Here the divisor is an unsigned long which on some platforms is 64 bit wide. So use div64_ul instead of do_div to avoid a possible truncation. Reported-by:
Zeal Robot <zealci@zte.com.cn> Signed-off-by:
Changcheng Deng <deng.changcheng@zte.com.cn> Reviewed-by:
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Florian Fainelli authored
Now that we can utilize the BCM7038_WDT driver, remove that one which was not converted to the watchdog APIs. There are a couple of notable differences with how the bcm7038_wdt driver proceeds: - bcm63xx_wdt would register with the ad-hoc BCM63xx hardware timer API, but this would only be used in order to catch the interrupt *before* a SoC reset and make the kernel "die" - bcm6xx_wdt would register a software timer and kick it every second in order to pet the watchdog, thus offering a two step watchdog process. This is not something that is brought over to the bcm7038_wdt as it is deemed unnecessary. If user-space cannot pet the watchdog, but a kernel timer can, the system is still in a bad shape anyway. bcm7038_wdt is simpler in its behavior and behaves as a standard watchdog driver and is not making use of any specific platform APIs, therefore making it more maintainable and extensible. Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com> Reviewed-by:
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Florian Fainelli authored
In order to utilize the bcm7038_wdt.c driver which needs to know the clock name to obtain, pass it via platform data using the bcm7038_wdt_platform_data structure. Signed-off-by:
Thomas Bogendoerfer <tsbogend@alpha.franken.de> Reviewed-by:
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Florian Fainelli authored
In order to phase out bcm63xx_wdt and use bcm7038_wdt instead, introduce a platform_device_id table that allows both names to be matched. Signed-off-by:
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Florian Fainelli authored
CONFIG_BCM63XX denotes the legacy MIPS-based DSL SoCs which utilize the same piece of hardware as a watchdog, make it possible to select that driver for those platforms. Signed-off-by:
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Florian Fainelli authored
The BCM7038 watchdog driver needs to be able to obtain a specific clock name on BCM63xx platforms which is the "periph" clock ticking at 50MHz. make it possible to specify the clock name to obtain via platform data. Signed-off-by:
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Florian Fainelli authored
The BCM7038 watchdog binding is updated to include a "brcm,bcm6345-wdt" compatible string which is the first instance of a DSL (BCM63xx) SoC seeing the integration of such a watchdog timer block. Reviewed-by:
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Rafał Miłecki authored
This helps validating DTS files. Signed-off-by:
Rafał Miłecki <rafal@milecki.pl> Acked-by:
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Artem Lapkin authored
Remove watchdog_stop_on_reboot() The Meson platform still has some hardware drivers problems for some configurations which can freeze devices on shutdown/reboot. Remove watchdog_stop_on_reboot() to catch this situation and ensure that the reboot happens anyway. Users who still want to stop the watchdog on reboot can still do so using the watchdog.stop_on_reboot=1 module parameter. https://lore.kernel.org/linux-watchdog/20210729072308.1908904-1-art@khadas.com/T/#tSigned-off-by:
Artem Lapkin <art@khadas.com> Reviewed-by:
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Luca Ceresoli authored
Some entries indent their help text with 1 tab + 1 space or 1 tab only instead of 1 tab + 2 spaces. Add the missing spaces. Signed-off-by:
Luca Ceresoli <luca@lucaceresoli.net> Acked-by:
Randy Dunlap <rdunlap@infradead.org> Reviewed-by:
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Jacky Bai authored
The wdog on i.MX8ULP is derived from i.MX7ULP, it uses two compatible strings, so update the compatible string for i.MX8ULP. Reviewed-by:
Dong Aisheng <aisheng.dong@nxp.com> Acked-by:
Jacky Bai <ping.bai@nxp.com> Signed-off-by:
Peng Fan <peng.fan@nxp.com> Reviewed-by:
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Sam Protsenko authored
'err' label in probe function is not really need, it just returns. Remove it and replace all 'goto' statements with actual returns in place. No functional change here, just a cleanup patch. Signed-off-by:
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Sam Protsenko authored
Right now all devices supported in the driver have the single clock: it acts simultaneously as a bus clock (providing register interface clocking) and source clock (driving watchdog counter). Some newer Exynos chips, like Exynos850, have two separate clocks for that. In that case two clocks will be passed to the driver from the resource provider, e.g. Device Tree. Provide necessary infrastructure to support that case: - use source clock's rate for all timer related calculations - use bus clock to gate/ungate the register interface All devices that use the single clock are kept intact: if only one clock is passed from Device Tree, it will be used for both purposes as before. Signed-off-by:
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Sam Protsenko authored
Now that PMU enablement code was extended for new Exynos SoCs, it doesn't look very cohesive and consistent anymore. Do a bit of renaming, grouping and style changes, to make it look good again. While at it, add quirks documentation as well. No functional change, just a refactoring commit. Signed-off-by:
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Sam Protsenko authored
On new Exynos chips (e.g. Exynos850) new CLUSTERx_NONCPU_OUT register is introduced, where CNT_EN_WDT bit must be enabled to make watchdog counter running. Add corresponding quirk and proper infrastructure to handle that register if the quirk is set. This commit doesn't bring any functional change to existing devices, but merely provides an infrastructure for upcoming chips support. Signed-off-by:
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Sam Protsenko authored
On new Exynos chips (like Exynos850) the MASK_WDT_RESET_REQUEST register is replaced with CLUSTERx_NONCPU_INT_EN, and its mask bit value meaning was reversed: for new register the bit value "1" means "Interrupt enabled", while for MASK_WDT_RESET_REQUEST register "1" means "Mask the interrupt" (i.e. "Interrupt disabled"). Introduce "mask_reset_inv" boolean field in driver data structure; when that field is "true", mask register handling function will invert the value before setting it to the register. This commit doesn't bring any functional change to existing devices, but merely provides an infrastructure for upcoming chips support. Signed-off-by:
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Sam Protsenko authored
The s3c2410wdt_mask_and_disable_reset() function content is bound to be changed further. Prepare it for upcoming changes by splitting into separate "mask reset" and "disable reset" functions. But keep s3c2410wdt_mask_and_disable_reset() function present as a facade. This commit doesn't bring any functional change to existing devices, but merely provides an infrastructure for upcoming chips support. Signed-off-by:
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Sam Protsenko authored
On new Exynos chips (e.g. Exynos850 and Exynos9) the AUTOMATIC_WDT_RESET_DISABLE register was removed, and its value can be thought of as "always 0x0". Add correspondig quirk bit, so that the driver can omit accessing it if it's not present. This commit doesn't bring any functional change to existing devices, but merely provides an infrastructure for upcoming chips support. Signed-off-by:
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Sam Protsenko authored
When "tmr_atboot" module param is set, the watchdog is started in driver's probe. In that case, also set WDOG_HW_RUNNING bit to let watchdog core driver know it's running. This way watchdog core can kick the watchdog for us (if CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED option is enabled), until user space takes control. WDOG_HW_RUNNING bit must be set before registering the watchdog. So the "tmr_atboot" handling code is moved before watchdog registration, to avoid performing the same check twice. This is also logical because WDOG_HW_RUNNING bit makes WDT core expect actually running watchdog. Signed-off-by:
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Sam Protsenko authored
Driver can't work properly if there no valid timeout was found in s3c2410wdt_set_heartbeat(). Ideally, that function should be reworked in a way that it's always able to find some valid timeout. As a temporary solution let's for now just fail the driver probe in case the valid timeout can't be found in s3c2410wdt_set_heartbeat() function. Signed-off-by:
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Sam Protsenko authored
Exynos850 SoC has two CPU clusters: - cluster 0: contains CPUs #0, #1, #2, #3 - cluster 1: contains CPUs #4, #5, #6, #7 Each cluster has its own dedicated watchdog timer. Those WDT instances are controlled using different bits in PMU registers, new "samsung,index" property is added to tell the driver which bits to use for defined watchdog node. Also on Exynos850 the peripheral clock and the source clock are two different clocks. Provide a way to specify two clocks in watchdog device tree node. Signed-off-by:
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Sam Protsenko authored
Exynos7 watchdog driver is clearly indicating that its dts node must define syscon phandle property. That was probably forgotten, so add it. Signed-off-by:
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AaeonIot authored
This adds watchdog support the Fintek F81966 Super I/O chip. Testing was done on the Aaeon SSE-OPTI Signed-off-by:
AaeonIot <sophiehu@aaeon.com.tw> Signed-off-by:
Chia-Lin Kao (AceLan) <acelan.kao@canonical.com> Reviewed-by:
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Kevin Hilman authored
Enable CONFIG_MEDIATEK_WATCHDOG when ARCH_MEDIATEK is enabled. On some platforms (e.g. mt8183-pumpkin), watchdog is enabled by bootloader, so kernel driver needs to be enabled to avoid watchdog firing and causing reboot part way through kernel boot. Signed-off-by:
Kevin Hilman <khilman@baylibre.com> Reviewed-by:
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- 26 Dec, 2021 4 commits
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Linus Torvalds authored
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds authored
Pull x86 fixes from Borislav Petkov: - Prevent potential undefined behavior due to shifting pkey constants into the sign bit - Move the EFI memory reservation code *after* the efi= cmdline parsing has happened - Revert two commits which turned out to be the wrong direction to chase when accommodating early memblock reservations consolidation and command line parameters parsing * tag 'x86_urgent_for_v5.16_rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/pkey: Fix undefined behaviour with PKRU_WD_BIT x86/boot: Move EFI range reservation after cmdline parsing Revert "x86/boot: Pull up cmdline preparation and early param parsing" Revert "x86/boot: Mark prepare_command_line() __init"
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds authored
Pull objtool fixes from Borislav Petkov: - Prevent clang from reordering the reachable annotation in an inline asm statement without inputs - Fix objtool builds on non-glibc systems due to undefined __always_inline * tag 'objtool_urgent_for_v5.16_rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: compiler.h: Fix annotation macro misplacement with Clang uapi: Fix undefined __always_inline on non-glibc systems
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git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrlLinus Torvalds authored
Pull pin control fixes from Linus Walleij: "Some hopefully final pin control fixes for the v5.16 kernel: - Fix an out-of-bounds bug in the Mediatek driver - Fix an init order bug in the Broadcom BCM2835 driver - Fix a GPIO offset bug in the STM32 driver" * tag 'pinctrl-v5.16-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: pinctrl: stm32: consider the GPIO offset to expose all the GPIO lines pinctrl: bcm2835: Change init order for gpio hogs pinctrl: mediatek: fix global-out-of-bounds issue
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- 25 Dec, 2021 1 commit
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Linus Torvalds authored
Merge tag 'hwmon-for-v5.16-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging Pull hwmon fixes from Guenter Roeck: "A couple of lm90 driver fixes. None of them are critical, but they should nevertheless be fixed" * tag 'hwmon-for-v5.16-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging: hwmon: (lm90) Do not report 'busy' status bit as alarm hwmom: (lm90) Fix citical alarm status for MAX6680/MAX6681 hwmon: (lm90) Drop critical attribute support for MAX6654 hwmon: (lm90) Prevent integer overflow/underflow in hysteresis calculations hwmon: (lm90) Fix usage of CONFIG2 register in detect function
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