1. 28 Sep, 2015 24 commits
  2. 27 Sep, 2015 16 commits
    • Linus Torvalds's avatar
      Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus · 097f70b3
      Linus Torvalds authored
      Pull MIPS fixes from Ralf Baechle:
       - Properly setup irq handling for ATH79 platforms
       - Fix bootmem mapstart calculation for contiguous maps
       - Handle little endian and older CPUs correct in BPF
       - Fix console for Fulong 2E systems
       - Handle FTLB correctly on R6 CPUs
       - Fixes for CM, GIC and MAAR support code
      
      * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
        MIPS: Initialise MAARs on secondary CPUs
        MIPS: print MAAR configuration during boot
        MIPS: mm: compile maar_init unconditionally
        irqchip: mips-gic: Fix pending & mask reads for MIPS64 with 32b GIC.
        irqchip: mips-gic: Convert CPU numbers to VP IDs.
        MIPS: CM: Provide a function to map from CPU to VP ID.
        MIPS: Fix FTLB detection for R6
        MIPS: cpu-features: Add cpu_has_ftlb
        MIPS: ATH79: Add irq chip ar7240-misc-intc
        MIPS: ATH79: Set missing irq ack handler for ar7100-misc-intc irq chip
        MIPS: BPF: Fix build on pre-R2 little endian CPUs
        MIPS: BPF: Avoid unreachable code on little endian
        MIPS: bootmem: Fix mapstart calculation for contiguous maps
        MIPS: Fix console output for Fulong2e system
      097f70b3
    • Linus Torvalds's avatar
      Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip · e3be4266
      Linus Torvalds authored
      Pull perf fixes from Thomas Gleixner:
       "Another pile of fixes for perf:
      
         - Plug overflows and races in the core code
      
         - Sanitize the flow of the perf syscall so we error out before
           handling the more complex and hard to undo setups
      
         - Improve and fix Broadwell and Skylake hardware support
      
         - Revert a fix which broke what it tried to fix in perf tools
      
         - A couple of smaller fixes in various places of perf tools"
      
      * 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
        perf tools: Fix copying of /proc/kcore
        perf intel-pt: Remove no_force_psb from documentation
        perf probe: Use existing routine to look for a kernel module by dso->short_name
        perf/x86: Change test_aperfmperf() and test_intel() to static
        tools lib traceevent: Fix string handling in heterogeneous arch environments
        perf record: Avoid infinite loop at buildid processing with no samples
        perf: Fix races in computing the header sizes
        perf: Fix u16 overflows
        perf: Restructure perf syscall point of no return
        perf/x86/intel: Fix Skylake FRONTEND MSR extrareg mask
        perf/x86/intel/pebs: Add PEBS frontend profiling for Skylake
        perf/x86/intel: Make the CYCLE_ACTIVITY.* constraint on Broadwell more specific
        perf tools: Bool functions shouldn't return -1
        tools build: Add test for presence of __get_cpuid() gcc builtin
        tools build: Add test for presence of numa_num_possible_cpus() in libnuma
        Revert "perf symbols: Fix mismatched declarations for elf_getphdrnum"
        perf stat: Fix per-pkg event reporting bug
      e3be4266
    • Linus Torvalds's avatar
      Merge branch 'sched-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip · 73f479b2
      Linus Torvalds authored
      Pull scheduler fix from Thomas Gleixner:
       "A single bug fix for the scheduler to prevent dequeueing of the idle
        task when setting the cpus allowed mask"
      
      * 'sched-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
        sched: Fix crash trying to dequeue/enqueue the idle thread
      73f479b2
    • Linus Torvalds's avatar
      Merge branch 'locking-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip · fc11a9c5
      Linus Torvalds authored
      Pull locking fix from Thomas Gleixner:
       "A single bugfix for lockdep to preserve the pinning counter when
        rebuilding the lock stack"
      
      * 'locking-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
        locking/lockdep: Fix hlock->pin_count reset on lock stack rebuilds
      fc11a9c5
    • Paul Burton's avatar
      MIPS: Initialise MAARs on secondary CPUs · e060f6ed
      Paul Burton authored
      MAARs should be initialised on each CPU (or rather, core) in the system
      in order to achieve consistent behaviour & performance. Previously they
      have only been initialised on the boot CPU which leads to performance
      problems if tasks are later scheduled on a secondary CPU, particularly
      if those tasks make use of unaligned vector accesses where some CPUs
      don't handle any cases in hardware for non-speculative memory regions.
      Fix this by recording the MAAR configuration from the boot CPU and
      applying it to secondary CPUs as part of their bringup.
      Reported-by: default avatarDoug Gilmore <doug.gilmore@imgtec.com>
      Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Cc: Rusty Russell <rusty@rustcorp.com.au>
      Cc: Steven J. Hill <Steven.Hill@imgtec.com>
      Cc: Andrew Bresticker <abrestic@chromium.org>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: David Hildenbrand <dahi@linux.vnet.ibm.com>
      Cc: linux-kernel@vger.kernel.org
      Cc: Aaro Koskinen <aaro.koskinen@iki.fi>
      Cc: James Hogan <james.hogan@imgtec.com>
      Cc: Ingo Molnar <mingo@kernel.org>
      Cc: Markos Chandras <markos.chandras@imgtec.com>
      Cc: Hemmo Nieminen <hemmo.nieminen@iki.fi>
      Cc: Alex Smith <alex.smith@imgtec.com>
      Cc: Peter Zijlstra (Intel) <peterz@infradead.org>
      Patchwork: https://patchwork.linux-mips.org/patch/11239/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      e060f6ed
    • Paul Burton's avatar
      MIPS: print MAAR configuration during boot · 651ca7f4
      Paul Burton authored
      Verifying that the MAAR configuration is as expected is useful when
      debugging the performance of a system. Print out the memory regions
      configured via MAAR along with their attributes.
      Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Cc: Steven J. Hill <Steven.Hill@imgtec.com>
      Cc: David Hildenbrand <dahi@linux.vnet.ibm.com>
      Cc: linux-kernel@vger.kernel.org
      Cc: Peter Zijlstra (Intel) <peterz@infradead.org>
      Patchwork: https://patchwork.linux-mips.org/patch/11238/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      651ca7f4
    • Paul Burton's avatar
      MIPS: mm: compile maar_init unconditionally · def3ab5d
      Paul Burton authored
      maar_init was previously only compiled when CONFIG_NEED_MULTIPLE_NODES
      was not set, which has been fine since it is only called from the
      standard implementation of mem_init which has the same condition. In
      preparation for calling it from the SMP startup code on secondary CPUs,
      move maar_init outside of the #ifndef such that it is always compiled.
      Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
      Cc: Markos Chandras <markos.chandras@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Cc: Steven J. Hill <Steven.Hill@imgtec.com>
      Cc: David Hildenbrand <dahi@linux.vnet.ibm.com>
      Cc: linux-kernel@vger.kernel.org
      Cc: Ingo Molnar <mingo@kernel.org>
      Patchwork: https://patchwork.linux-mips.org/patch/11237/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      def3ab5d
    • Paul Burton's avatar
      irqchip: mips-gic: Fix pending & mask reads for MIPS64 with 32b GIC. · d77d5ac9
      Paul Burton authored
      gic_handle_shared_int reads the GIC interrupt pending & mask registers
      directly into a bitmap, which is defined as an array of unsigned longs.
      The GIC pending registers may be 32 bits wide if the CM is older than
      CM3, regardless of the bit width of the CPU, but for MIPS64 kernels
      the unsigned longs in the bitmap will be 64 bits wide. In this case we
      need to perform 2 x 32 bit reads per 64 bit unsigned long in order to
      avoid missing interrupts.
      Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
      Acked-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Cc: linux-mips@linux-mips.org
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Jason Cooper <jason@lakedaemon.net>
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/11213/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      d77d5ac9
    • Paul Burton's avatar
      irqchip: mips-gic: Convert CPU numbers to VP IDs. · ab41f6c8
      Paul Burton authored
      Make use of the mips_cm_vp_id function to convert from Linux CPU numbers
      to the VP IDs used by hardware, which are not identical in all systems.
      Without doing so we map interrupts to incorrect VP(E)s.
      Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
      Acked-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Cc: linux-mips@linux-mips.org
      Cc: Paul Burton <paul.burton@imgtec.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Jason Cooper <jason@lakedaemon.net>
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/11212/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      ab41f6c8
    • Paul Burton's avatar
      MIPS: CM: Provide a function to map from CPU to VP ID. · 7573b94e
      Paul Burton authored
      The VP ID of a given CPU may not match up with the CPU number used by
      Linux. For example, if the width of the VP part of the VP ID is wider
      than log2(number of VPs per core) and the system has multiple cores then
      this will be the case. Alternatively, if a pre-r6 system implements the
      MT ASE with multiple VPEs per core and Linux is built without support
      for the MT ASE then the numbers won't match up either. Provide a
      function to convert from CPU number to VP ID.
      Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
      Acked-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Cc: linux-mips@linux-mips.org
      Cc: linux-kernel@vger.kernel.org
      Cc: James Hogan <james.hogan@imgtec.com>
      Cc: Markos Chandras <markos.chandras@imgtec.com>
      Patchwork: https://patchwork.linux-mips.org/patch/11211/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      7573b94e
    • Linus Torvalds's avatar
      Linux 4.3-rc3 · 9ffecb10
      Linus Torvalds authored
      9ffecb10
    • Linus Torvalds's avatar
      Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip · 162e6df4
      Linus Torvalds authored
      Pull x86 fixes from Thomas Gleixner:
       "Two bugfixes from Andy addressing at least some of the subtle NMI
        related wreckage which has been reported by Sasha Levin"
      
      * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
        x86/nmi/64: Fix a paravirt stack-clobbering bug in the NMI code
        x86/paravirt: Replace the paravirt nop with a bona fide empty function
      162e6df4
    • Linus Torvalds's avatar
      Merge branch 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip · 5a6bdf06
      Linus Torvalds authored
      Pull irq fix from Thomass Gleixner:
       "A bugfix for the atmel aic5 irq chip driver which caches the wrong
        data and thereby breaking resume"
      
      * 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
        irqchip/atmel-aic5: Use per chip mask caches in mask/unmask()
      5a6bdf06
    • Linus Torvalds's avatar
      Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm · c905929a
      Linus Torvalds authored
      Pull ARM fixes from Russell King:
       "Just two fixes: wire up the new system calls added during the last
        merge window, and fix another user access site"
      
      * 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
        ARM: alignment: fix alignment handling for uaccess changes
        ARM: wire up new syscalls
      c905929a
    • Linus Torvalds's avatar
      Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc · 685b5f1d
      Linus Torvalds authored
      Pull ARM SoC fixes from Olof Johansson:
       "Our first real batch of fixes this release cycle.  Nothing really
        concerning, and diffstat is a bit inflated due to some DT contents
        moving around on STi platforms.
      
        There's a collection of them here:
      
         - A fixup for a build breakage that hits on arm64 allmodconfig in
           QCOM SCM firmware drivers
         - MMC fixes for OMAP that had quite a bit of breakage this merge
           window.
         - Misc build/warning fixes on PXA and OMAP
         - A couple of minor fixes for Beagleboard X15 which is now starting
           to see a few more users in the wild"
      
      * tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (31 commits)
        ARM: sti: dt: adapt DT to fix probe/bind issues in DRM driver
        ARM: dts: fix omap2+ address translation for pbias
        firmware: qcom: scm: Add function stubs for ARM64
        ARM: dts: am57xx-beagle-x15: use palmas-usb for USB2
        ARM: omap2plus_defconfig: enable GPIO_PCA953X
        ARM: dts: omap5-uevm.dts: fix i2c5 pinctrl offsets
        ARM: OMAP2+: AM43XX: Enable autoidle for clks in am43xx_init_late
        ARM: dts: am57xx-beagle-x15: Update Phy supplies
        ARM: pxa: balloon3: Fix build error
        ARM: dts: Fixup model name for HP t410 dts
        ARM: dts: DRA7: fix a typo in ethernet
        ARM: omap2plus_defconfig: make PCF857x built-in
        ARM: dts: Use ti,pbias compatible string for pbias
        ARM: OMAP5: Cleanup options for SoC only build
        ARM: DRA7: Select missing options for SoC only build
        ARM: OMAP2+: board-generic: Remove stale of_irq macros
        ARM: OMAP4+: PM: erratum is used by OMAP5 and DRA7 as well
        ARM: dts: omap3-igep: Move eth IRQ pinmux to IGEPv2 common dtsi
        ARM: dts: am57xx-beagle-x15: Add wakeup irq for mcp79410
        ARM: dts: am335x-phycore-som: Fix mpu voltage
        ...
      685b5f1d
    • Linus Torvalds's avatar
      Merge branch 'for-next' of git://git.samba.org/sfrench/cifs-2.6 · 69ea8b85
      Linus Torvalds authored
      Pull CIFS fixes from Steve French:
       "Four fixes from testing at the recent SMB3 Plugfest including two
        important authentication ones (one fixes authentication problems to
        some popular servers when clock times differ more than two hours
        between systems, the other fixes Kerberos authentication for SMB3)"
      
      * 'for-next' of git://git.samba.org/sfrench/cifs-2.6:
        fix encryption error checks on mount
        [SMB3] Fix sec=krb5 on smb3 mounts
        cifs: use server timestamp for ntlmv2 authentication
        disabling oplocks/leases via module parm enable_oplocks broken for SMB3
      69ea8b85