1. 18 Dec, 2019 2 commits
    • Paul Burton's avatar
      MIPS: BPF: Disable MIPS32 eBPF JIT · f8fffebd
      Paul Burton authored
      Commit 716850ab ("MIPS: eBPF: Initial eBPF support for MIPS32
      architecture.") enabled our eBPF JIT for MIPS32 kernels, whereas it has
      previously only been availailable for MIPS64. It was my understanding at
      the time that the BPF test suite was passing & JITing a comparable
      number of tests to our cBPF JIT [1], but it turns out that was not the
      case.
      
      The eBPF JIT has a number of problems on MIPS32:
      
      - Most notably various code paths still result in emission of MIPS64
        instructions which will cause reserved instruction exceptions & kernel
        panics when run on MIPS32 CPUs.
      
      - The eBPF JIT doesn't account for differences between the O32 ABI used
        by MIPS32 kernels versus the N64 ABI used by MIPS64 kernels. Notably
        arguments beyond the first 4 are passed on the stack in O32, and this
        is entirely unhandled when JITing a BPF_CALL instruction. Stack space
        must be reserved for arguments even if they all fit in registers, and
        the callee is free to assume that stack space has been reserved for
        its use - with the eBPF JIT this is not the case, so calling any
        function can result in clobbering values on the stack & unpredictable
        behaviour. Function arguments in eBPF are always 64-bit values which
        is also entirely unhandled - the JIT still uses a single (32-bit)
        register per argument. As a result all function arguments are always
        passed incorrectly when JITing a BPF_CALL instruction, leading to
        kernel crashes or strange behavior.
      
      - The JIT attempts to bail our on use of ALU64 instructions or 64-bit
        memory access instructions. The code doing this at the start of
        build_one_insn() incorrectly checks whether BPF_OP() equals BPF_DW,
        when it should really be checking BPF_SIZE() & only doing so when
        BPF_CLASS() is one of BPF_{LD,LDX,ST,STX}. This results in false
        positives that cause more bailouts than intended, and that in turns
        hides some of the problems described above.
      
      - The kernel's cBPF->eBPF translation makes heavy use of 64-bit eBPF
        instructions that the MIPS32 eBPF JIT bails out on, leading to most
        cBPF programs not being JITed at all.
      
      Until these problems are resolved, revert the enabling of the eBPF JIT
      on MIPS32 done by commit 716850ab ("MIPS: eBPF: Initial eBPF support
      for MIPS32 architecture.").
      
      Note that this does not undo the changes made to the eBPF JIT by that
      commit, since they are a useful starting point to providing MIPS32
      support - they're just not nearly complete.
      
      [1] https://lore.kernel.org/linux-mips/MWHPR2201MB13583388481F01A422CE7D66D4410@MWHPR2201MB1358.namprd22.prod.outlook.com/Signed-off-by: default avatarPaul Burton <paulburton@kernel.org>
      Fixes: 716850ab ("MIPS: eBPF: Initial eBPF support for MIPS32 architecture.")
      Cc: Daniel Borkmann <daniel@iogearbox.net>
      Cc: Hassan Naveed <hnaveed@wavecomp.com>
      Cc: Tony Ambardar <itugrok@yahoo.com>
      Cc: bpf@vger.kernel.org
      Cc: netdev@vger.kernel.org
      Cc: <stable@vger.kernel.org> # v5.2+
      Cc: linux-mips@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      f8fffebd
    • Jouni Hogander's avatar
      MIPS: Prevent link failure with kcov instrumentation · a4a38931
      Jouni Hogander authored
      __sanitizer_cov_trace_pc() is not linked in and causing link
      failure if KCOV_INSTRUMENT is enabled. Fix this by disabling
      instrumentation for compressed image.
      Signed-off-by: default avatarJouni Hogander <jouni.hogander@unikie.com>
      Signed-off-by: default avatarPaul Burton <paulburton@kernel.org>
      Cc: Lukas Bulwahn <lukas.bulwahn@gmail.com>
      Cc: linux-mips@vger.kernel.org
      a4a38931
  2. 02 Dec, 2019 2 commits
  3. 27 Nov, 2019 1 commit
    • Guenter Roeck's avatar
      MIPS: Fix boot on Fuloong2 systems · 87f67cc4
      Guenter Roeck authored
      Commit 268a2d60 ("MIPS: Loongson64: Rename CPU TYPES") changed
      Kconfig symbols as follows:
      	CPU_LOONGSON2 to CPU_LOONGSON2EF
      	CPU_LOONGSON3 to CPU_LOONGSON64
      	SYS_HAS_CPU_LOONGSON3 to SYS_HAS_CPU_LOONGSON64
      
      It did not touch SYS_HAS_CPU_LOONGSON2E or SYS_HAS_CPU_LOONGSON2F.
      However, the patch changed a conditional from
      
       #if defined(CONFIG_SYS_HAS_CPU_LOONGSON2E) || \
           defined(CONFIG_SYS_HAS_CPU_LOONGSON2F)
      
      to
      
       #if defined(CONFIG_SYS_HAS_CPU_LOONGSON2EF)
      
      SYS_HAS_CPU_LOONGSON2EF does not exist, resulting in boot failures
      with the qemu fulong2e emulation. Revert to the original code.
      
      Fixes: 268a2d60 ("MIPS: Loongson64: Rename CPU TYPES")
      Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
      Signed-off-by: default avatarGuenter Roeck <linux@roeck-us.net>
      Reviewed-by: default avatarPhilippe Mathieu-Daudé <f4bug@amsat.org>
      Signed-off-by: default avatarPaul Burton <paulburton@kernel.org>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: James Hogan <jhogan@kernel.org>
      Cc: linux-mips@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      87f67cc4
  4. 26 Nov, 2019 1 commit
  5. 23 Nov, 2019 2 commits
    • Thomas Bogendoerfer's avatar
      MIPS: SGI-IP27: Enable ethernet phy on second Origin 200 module · a8d0f11e
      Thomas Bogendoerfer authored
      PROM only enables ethernet PHY on first Origin 200 module, so we must
      do it ourselves for the second module.
      Signed-off-by: default avatarThomas Bogendoerfer <tbogendoerfer@suse.de>
      Signed-off-by: default avatarPaul Burton <paulburton@kernel.org>
      Cc: Jakub Kicinski <jakub.kicinski@netronome.com>
      Cc: Jonathan Corbet <corbet@lwn.net>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Paul Burton <paul.burton@mips.com>
      Cc: James Hogan <jhogan@kernel.org>
      Cc: Lee Jones <lee.jones@linaro.org>
      Cc: David S. Miller <davem@davemloft.net>
      Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
      Cc: Alessandro Zummo <a.zummo@towertech.it>
      Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Jiri Slaby <jslaby@suse.com>
      Cc: linux-doc@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      Cc: linux-mips@vger.kernel.org
      Cc: netdev@vger.kernel.org
      Cc: linux-rtc@vger.kernel.org
      Cc: linux-serial@vger.kernel.org
      a8d0f11e
    • Thomas Bogendoerfer's avatar
      MIPS: PCI: Fix fake subdevice ID for IOC3 · 29b261ff
      Thomas Bogendoerfer authored
      Generation of fake subdevice ID had vendor and device ID swapped.
      Signed-off-by: default avatarThomas Bogendoerfer <tbogendoerfer@suse.de>
      Signed-off-by: default avatarPaul Burton <paulburton@kernel.org>
      Cc: Jakub Kicinski <jakub.kicinski@netronome.com>
      Cc: Jonathan Corbet <corbet@lwn.net>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Paul Burton <paul.burton@mips.com>
      Cc: James Hogan <jhogan@kernel.org>
      Cc: Lee Jones <lee.jones@linaro.org>
      Cc: David S. Miller <davem@davemloft.net>
      Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
      Cc: Alessandro Zummo <a.zummo@towertech.it>
      Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Jiri Slaby <jslaby@suse.com>
      Cc: linux-doc@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      Cc: linux-mips@vger.kernel.org
      Cc: netdev@vger.kernel.org
      Cc: linux-rtc@vger.kernel.org
      Cc: linux-serial@vger.kernel.org
      29b261ff
  6. 22 Nov, 2019 6 commits
    • Zhou Yanjie's avatar
      MIPS: Ingenic: Disable abandoned HPTLB function. · b02efeb0
      Zhou Yanjie authored
      JZ4760/JZ4770/JZ4775/X1000/X1500 has an abandoned huge page tlb,
      this mode is not compatible with the MIPS standard, it will cause
      tlbmiss and into an infinite loop (line 21 in the tlb-funcs.S)
      when starting the init process. write 0xa9000000 to cp0 register 5
      sel 4 to disable this function to prevent getting stuck. Confirmed
      by Ingenic, this operation will not adversely affect processors
      without HPTLB function.
      Signed-off-by: default avatarZhou Yanjie <zhouyanjie@zoho.com>
      Acked-by: default avatarPaul Cercueil <paul@crapouillou.net>
      Signed-off-by: default avatarPaul Burton <paulburton@kernel.org>
      Cc: linux-mips@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      Cc: ralf@linux-mips.org
      Cc: jhogan@kernel.org
      Cc: jiaxun.yang@flygoat.com
      Cc: gregkh@linuxfoundation.org
      Cc: malat@debian.org
      Cc: tglx@linutronix.de
      Cc: chenhc@lemote.com
      b02efeb0
    • Thomas Bogendoerfer's avatar
      MIPS: PCI: remember nasid changed by set interrupt affinity · 37640adb
      Thomas Bogendoerfer authored
      When changing interrupt affinity remember the possible changed nasid,
      otherwise an interrupt deactivate/activate sequence will incorrectly
      setup interrupt.
      
      Fixes: e6308b6d ("MIPS: SGI-IP27: abstract chipset irq from bridge")
      Signed-off-by: default avatarThomas Bogendoerfer <tbogendoerfer@suse.de>
      Signed-off-by: default avatarPaul Burton <paulburton@kernel.org>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: James Hogan <jhogan@kernel.org>
      Cc: linux-mips@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      37640adb
    • Thomas Bogendoerfer's avatar
      MIPS: SGI-IP27: Fix crash, when CPUs are disabled via nr_cpus parameter · e3d765a9
      Thomas Bogendoerfer authored
      If number of CPUs are limited by the kernel commandline parameter nr_cpus
      assignment of interrupts accourding to numa rules might not be possibe.
      As a fallback use one of the online CPUs as interrupt destination.
      
      Fixes: 69a07a41 ("MIPS: SGI-IP27: rework HUB interrupts")
      Signed-off-by: default avatarThomas Bogendoerfer <tbogendoerfer@suse.de>
      Signed-off-by: default avatarPaul Burton <paulburton@kernel.org>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: James Hogan <jhogan@kernel.org>
      Cc: linux-mips@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      e3d765a9
    • Mike Rapoport's avatar
      mips: add support for folded p4d page tables · 2bee1b58
      Mike Rapoport authored
      Implement primitives necessary for the 4th level folding, add walks of p4d
      level where appropriate, replace 5leve-fixup.h with pgtable-nop4d.h and
      drop usage of __ARCH_USE_5LEVEL_HACK.
      Signed-off-by: default avatarMike Rapoport <rppt@linux.ibm.com>
      Signed-off-by: default avatarPaul Burton <paulburton@kernel.org>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: James Hogan <jhogan@kernel.org>
      Cc: linux-mips@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      Cc: linux-mm@kvack.org
      Cc: Mike Rapoport <rppt@kernel.org>
      2bee1b58
    • Mike Rapoport's avatar
      mips: drop __pXd_offset() macros that duplicate pXd_index() ones · 31168f03
      Mike Rapoport authored
      The __pXd_offset() macros are identical to the pXd_index() macros and there
      is no point to keep both of them. All architectures define and use
      pXd_index() so let's keep only those to make mips consistent with the rest
      of the kernel.
      Signed-off-by: default avatarMike Rapoport <rppt@linux.ibm.com>
      Signed-off-by: default avatarPaul Burton <paulburton@kernel.org>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: James Hogan <jhogan@kernel.org>
      Cc: linux-mips@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      Cc: linux-mm@kvack.org
      Cc: Mike Rapoport <rppt@kernel.org>
      31168f03
    • Mike Rapoport's avatar
      mips: fix build when "48 bits virtual memory" is enabled · 3ed6751b
      Mike Rapoport authored
      With CONFIG_MIPS_VA_BITS_48=y the build fails miserably:
      
        CC      arch/mips/kernel/asm-offsets.s
      In file included from arch/mips/include/asm/pgtable.h:644,
                       from include/linux/mm.h:99,
                       from arch/mips/kernel/asm-offsets.c:15:
      include/asm-generic/pgtable.h:16:2: error: #error CONFIG_PGTABLE_LEVELS is not consistent with __PAGETABLE_{P4D,PUD,PMD}_FOLDED
       #error CONFIG_PGTABLE_LEVELS is not consistent with __PAGETABLE_{P4D,PUD,PMD}_FOLDED
        ^~~~~
      include/asm-generic/pgtable.h:390:28: error: unknown type name 'p4d_t'; did you mean 'pmd_t'?
       static inline int p4d_same(p4d_t p4d_a, p4d_t p4d_b)
                                  ^~~~~
                                  pmd_t
      
      [ ... more such errors ... ]
      
      scripts/Makefile.build:99: recipe for target 'arch/mips/kernel/asm-offsets.s' failed
      make[2]: *** [arch/mips/kernel/asm-offsets.s] Error 1
      
      This happens because when CONFIG_MIPS_VA_BITS_48 enables 4th level of the
      page tables, but neither pgtable-nop4d.h nor 5level-fixup.h are included to
      cope with the 5th level.
      
      Replace #ifdef conditions around includes of the pgtable-nop{m,u}d.h with
      explicit CONFIG_PGTABLE_LEVELS and add include of 5level-fixup.h for the
      case when CONFIG_PGTABLE_LEVELS==4
      Signed-off-by: default avatarMike Rapoport <rppt@linux.ibm.com>
      Signed-off-by: default avatarPaul Burton <paulburton@kernel.org>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: James Hogan <jhogan@kernel.org>
      Cc: linux-mips@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      Cc: linux-mm@kvack.org
      Cc: Mike Rapoport <rppt@kernel.org>
      3ed6751b
  7. 11 Nov, 2019 9 commits
  8. 04 Nov, 2019 1 commit
  9. 01 Nov, 2019 10 commits
  10. 31 Oct, 2019 1 commit
  11. 24 Oct, 2019 5 commits
    • Thomas Bogendoerfer's avatar
      MIPS: include: remove unsued header file asm/sgi/sgi.h · 2409839a
      Thomas Bogendoerfer authored
      asm/sgi/sgi.h is unused, time to remove it.
      Signed-off-by: default avatarThomas Bogendoerfer <tbogendoerfer@suse.de>
      Signed-off-by: default avatarPaul Burton <paulburton@kernel.org>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Paul Burton <paul.burton@mips.com>
      Cc: James Hogan <jhogan@kernel.org>
      Cc: linux-mips@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      2409839a
    • Paul Burton's avatar
      MIPS: tlbex: Fix build_restore_pagemask KScratch restore · b42aa3fd
      Paul Burton authored
      build_restore_pagemask() will restore the value of register $1/$at when
      its restore_scratch argument is non-zero, and aims to do so by filling a
      branch delay slot. Commit 0b24cae4 ("MIPS: Add missing EHB in mtc0
      -> mfc0 sequence.") added an EHB instruction (Execution Hazard Barrier)
      prior to restoring $1 from a KScratch register, in order to resolve a
      hazard that can result in stale values of the KScratch register being
      observed. In particular, P-class CPUs from MIPS with out of order
      execution pipelines such as the P5600 & P6600 are affected.
      
      Unfortunately this EHB instruction was inserted in the branch delay slot
      causing the MFC0 instruction which performs the restoration to no longer
      execute along with the branch. The result is that the $1 register isn't
      actually restored, ie. the TLB refill exception handler clobbers it -
      which is exactly the problem the EHB is meant to avoid for the P-class
      CPUs.
      
      Similarly build_get_pgd_vmalloc() will restore the value of $1/$at when
      its mode argument equals refill_scratch, and suffers from the same
      problem.
      
      Fix this by in both cases moving the EHB earlier in the emitted code.
      There's no reason it needs to immediately precede the MFC0 - it simply
      needs to be between the MTC0 & MFC0.
      
      This bug only affects Cavium Octeon systems which use
      build_fast_tlb_refill_handler().
      Signed-off-by: default avatarPaul Burton <paulburton@kernel.org>
      Fixes: 0b24cae4 ("MIPS: Add missing EHB in mtc0 -> mfc0 sequence.")
      Cc: Dmitry Korotin <dkorotin@wavecomp.com>
      Cc: stable@vger.kernel.org # v3.15+
      Cc: linux-mips@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      b42aa3fd
    • Thomas Bogendoerfer's avatar
      MIPS: SGI-IP27: reduce ARC usage to a minimum · e9422427
      Thomas Bogendoerfer authored
      IP27 uses ARC prom only for parsing prom arguments and has a hack
      for IP27 to make the ARC code behave. By introducing config symbol
      ARC_CMDLINE_ONLY IP27 only drags in ARC cmdline parsing and does
      everything else in IP27 specific code.
      Signed-off-by: default avatarThomas Bogendoerfer <tbogendoerfer@suse.de>
      Signed-off-by: default avatarPaul Burton <paulburton@kernel.org>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Paul Burton <paul.burton@mips.com>
      Cc: James Hogan <jhogan@kernel.org>
      Cc: linux-mips@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      e9422427
    • Thomas Bogendoerfer's avatar
      MIPS: arc: use function argument for passing argc/argv to prom_init_cmdline · 7b16831d
      Thomas Bogendoerfer authored
      prom_argc and prom_argv are only used by prom_init_cmdline(), so
      we could pass them directly as function argument.
      Signed-off-by: default avatarThomas Bogendoerfer <tbogendoerfer@suse.de>
      Signed-off-by: default avatarPaul Burton <paulburton@kernel.org>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Paul Burton <paul.burton@mips.com>
      Cc: James Hogan <jhogan@kernel.org>
      Cc: linux-mips@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      7b16831d
    • Thomas Bogendoerfer's avatar
      MIPS: arc: remove unused stuff · cbd09241
      Thomas Bogendoerfer authored
      remove unused _prom_envp and prom_argc macro.
      Signed-off-by: default avatarThomas Bogendoerfer <tbogendoerfer@suse.de>
      Signed-off-by: default avatarPaul Burton <paulburton@kernel.org>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Paul Burton <paul.burton@mips.com>
      Cc: James Hogan <jhogan@kernel.org>
      Cc: linux-mips@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      cbd09241