1. 12 Sep, 2018 1 commit
  2. 10 Sep, 2018 21 commits
  3. 08 Sep, 2018 9 commits
  4. 07 Sep, 2018 4 commits
  5. 06 Sep, 2018 5 commits
    • YueHaibing's avatar
      liquidio CN23XX: Remove set but not used variable 'ring_flag' · ddc4d236
      YueHaibing authored
      Fixes gcc '-Wunused-but-set-variable' warning:
      
      drivers/net/ethernet/cavium/liquidio/cn23xx_vf_device.c: In function 'cn23xx_setup_octeon_vf_device':
      drivers/net/ethernet/cavium/liquidio/cn23xx_vf_device.c:619:20: warning:
       variable 'ring_flag' set but not used [-Wunused-but-set-variable]
      Signed-off-by: default avatarYueHaibing <yuehaibing@huawei.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      ddc4d236
    • Weilin Chang's avatar
      liquidio: Add spoof checking on a VF MAC address · 48875222
      Weilin Chang authored
      1. Provide the API to set/unset the spoof checking feature.
      2. Add a function to periodically provide the count of found
         packets with spoof VF MAC address.
      3. Prevent VF MAC address changing while the spoofchk of the VF is
         on unless the changing MAC address is issued from PF.
      Signed-off-by: default avatarWeilin Chang <weilin.chang@cavium.com>
      Signed-off-by: default avatarFelix Manlunas <felix.manlunas@cavium.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      48875222
    • David S. Miller's avatar
      Merge tag 'mlx5e-updates-2018-09-05' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux · ddc9cc01
      David S. Miller authored
      Saeed Mahameed says:
      
      ====================
      mlx5e-updates-2018-09-05
      
      This series provides updates to mlx5 ethernet driver.
      
      1) Starting with a four patches series to optimize flow counters updates,
      From Vlad Buslov:
      ==============================================
      
      By default mlx5 driver updates cached counters each second. Update function
      consumes noticeable amount of CPU resources. The goal of this patch series
      is to optimize update function.
      
      Investigation revealed following bottlenecks in fs counters
      implementation:
       1) Update code(scheduled each second) iterates over all counters twice.
       (first for finding and deleting counters that are marked for deletion,
       second iteration is for actually updating the counters)
       2) Counters are stored in rb tree. Linear iteration over all rb tree
       elements(rb_next in profiling data) consumed ~65% of time spent in
       update function.
      
      Following optimizations were implemented:
       1) Instead of just marking counters for deletion, store them in
       standalone list. This removes first iteration over whole counters tree.
       2) Store counters in sorted list to optimize traversing them and remove
       calls to rb_next.
      
      First implementation of these changes caused degradation of performance,
      instead of improving it. Investigation revealed that there first cache
      line of struct mlx5_fc is full and adding anything to it causes amount
      of cache misses to double. To mitigate that, following refactorings were
      implemented:
       - Change 'addlist' list type from double linked to single linked. This
       allowes to get free space for one additional pointer that is used to
       store deletion list(optimization 1)
       - Substitute rb tree with idr. Idr is non-intrusive data structure and
       doesn't require adding any new members to struct mlx5_fc. Use free
       space that became available for double linked sorted list that is used
       for traversing all counters. (optimization 2)
      
      Described changes reduced CPU time spent in mlx5_fc_stats_work from 70%
      to 44%. (global perf profile mode)
      ============================================
      
      The rest of the series are misc updates:
      
      2) From Kamal, Move mlx5e_priv_flags into en_ethtool.c, to avoid a
      compilation warning.
      
      3) From Roi Dayan, Move Q counters allocation and drop RQ to init_rx profile
      function to avoid allocating Q counters when not required.
      
      4) From Shay Agroskin, Replace PTP clock lock from RW lock to seq lock.
      Almost double the packet rate when timestamping is active on multiple TX
      queues.
      
      5) From: Natali Shechtman, set ECN for received packets using CQE indication.
      
      6) From: Alaa Hleihel, don't set CHECKSUM_COMPLETE on SCTP packets.
      CHECKSUM_COMPLETE is not applicable to SCTP protocol.
      ====================
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      ddc9cc01
    • David S. Miller's avatar
      Merge branch 'dsa-b53-SerDes-support' · 2002bc32
      David S. Miller authored
      Florian Fainelli says:
      
      ====================
      net: dsa: b53: SerDes support
      
      This patch series adds support for the SerDes found on NorthStar Plus
      (NSP) which allows us to use the SFP port on the BCM958625HR board (and
      other similar designs).
      
      Changes in v3:
      
      - properly hunk the request_threaded_irq() bits into patch #2
      
      Changes in v2:
      
      - migrate to threaded interrupt (Andrew)
      - fixed a case where MLO_AN_FIXED's mac_config would still call into
        the serdes_config callback
      - added an additional check on the phylink interface in mac_config
      - default to ARCH_BCM_NSP instead of ARCH_BCM_IPROC which is really
        the NSP Kconfig bit we want
      ====================
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      2002bc32
    • Florian Fainelli's avatar
      net: dsa: b53: Add SerDes support · 0e01491d
      Florian Fainelli authored
      Add support for the Northstar Plus SerDes which is accessed through a
      special page of the switch. Since this is something that most people
      probably will not want to use, make it a configurable option with a
      default on ARCH_BCM_NSP where it is the most useful currently.
      
      The SerDes supports both SGMII and 1000baseX modes for both lanes, and
      2500baseX for one of the lanes, and is internally looking like a
      seemingly standard MII PHY, except for the few bits that got repurposed.
      Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      0e01491d