- 18 Feb, 2022 19 commits
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Qingqing Zhuo authored
Add vbios table support for DCN 3.1.5. Signed-off-by:
Qingqing Zhuo <qingqing.zhuo@amd.com> Acked-by:
Harry Wentland <Harry.Wentland@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Qingqing Zhuo authored
Add display resource management for DCN 3.1.5. Signed-off-by:
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Qingqing Zhuo authored
Add support for the DMUB firmware for DCN 3.1.5. Signed-off-by:
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Qingqing Zhuo authored
Add irq interfaces for DCN 3.1.5. Signed-off-by:
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Qingqing Zhuo authored
Add GPIO interfaces for DCN 3.1.5. Signed-off-by:
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Qingqing Zhuo authored
Clk and SMU interfaces for DCN 3.1.5. Signed-off-by:
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Qingqing Zhuo authored
Signed-off-by:
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Qingqing Zhuo authored
Add DCN 3.1.5 and DPCS 4.2.2 register headers. Signed-off-by:
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Yifan Zhang authored
This patch is to add mp 13.0.5 header files. v2: update headers Signed-off-by:
Yifan Zhang <yifan1.zhang@amd.com> Reviewed-by:
Huang Rui <ray.huang@amd.com> Signed-off-by:
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Yifan Zhang authored
this patch adds smu_v13_0_5_ppt implementation. Signed-off-by:
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Yifan Zhang authored
this patch updates smc message sequence for smu 13.0.5. Signed-off-by:
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Yifan Zhang authored
This patch is to add smu 13.0.5 driver interface headers. Signed-off-by:
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Yifan Zhang authored
Enabl psp support for psp 13.0.5. Signed-off-by:
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Yifan Zhang authored
this patch adds smuio support for smuio 13.0.10. Signed-off-by:
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Yifan Zhang authored
this patch adds support for nbio 7.3.0. Signed-off-by:
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Boyuan Zhang authored
Enable PG and CG for VCN/JPEG Signed-off-by:
Boyuan Zhang <boyuan.zhang@amd.com> Reviewed-by:
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Boyuan Zhang authored
Load VCN FW, set caps. Signed-off-by:
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Yifan Zhang authored
This patch adds support for sdma 5.2.6. Signed-off-by:
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Chen Gong authored
The GPU reset function of raven2 is not maintained or tested, so it should be very unstable. Now the amdgpu_asic_reset function is added to amdgpu_pmops_suspend, which causes the S3 test of raven2 to fail, so the asic_reset of raven2 is ignored here. Fixes: daf8de08 ("drm/amdgpu: always reset the asic in suspend (v2)") Signed-off-by:
Chen Gong <curry.gong@amd.com> Acked-by:
Mario Limonciello <mario.limonciello@amd.com> Signed-off-by:
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- 17 Feb, 2022 21 commits
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Nathan Chancellor authored
Clang warns: drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_packet_manager_v9.c:267:3: error: implicit conversion from enumeration type 'enum mes_map_queues_extended_engine_sel_enum' to different enumeration type 'enum mes_unmap_queues_extended_engine_sel_enum' [-Werror,-Wenum-conversion] extended_engine_sel__mes_map_queues__sdma0_to_7_sel : ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 1 error generated. Use 'extended_engine_sel__mes_unmap_queues__sdma0_to_7_sel' to eliminate the warning, which is the same numeric value of the proper type. Fixes: 009e9a15 ("drm/amdkfd: navi2x requires extended engines to map and unmap sdma queues") Link: https://github.com/ClangBuiltLinux/linux/issues/1596Signed-off-by:Nathan Chancellor <nathan@kernel.org> Signed-off-by:
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Yifan Zhang authored
this patch adds gc 10.3.6 support. Signed-off-by:
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Yifan Zhang authored
this patch adds support for gmc10. Signed-off-by:
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Yifan Zhang authored
Add below supports: GFX Coarse Grain Clock Gating(CGCG) GFX Coarse grain light sleep/deep sleep(CGLS) GFX Medium Grain Clock Gating(MGCG) GFX Medium Grain light sleep/deep sleep(MGLS) GFX Fine Grain Clock Gating(FGCG) RLC MGLS CP MGLS MMHUB Clock Gating SDMA Clock Gating HDP Clock Gating ATHUB Clock Gating IH Clock Gating GFX Power Gating Signed-off-by:
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Yifan Zhang authored
This patch adds add nv common init for gc 10.3.6. Signed-off-by:
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Alex Deucher authored
When we disable manual clock setting, we need to restore the cclks as well as the gfxclk. Acked-by:
Evan Quan <evan.quan@amd.com> Signed-off-by:
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Tom Rix authored
Clang build fails with amdgpu_ras.c:2416:7: error: variable 'ras_obj' is used uninitialized whenever 'if' condition is true if (adev->in_suspend || amdgpu_in_reset(adev)) { ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ amdgpu_ras.c:2453:6: note: uninitialized use occurs here if (ras_obj->ras_cb) ^~~~~~~ There is a logic error in the error handler's labels. ex/ The sysfs: is the last goto label in the normal code but is the middle of error handler. Rework the error handler. cleanup: is the first error, so it's handler should be last. interrupt: is the second error, it's handler is next. interrupt: handles the failure of amdgpu_ras_interrupt_add_hander() by calling amdgpu_ras_interrupt_remove_handler(). This is wrong, remove() assumes the interrupt has been setup, not torn down by add(). Change the goto label to cleanup. sysfs is the last error, it's handler should be first. sysfs: handles the failure of amdgpu_ras_sysfs_create() by calling amdgpu_ras_sysfs_remove(). But when the create() fails there is nothing added so there is nothing to remove. This error handler is not needed. Remove the error handler and change goto label to interrupt. Fixes: b293e891 ("drm/amdgpu: add helper function to do common ras_late_init/fini (v3)") Reviewed-by:Luben Tuikov <luben.tuikov@amd.com> Signed-off-by:
Tom Rix <trix@redhat.com> Signed-off-by:
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Luben Tuikov authored
Dynamically initialize IP instance attributes. This eliminates bugs stemming from adding new attributes to an IP instance. Cc: Alex Deucher <Alexander.Deucher@amd.com> Reported-by:
Tom StDenis <tom.stdenis@amd.com> Fixes: 4d7ba312 ("drm/amdgpu: Add "harvest" to IP discovery sysfs") Signed-off-by:
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Tom St Denis authored
Needed by umr to detect if ip discovered ASIC is an APU or not. (v2): Remove asic type from packet it's not strictly needed (v3): Correct comment Signed-off-by:
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Mario Limonciello authored
The `program_aspm` callback is already guarded for aspm, but the `enable_aspm` callback doesn't follow the module parameter. Update it to use the helper `amdgpu_device_should_use_aspm`. Reviewed-by:
Lijo Lazar <lijo.lazar@amd.com> Signed-off-by:
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Mario Limonciello authored
Evaluating `pcie_aspm_enabled` as part of driver probe has the implication that if one PCIe bridge with an AMD GPU connected doesn't support ASPM then none of them do. This is an invalid assumption as the PCIe core will configure ASPM for individual PCIe bridges. Create a new helper function that can be called by individual dGPUs to react to the `amdgpu_aspm` module parameter without having negative results for other dGPUs on the PCIe bus. Suggested-by:
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Luben Tuikov authored
Fix this ARM warning: drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c:664:35: warning: format '%ld' expects argument of type 'long int', but argument 4 has type 'size_t' {aka 'unsigned int'} [-Wformat=] Cc: Alex Deucher <Alexander.Deucher@amd.com> Cc: kbuild-all@lists.01.org Cc: linux-kernel@vger.kernel.org Reported-by:kernel test robot <lkp@intel.com> Fixes: a6c40b17 ("drm/amdgpu: Show IP discovery in sysfs") Signed-off-by:
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Mario Limonciello authored
commit 0064b0ce ("drm/amd/pm: enable ASPM by default") enabled ASPM by default but a variety of hardware configurations it turns out that this caused a regression. * PPC64LE hardware does not support ASPM at a hardware level. CONFIG_PCIEASPM is often disabled on these architectures. * Some dGPUs on ALD platforms don't work with ASPM enabled and PCIe subsystem disables it Check with the PCIe subsystem to see that ASPM has been enabled or not. Fixes: 0064b0ce ("drm/amd/pm: enable ASPM by default") Link: https://wiki.raptorcs.com/w/images/a/ad/P9_PHB_version1.0_27July2018_pub.pdf Link: https://gitlab.freedesktop.org/drm/amd/-/issues/1723 Link: https://gitlab.freedesktop.org/drm/amd/-/issues/1739 Link: https://gitlab.freedesktop.org/drm/amd/-/issues/1885 Link: https://gitlab.freedesktop.org/drm/amd/-/issues/1907 Tested-by: koba.ko@canonical.com Reviewed-by:
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yipechai authored
1. Define amdgpu_ras_block_late_init_default in amdgpu_ras.c as .ras_late_init common function, which is called when .ras_late_init of ras block isn't initialized. 2. Remove the code of using amdgpu_ras_block_late_init to initialize .ras_late_init in ras blocks. Signed-off-by:
yipechai <YiPeng.Chai@amd.com> Reviewed-by:
Tao Zhou <tao.zhou1@amd.com> Signed-off-by:
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yipechai authored
Define amdgpu_ras_late_init to call all ras blocks' .ras_late_init. Signed-off-by:
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yipechai authored
1. Move calling ras block instance members from module internal function to the top calling xxx_ras_late_init. 2. Module internal function calls can only use parameter variables of xxx_ras_late_init instead of ras block instance members. Signed-off-by:
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yipechai authored
Remove redundant calls of ras_late_init in mca ras block. Signed-off-by:
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yipechai authored
Remove redundant calls of ras_late_init in mmhub ras block. Signed-off-by:
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yipechai authored
Remove redundant calls of ras_late_init in hdp ras block. Signed-off-by:
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yipechai authored
Modify .ras_late_init function pointer parameter so that it can remove redundant intermediate calls in some ras blocks. Signed-off-by:
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Prike Liang authored
Add 3.1.6 DCE IP and assign relevant sw DM function for the new DCE. Reviewed-by:
Leo Li <sunpeng.li@amd.com> Signed-off-by:
Prike Liang <Prike.Liang@amd.com> Reviewed-by:
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