Add "dsd-path" property, which is used for ak4497 codec
to select the DSD input pin.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Link: https://lore.kernel.org/r/1600178220-28973-1-git-send-email-shengjiu.wang@nxp.comSigned-off-by: Mark Brown <broonie@kernel.org>

Add a property to indicate if the device is to go into a High-z state on
the Tx ASI output pins when the device is idle.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Link: https://lore.kernel.org/r/20200915190606.1744-3-dmurphy@ti.comSigned-off-by: Mark Brown <broonie@kernel.org>

Add code to allow the ASI Tx output to be placed into High-z mode
during unused ASI cycles.  This allows for other devices that may be on
the bus to drive the ASI out. By default the 320adcx140 sends 0's for
unused cycles.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Link: https://lore.kernel.org/r/20200915190606.1744-4-dmurphy@ti.comSigned-off-by: Mark Brown <broonie@kernel.org>

The lpass-sc7180 driver can be built as a module but is lacking a
MODULE_DEVICE_TABLE.  This means it won't auto-load.  Fix this
oversight.

Fixes: 24caf8d9 ("ASoC: qcom: lpass-sc7180: Add platform driver for lpass audio")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20200916111545.1.I4c3758817d94c433bafeac344a395e21ea6657e3@changeidSigned-off-by: Mark Brown <broonie@kernel.org>

SOF will support tgl-h and tgl-lp in different FW binaries due to
hardware difference, so create another dev_desc entry with FW name
of sof-tgl-h.ri and dsp_desc named tglh_chip_info for tgl-h.

Fixes: c8d2e2bf ("ASoC: SOF: Intel: add PCI IDs for ICL-H and TGL-H")
Signed-off-by: Rander Wang <rander.wang@intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Link: https://lore.kernel.org/r/20200917103609.2559916-1-kai.vehmanen@linux.intel.comSigned-off-by: Mark Brown <broonie@kernel.org>

To avoid the actual PLL settings to differ from the state expected by
the clock driver, the codec should only be fully reset before the clocks
are registered. But we also need to ensure that the software reset
happens at all before clock registration, as not all boards have a reset
GPIO.

Move the software reset from aic32x4_component_probe() to
aic32x4_probe() and reorder the reset and registration sequence:

1. Reset via GPIO (if available)
2. Reset via software
3. Register component
4. Register clocks

Note that aic32x4_component_probe() is only called after aic32x4_probe()
has finished, so the reset in aic32x4_component_probe() was happening too
late.
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Link: https://lore.kernel.org/r/20200902133043.19504-2-matthias.schiffer@ew.tq-group.comSigned-off-by: Mark Brown <broonie@kernel.org>

The regulators need to be disabled in the aic32x4_register_clocks()
failure case as well.

Fixes: 9d4befff ("ASoC: codec: tlv3204: Moving GPIO reset and add ADC reset")
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Link: https://lore.kernel.org/r/20200902133043.19504-1-matthias.schiffer@ew.tq-group.comSigned-off-by: Mark Brown <broonie@kernel.org>

GPIO_ACTIVE_x flags are not correct in the context of interrupt flags.
These are simple defines so they could be used in DTS but they will not
have the same meaning:
1. GPIO_ACTIVE_HIGH = 0 = IRQ_TYPE_NONE
2. GPIO_ACTIVE_LOW  = 1 = IRQ_TYPE_EDGE_RISING

Correct the interrupt flags, assuming the author of the code wanted some
logical behavior behind the name "ACTIVE_xxx", this is:
  ACTIVE_HIGH => IRQ_TYPE_LEVEL_HIGH
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200908145954.4629-1-krzk@kernel.orgSigned-off-by: Mark Brown <broonie@kernel.org>

The common pattern for enumerating compatibles is enum, not oneOf.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200902160025.20922-1-krzk@kernel.orgSigned-off-by: Mark Brown <broonie@kernel.org>

Fix the BCLK inversion for DSP modes
This is how it is defined by ASoC:
 * BCLK:
 * - "normal" polarity means signal is available at rising edge of BCLK
 * - "inverted" polarity means signal is available at falling edge of BCLK

The adcx140 defines the BCLK edge based on coding type.
The PCM (DSP_A/B) should drive on rising and sample on falling edge, so
from ASoC pov, it is IB_NF. But from the codec pov if it is configured in
DSP mode, then the BCLK should not be inverted, defaults to the coding
standard.

For i2s, it is NB_NF from ASoC pov (drive on falling, sample on rising).
>From the codec's pov BCLK should not invert either, as this is the default
for the coding.

So, inversion must take the format into account:
IB_NF + DSP_A/B == the codec bclk inversion should be disabled
NB_NF + DSP_A/B == the codec bclk inversion should be enabled
NB_NF + I2S == the codec bclk inversion should be disabled
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Link: https://lore.kernel.org/r/20200915190606.1744-2-dmurphy@ti.comSigned-off-by: Mark Brown <broonie@kernel.org>

It was observed that if the device was active and register writes were
performed there were some unwanted behaviors particularly when writing
the word length and some filter options. So when writing to the device
the device should be placed in sleep mode and then exit sleep mode once
the register update is complete.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Link: https://lore.kernel.org/r/20200915190606.1744-1-dmurphy@ti.comSigned-off-by: Mark Brown <broonie@kernel.org>

According to its datasheet, the digital gain should be -100 dB when
CHx_DVOL is 1 and 27 dB when CHx_DVOL is 255. But with the current
dig_vol_tlv, "Digital CHx Out Volume" shows 27.5 dB if CHx_DVOL is 255
and -95.5 dB if CHx_DVOL is 1. This commit fixes this bug.

Fixes: 689c7655 ("ASoC: tlv320adcx140: Add the tlv320adcx140 codec driver family")
Signed-off-by: Camel Guo <camelg@axis.com>
Link: https://lore.kernel.org/r/20200908090417.16695-1-camel.guo@axis.comSigned-off-by: Mark Brown <broonie@kernel.org>

When CONFIG_SND_CTL_VALIDATION is set, accesses to extended bytes
control generate spurious error messages when the size exceeds 512
bytes, such as

[ 11.224223] sof_sdw sof_sdw: control 2:0:0:EQIIR5.0 eqiir_coef_5:0:
invalid count 1024

In addition the error check returns -EINVAL which has the nasty side
effect of preventing applications accessing controls from working,
e.g.

root@plb:~# alsamixer
cannot load mixer controls: Invalid argument

It's agreed that the control interface has been abused since 2014, but
forcing a check should not prevent existing solutions from working.

This patch skips the checks conditionally if CONFIG_SND_CTL_VALIDATION
is set and the byte array provided by topology is > 512. This
preserves the checks for all other cases.

Fixes: 1a3232d2 ('ASoC: topology: Add support for TLV bytes controls')
BugLink: https://github.com/thesofproject/linux/issues/2430Reported-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Reviewed-by: Jaska Uimonen <jaska.uimonen@intel.com>
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Link: https://lore.kernel.org/r/20200917103912.2565907-1-kai.vehmanen@linux.intel.comSigned-off-by: Mark Brown <broonie@kernel.org>

"alsactl -f state.conf store/restore" sequence fails because setting
"mixing clock source" and "output source" requires active TDM clock
being started for configuration propagation. Make these two controls
write only so that their values are not stored at "alsactl store".
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Acked-by: Nicolin Chen <nicoleotsuka@gmail.com>
Link: https://lore.kernel.org/r/1600104274-13110-1-git-send-email-viorel.suman@oss.nxp.comSigned-off-by: Mark Brown <broonie@kernel.org>

Fix the failure to flush DAC data before playback.
Signed-off-by: derek.fang <derek.fang@realtek.com>
Link: https://lore.kernel.org/r/1600073839-6762-2-git-send-email-derek.fang@realtek.comSigned-off-by: Mark Brown <broonie@kernel.org>

Fix the DC calibration unsuccessful issue on rt1015
bypass boost mode.
Signed-off-by: derek.fang <derek.fang@realtek.com>
Link: https://lore.kernel.org/r/1600073839-6762-1-git-send-email-derek.fang@realtek.comSigned-off-by: Mark Brown <broonie@kernel.org>

Merge series "ASoC: SOF: DSP core management fixes for 5.10" from Kai Vehmanen <kai.vehmanen@linux.intel.com>:

This series contains some improvements to how DSP core management
is done in SOF, and adds a distinction between cores managed by
the host versus cores managed by the DSP.

Pierre-Louis Bossart (1):
  ASoC: SOF: Intel: hda-loader: s/master/primary

Ranjani Sridharan (3):
  ASoC: SOF: rename cores_mask to host_managed_cores_mask
  ASoC: SOF: Intel: hda: modify core_power_up/down op
  ASoC: SOF: Intel: remove the  HDA_DSP_CORE_MASK() macro

 sound/soc/sof/intel/apl.c        |  2 +-
 sound/soc/sof/intel/bdw.c        |  2 +-
 sound/soc/sof/intel/byt.c        |  6 +++---
 sound/soc/sof/intel/cnl.c        | 15 ++++-----------
 sound/soc/sof/intel/hda-dsp.c    | 20 +++++++++++++++++---
 sound/soc/sof/intel/hda-loader.c | 11 +++++------
 sound/soc/sof/intel/hda.c        |  2 +-
 sound/soc/sof/intel/hda.h        |  3 ---
 sound/soc/sof/intel/shim.h       |  2 +-
 sound/soc/sof/intel/tgl.c        |  2 +-
 10 files changed, 34 insertions(+), 31 deletions(-)

--
2.27.0

Merge series "ASoC: mediatek: mt8183-da7219: support machine driver for rt1015p" from Tzung-Bi Shih <tzungbi@google.com>:

The series reuses mt8183-da7219-max98357.c for supporting machine
driver with rt1015p speaker amplifier.

The 1st patch adds document for the new proposed compatible string.

The 2nd patch changes the machine driver to support "RT1015P" codec.

Tzung-Bi Shih (2):
  ASoC: dt-bindings: mt8183-da7219: add compatible string for using
    rt1015p
  ASoC: mediatek: mt8183-da7219: support machine driver with rt1015p

 .../bindings/sound/mt8183-da7219-max98357.txt |  1 +
 sound/soc/mediatek/Kconfig                    |  1 +
 .../mediatek/mt8183/mt8183-da7219-max98357.c  | 40 +++++++++++++++++++
 3 files changed, 42 insertions(+)

--
2.28.0.526.ge36021eeef-goog

Merge series "ASoC: ti: j721e-evm: Support for j7200 variant" from Peter Ujfalusi <peter.ujfalusi@ti.com>:

Hi,

Changes since v1:
- Suffix the 2359296000 constant with 'u' to silence C90 warning

When j7200 SOM is connected to the CPB, the audio setup is a bit different:
Only 48KHz family have clock path, 44.1KHz is not supported.

Update the binding documentation and add support for the j7200 version of CPB
to the driver.

Regards,
Peter
---
Peter Ujfalusi (2):
  ASoC: dt-bindings: ti,j721e-cpb-audio: Document support for j7200-cpb
  ASoC: ti: j721e-evm: Add support for j7200-cpb audio

 .../bindings/sound/ti,j721e-cpb-audio.yaml    | 92 ++++++++++++++-----
 sound/soc/ti/j721e-evm.c                      | 11 +++
 2 files changed, 81 insertions(+), 22 deletions(-)

--
Peter

Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

Enable support of pm_runtime on STM32 SAI driver to allow
SAI power state monitoring.
pm_runtime_put_autosuspend() is called from ASoC framework
on pcm device close.
The pmdown_time delay is available in runtime context, and may be set
in SAI driver to take into account shutdown delay on playback.
However, this shutdown delay is already handled in the DAPMs
of the audio codec linked to SAI CPU DAI.
So, the choice is made, not to support this delay on CPU DAI side.
Signed-off-by: Olivier Moysan <olivier.moysan@st.com>
Link: https://lore.kernel.org/r/20200911081507.7276-1-olivier.moysan@st.comSigned-off-by: Mark Brown <broonie@kernel.org>

The variable bclk_rate is checked in:
  if (bclk_rate && mclk_rate % bclk_rate)

This indicates that bclk_rate can be zero.
If so, a divide-by-zero bug will occur:
  div_bclk = mclk_rate / bclk_rate;

To fix this possible bug, the function returns -EINVAL when bclk_rate is
zero.
Signed-off-by: Tuo Li <tuoli96@outlook.com>
Link: https://lore.kernel.org/r/TY2PR04MB4029799E60A5BCAAD5B7B5BBB8280@TY2PR04MB4029.apcprd04.prod.outlook.comSigned-off-by: Mark Brown <broonie@kernel.org>

DMI product name is used to support system variants based out of
tgl_max98373_rt5682 in current implementation. Replace this DMI search with
DMI_OEM_STRING. Coreboot(BIOS used in these systems) is
setting the needed DMI_OEM_STRING field to uniquely identify these
systems.
Signed-off-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Link: https://lore.kernel.org/r/20200910162705.2026036-1-kai.vehmanen@linux.intel.comSigned-off-by: Mark Brown <broonie@kernel.org>

Use inclusive language for DSP cores.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Reviewed-by: Jaska Uimonen <jaska.uimonen@intel.com>
Reviewed-by: Seppo Ingalsuo <seppo.ingalsuo@intel.com>
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Link: https://lore.kernel.org/r/20200910164125.2033062-5-kai.vehmanen@linux.intel.comSigned-off-by: Mark Brown <broonie@kernel.org>

Remove the HDA_DSP_CORE_MASK() macro and use BIT() and GENMASK()
macros directly for more clarity.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: Rander Wang <rander.wang@linux.intel.com>
Reviewed-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Reviewed-by: Keyon Jie <yang.jie@linux.intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Link: https://lore.kernel.org/r/20200910164125.2033062-4-kai.vehmanen@linux.intel.comSigned-off-by: Mark Brown <broonie@kernel.org>

Modify the core_power_up/down ops for HDA platforms to restrict
the core_mask to the ones allowed by chip->cores_mask. This is needed
because on some HDA platforms not all cores can be powered up/down
by the host and this must be handled internally in the FW.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: Rander Wang <rander.wang@linux.intel.com>
Reviewed-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Reviewed-by: Keyon Jie <yang.jie@linux.intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Link: https://lore.kernel.org/r/20200910164125.2033062-3-kai.vehmanen@linux.intel.comSigned-off-by: Mark Brown <broonie@kernel.org>

Rename the cores_mask in struct sof_intel_dsp_desc to
host_managed_cores_mask to be more indicative of the fact that
only these cores can be powered up/down by the host.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: Rander Wang <rander.wang@linux.intel.com>
Reviewed-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Reviewed-by: Keyon Jie <yang.jie@linux.intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Link: https://lore.kernel.org/r/20200910164125.2033062-2-kai.vehmanen@linux.intel.comSigned-off-by: Mark Brown <broonie@kernel.org>

When j7200 SOM is attached to the CPB we only have parent clock for 48KHz
family and the rate of the parent clock is 2359296000Hz.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Link: https://lore.kernel.org/r/20200910124110.19361-3-peter.ujfalusi@ti.comSigned-off-by: Mark Brown <broonie@kernel.org>

j721e or j7200 SOM can be attached to the same Common Processor Board (CPB)

With the j7200 SOM only the 48KHz family parent clock is available and
McASP0 is used for the audio.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Link: https://lore.kernel.org/r/20200910124110.19361-2-peter.ujfalusi@ti.comSigned-off-by: Mark Brown <broonie@kernel.org>

Supports machine driver with rt1015p ("mt8183_da7219_rt1015p").
Embeds in the existing mt8183-da7219-max98357.c because they share
most of the code.
Signed-off-by: Tzung-Bi Shih <tzungbi@google.com>
Link: https://lore.kernel.org/r/20200911024833.1673961-3-tzungbi@google.comSigned-off-by: Mark Brown <broonie@kernel.org>

Machines with rt1015p should use the compatible string
"mediatek,mt8183_da7219_rt1015p".
Signed-off-by: Tzung-Bi Shih <tzungbi@google.com>
Link: https://lore.kernel.org/r/20200911024833.1673961-2-tzungbi@google.comSigned-off-by: Mark Brown <broonie@kernel.org>

Merge series "ASoC: q6dsp: Add support to Codec Ports." from Srinivas Kandagatla <srinivas.kandagatla@linaro.org>:

LPASS IP on SoCs like SM8250 has Digital Codec part integrated into it.
This ports are exposed in Q6DSP as Codec ports. This patchset adds
support to those q6afe ports along with q6routing and q6afe-dai.

This patchset has been tested along with other patches on
Qualcomm Robotics RB5 Platform with Soundwire and WSA8815 Codec.

Thanks,
srini

Srinivas Kandagatla (8):
  ASoC: q6dsp: q6afe: add support to Codec DMA ports
  ASoC: q6dsp: q6routing: add support to Codec DMA ports
  ASoC: q6dsp: q6afe: prepare afe_apr_send_pkt to take response opcode
  ASoC: q6dsp: q6afe: add global q6afe waitqueue
  ASoC: q6dsp: q6afe: add lpass hw voting support
  ASoC: q6dsp: q6afe: update q6afe_set_param to support global clocks
  ASoC: q6dsp: q6afe: add codec lpass clocks
  ASoC: q6dsp: q6afe-dai: add support to Codec DMA ports

 include/dt-bindings/sound/qcom,q6afe.h |  22 ++
 sound/soc/qcom/qdsp6/q6afe-dai.c       | 229 ++++++++++++++++++
 sound/soc/qcom/qdsp6/q6afe.c           | 308 +++++++++++++++++++++++--
 sound/soc/qcom/qdsp6/q6afe.h           |  33 ++-
 sound/soc/qcom/qdsp6/q6routing.c       | 121 +++++++++-
 5 files changed, 689 insertions(+), 24 deletions(-)

--
2.21.0

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20200910101732.23484-9-srinivas.kandagatla@linaro.orgSigned-off-by: Mark Brown <broonie@kernel.org>

LPASS now has integrated codec control whose clocks are controlled by Q6DSP.
This patch adds support to those clocks.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20200910101732.23484-8-srinivas.kandagatla@linaro.orgSigned-off-by: Mark Brown <broonie@kernel.org>

Previously there was no case where we need to set clock or send commands
that are not associated with q6afe ports, now we have cases like clock
voting and clock consumers like codecs that needed these clocks.

update q6afe_set_param() to support such cases, including token passing.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20200910101732.23484-7-srinivas.kandagatla@linaro.orgSigned-off-by: Mark Brown <broonie@kernel.org>

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20200910101732.23484-6-srinivas.kandagatla@linaro.orgSigned-off-by: Mark Brown <broonie@kernel.org>

In some cases like clocks q6afe would have to process commands
without an associated q6afe port, in such cases waitqueue is
required at global level to wait for the command to finish.
This patch also adds the command result to go with this waitqueue.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20200910101732.23484-5-srinivas.kandagatla@linaro.orgSigned-off-by: Mark Brown <broonie@kernel.org>

Update afe_apr_send_pkt() to take response opcode that it should wait for.
This is helpful in cases where we expect response other than the
actual command opcode.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20200910101732.23484-4-srinivas.kandagatla@linaro.orgSigned-off-by: Mark Brown <broonie@kernel.org>

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20200910101732.23484-3-srinivas.kandagatla@linaro.orgSigned-off-by: Mark Brown <broonie@kernel.org>

New LPASS supports various codec macros, DSP firmware already
has support to those ports. Add corresponding configuration
support to those ports in adsp drivers.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20200910101732.23484-2-srinivas.kandagatla@linaro.orgSigned-off-by: Mark Brown <broonie@kernel.org>