Instead of just depending on OF and getting build failures,
depend on ARM && OF_GPIO.

Cc: Fabian Vogt <fabian@ritter-vogt.de>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

The tnetv107x platform is getting removed, so this driver won't
be needed any more.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: linux-gpio@vger.kernel.org
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

The Synopsys DesignWare block is used in some ARM devices (picoxcell)
and can be configured to provide multiple banks of GPIO pins.

v12: - Add irq_startup/shutdown
     - do irq_create_mapping() in probe, irq_find_mapping() in to_irq()
     - Adjust mappings to show support for 1 gpio per port.
     - gpio-cells = <1>
v11: - Use NULL when checking existence of 'interrupts' property
     - Bindings descriptions cleanup
v10: - in documentation nr-gpio -> nr-gpios
v9:  - cleanup in dt bindings doc
     - use of_get_child_count()
v8:  - remove socfpga.dtsi changes
     - minor cleanup in devicetree documentation
v7:  - use irq_generic_chip
     - support one irq per gpio line or one irq for many
     - s/bank/port/ and other cleanup
v6:  - (atull) squash the set of patches
     - use linear irq domain
     - build fixes. Original driver was reviewed on v3.2.
     - Fix setting irq edge type for 'rising' and 'both'.
     - Support as a loadable module.
     - Use bgpio_chip's spinlock during register access.
     - Clean up register names to match spec
     - s/bank/port/ because register names use the word 'port'
     - s/nr-gpio/nr-gpios/
     - don't get/put the of_node
     - remove signoffs/acked-by's because of changes
     - other cleanup
v5:  - handle sparse bank population correctly
v3:  - depend on rather than select IRQ_DOMAIN
     - split IRQ support into a separate patch
v2:  - use Rob Herring's irqdomain in generic irq chip patches
     - use reg property to indicate bank index
     - support irqs on both edges based on LinusW's u300 driver
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: Alan Tull <atull@altera.com>
Reviewed-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

The similar GPIO HW block is used by keystone SoCs as
in Davinci SoCs.
Hence, reuse Davinci GPIO driver for Keystone taking into
account that Keystone contains ARM GIC IRQ controller which
is implemented using IRQ Chip.

Documentation:
	http://www.ti.com/lit/ug/sprugv1/sprugv1.pdfAcked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

This driver supports the GPIO controller found in LSI ZEVIO SoCs.
It has been successfully tested on a TI nspire CX calculator.
Signed-off-by: Fabian Vogt <fabian@ritter-vogt.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

There is no point in displaying the TS5500-specific driver entries if
TS5500 board support itself isn't enabled.
Signed-off-by: Jean Delvare <jdelvare@suse.de>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Acked-by: Alexandre Courbot <gnurou@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Document what we (Laurent and I, following a mailing list dicussion)
believe are best practices for the polarity flag in a GPIO specifier.

While touching the doc, I made a few minor editing changes to other
areas.
Suggested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Variable "offset" cannot be negative, so no need to check if it
greater than zero or equal.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Variable 'irq' is declared as unsigned and then used to store
negative return values from irq_alloc_descs() such as -EINVAL.
This patch fix this by declaring the variable as a signed.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Use devm_ioremap_resource() in order to make the code simpler,
and remove redundant return value check of platform_get_resource()
because the value is checked by devm_ioremap_resource().
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Kevin Hilman <khilman@linaro.org>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Use devm_ioremap_resource() in order to make the code simpler.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

If no device tree node existed for a device when CONFIG_OF_GPIO was
defined, then gpio_base would not default to -1.
Signed-off-by: Aaron Sierra <asierra@xes-inc.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Add Exar XRA1202 8-bit GPIO expander to supported list.
Signed-off-by: Aaron Sierra <asierra@xes-inc.com>
Acked-by: Graeme Smecher <gsmecher@threespeedlogic.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Add the NXP PCA9698 40-bit GPIO expander to the supported list.
Note: This only enables GPIO functionality.
Tested-by: Bob Schmitz <bschmitz@xes-inc.com>
Signed-off-by: Aaron Sierra <asierra@xes-inc.com>
Acked-by: Graeme Smecher <gsmecher@threespeedlogic.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

The pca953x driver supports tca6424 (24-bit) and pca9505 (40-bit)
devices. They were the only supported devices not mentioned in the
Kconfig help.
Signed-off-by: Aaron Sierra <asierra@xes-inc.com>
Acked-by: Graeme Smecher <gsmecher@threespeedlogic.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

which is already found in the common header for adp5588
Signed-off-by: Jean-Francois Dagenais <jeff.dagenais@gmail.com>
Acked-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

to comply with the rest of the GPIO drivers.
Signed-off-by: Jean-Francois Dagenais <jeff.dagenais@gmail.com>
Acked-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

As discussed here: http://ez.analog.com/message/35852,
the 5587 revC and 5588 revB spec sheets contain a mistake
in the GPIO_DAT_STATx register description.

According to R.Shnell at ADI, as well as my own
observations, it should read:
"GPIO data status (shows GPIO state when read for inputs)".

This commit changes the get value function accordingly.
Signed-off-by: Jean-Francois Dagenais <jeff.dagenais@gmail.com>
Acked-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

gpio_to_desc() must die. Replace one of its usage by the
newly-introduced gpiochip_get_desc() function.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Some drivers dealing with a gpio_chip might need to act on its
descriptors directly; one example is pinctrl drivers that need to lock a
GPIO for being used as IRQ using gpiod_lock_as_irq().

This patch exports a gpiochip_get_desc() function that returns the
GPIO descriptor at the requested index. It also sweeps the
gpio_to_chip() function out of the consumer interface since any holder
of a gpio_chip reference can manipulate its GPIOs way beyond what a
consumer should be allowed to do.

As a result, gpio_chip is not visible anymore to simple GPIO consumers.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Signed-off-by: Rahul Bedarkar <rahulbedarkar89@gmail.com>
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

On currently supported SoCs, the GPIO block used on Marvell EBU SoCs
is always connected to the Marvell MPIC. However, we are going to
introduce the support for newer Marvell EBU SoCs that use the
Cortex-A9 core, and therefore use the GIC as their main interrupt
controller, to which the GPIO block controlled by the gpio-mvebu
driver is connected.

The GIC interrupt controller driver uses the fasteoi flow handler. In
order to ensure that the eoi hook of the GIC driver gets called, the
GPIO driver should call chained_irq_enter() and chained_irq_exit() in
its handler. Without this, the first GPIO interrupt locks up the
system because it doesn't get acked at the GIC level.

This change is similar to for example commit
0d978eb7 ("gpio: davinci: use
chained_irq_enter/chained_irq_exit API").
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

This patch allows GPIO driver to cache GPIO_LVL output registers. The aim is to
support chipsets on which GPIO_LVL value can't be read for output pins.

Caching output levels implies the first output values reading as 0. The driver
so can't be aware of set values GPIOs by bootloader or BIOS.
Signed-off-by: Vincent Donnefort <vdonnefort@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

This patch introduces regs and reglen pointers which allow a chipset to have
register addresses differing from ICH ones.
Signed-off-by: Vincent Donnefort <vdonnefort@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

This patch allows gpio_ich driver to be aware of non blink capable chipsets.
Signed-off-by: Vincent Donnefort <vdonnefort@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

The documentation was not clear about whether
gpio_direction_output should take a logical value or the physical
level on the output line, i.e. whether the ACTIVE_LOW status
would be taken into account.

This converts gpiod_direction_output to use the logical level
and adds a new gpiod_direction_output_raw for the raw value.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

The generic GPIO would return 0 for low generic GPIO, and
something != 0 for high GPIO. Let's make this sane by clamping
the returned value to [0,1].
Reported-by: Evgeny Boger <boger@contactless.ru>
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Add missing .owner of struct gpio_chip. This prevents the
module from being removed from underneath its users.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

commit f1f70479 "gpio: pl061: support irqdomain" drops the support of
irq generic chip and use irqdomain instead. Thus fixes the dependency by
selecting IRQ_DOMAIN rather than GENERIC_IRQ_CHIP.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

When registering more than one platform device, it is
useful to set the gpio chip label in the platform data.
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

This patch removes some inconsistencies caused by the use of "int gpio"
in some parts of the code and "unsigned gpio" in others.
Signed-off-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

PTR_RET is deprecated. Use PTR_ERR_OR_ZERO instead. While at it
also include missing err.h header.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Rather than unlock/re-lock for every write access, unlock a GPIO when
it is requested and re-lock it when it is freed. As a result, the GPIO
helper functions no longer have to deal with unlocking and re-locking
the register.

In addition, only unlock a specific GPIO rather than unlocking the
entire GPIO bank as before.
Signed-off-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

The GPIO_CONTROL macro returns the control register offset when given a
GPIO number.

Update the argument name in the macro to reflect that it takes in a
GPIO number and not a bank.
Signed-off-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

This is a simple cleanup on gpio-intel-mid.c's header comments.
Signed-off-by: David Cohen <david.a.cohen@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Drop the " gpio" suffix after the pl061 irq_chip name:
this is only confusing: an irqchip name should be a single,
short, simple string that looks nice in /proc/interrupts.

Drop the nameing of each individual IRQ to "pl061" - I
think this naming function is for naming the IRQ line,
not for boilerplating them all with the name of the
parent controller, which is already known from the
.name field of the irq_chip.

Cc: Haojian Zhuang <haojian.zhuang@linaro.org>
Cc: Deepak Sikri <deepak.sikri@st.com>
Acked-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Refactor this function so that I can understand it, do one
big read/modify/write operation and have the bitmask in a
variable instead of recalculating it every time it's needed.

Cc: Haojian Zhuang <haojian.zhuang@linaro.org>
Cc: Deepak Sikri <deepak.sikri@st.com>
Acked-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

This uses the new API for tagging GPIO lines as in use by
IRQs. This enforces a few semantic checks on how the underlying
GPIO line is used.

Cc: Haojian Zhuang <haojian.zhuang@linaro.org>
Cc: Deepak Sikri <deepak.sikri@st.com>
Acked-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

This makes the PL061 driver print proper error messages
when probe fails, and also tell us when the chip is finally
registered.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Write a few words on how GPIO drivers supplying an irqchip should
be written.

Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>