- 02 Sep, 2013 12 commits
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Ben Hutchings authored
via-rng currently isn't auto-loaded if built as a module. Signed-off-by:
Ben Hutchings <ben@decadent.org.uk> Signed-off-by:
Herbert Xu <herbert@gondor.apana.org.au>
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Jan-Simon Möller authored
v2: Fix bug in statement as pointed out by Herbert Xu. Kudos to pipacs. Author: PaX Team <pageexec at freemail.hu> ML-Post: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20120507/142707.html URL: http://llvm.linuxfoundation.org Merge: Jan-Simon Möller <dl9pf at gmx.de> Description: Fix for warning: linux/crypto/fcrypt.c:143:47: warning: signed shift result (0x598000000) requires 36 bits to represent, but 'int' only has 32 bits [-Wshift-overflow] Z(0xef), Z(0x70), Z(0xcf), Z(0xc2), Z(0x2a), Z(0xb3), Z(0x61), Z(0xad), ^~~~~~~ linux/crypto/fcrypt.c:113:29: note: expanded from macro 'Z' ^ ~~ linux/include/uapi/linux/byteorder/little_endian.h:38:53: note: expanded from macro '__cpu_to_be32' ^ linux/include/uapi/linux/swab.h:116:21: note: expanded from macro '__swab32' ___constant_swab32(x) : \ ^ linux/include/uapi/linux/swab.h:18:12: note: expanded from macro '___constant_swab32' (((__u32)(x) & (__u32)0x0000ff00UL) << 8) | \ ^ Solution - make sure we don't exceed the 32 bit range. #define Z(x) cpu_to_be32(((x & 0x1f) << 27) | (x >> 5)) Signed-off-by:
Jan-Simon Möller <dl9pf@gmx.de> CC: pageexec@freemail.hu CC: llvmlinux@lists.linuxfoundation.org CC: behanw@converseincode.com CC: herbert@gondor.apana.org.au CC: davem@davemloft.net CC: linux-crypto@vger.kernel.org CC: linux-kernel@vger.kernel.org Signed-off-by:
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Marcelo Cerri authored
Each call to the co-processor, with exception of the last call, needs to send data that is multiple of block size. As consequence, any remaining data is kept in the internal NX context. This patch fixes a bug in the driver that causes it to save incorrect data into the context when data is bigger than the block size. Reviewed-by:
Joy Latten <jmlatten@linux.vnet.ibm.com> Signed-off-by:
Marcelo Cerri <mhcerri@linux.vnet.ibm.com> Signed-off-by:
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Marcelo Cerri authored
The NX CGM implementation doesn't support zero length messages and the current implementation has two flaws: - When the input data length is zero, it ignores the associated data. - Even when both lengths are zero, it uses the Crypto API to encrypt a zeroed block using ctr(aes) and because of this it allocates a new transformation and sets the key for this new tfm. Both operations are intended to be used only in user context, while the cryptographic operations can be called in both user and softirq contexts. This patch replaces the nested Crypto API use and adds two special cases: - When input data and associated data lengths are zero: it uses NX ECB mode to emulate the encryption of a zeroed block using ctr(aes). - When input data is zero and associated data is available: it uses NX GMAC mode to calculate the associated data MAC. Reviewed-by:
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Marcelo Cerri authored
The NX XCBC implementation doesn't support zero length messages and because of that NX is currently returning a hard-coded hash for zero length messages. However this approach is incorrect since the hash value also depends on which key is used. This patch removes the hard-coded hash and replace it with an implementation based on the RFC 3566 using ECB. Reviewed-by:
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Fionnuala Gunter authored
This patch updates the NX driver to perform several hyper calls when necessary so that the length limits of scatter/gather lists are respected. Reviewed-by:
Fionnuala Gunter <fin@linux.vnet.ibm.com> Signed-off-by:
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Fionnuala Gunter authored
This patch updates the NX driver to perform several hyper calls when necessary so that the length limits of scatter/gather lists are respected. Reviewed-by:
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Marcelo Cerri authored
This patch updates the nx-aes-gcm implementation to perform several hyper calls if needed in order to always respect the length limits for scatter/gather lists. Two different limits are considered: - "ibm,max-sg-len": maximum number of bytes of each scatter/gather list. - "ibm,max-sync-cop": - The total number of bytes that a scatter/gather list can hold. - The maximum number of elements that a scatter/gather list can have. Reviewed-by: -
Marcelo Cerri authored
This patch updates the nx-aes-ctr implementation to perform several hyper calls if needed in order to always respect the length limits for scatter/gather lists. Two different limits are considered: - "ibm,max-sg-len": maximum number of bytes of each scatter/gather list. - "ibm,max-sync-cop": - The total number of bytes that a scatter/gather list can hold. - The maximum number of elements that a scatter/gather list can have. Reviewed-by: -
Marcelo Cerri authored
This patch updates the nx-aes-cbc implementation to perform several hyper calls if needed in order to always respect the length limits for scatter/gather lists. Two different limits are considered: - "ibm,max-sg-len": maximum number of bytes of each scatter/gather list. - "ibm,max-sync-cop": - The total number of bytes that a scatter/gather list can hold. - The maximum number of elements that a scatter/gather list can have. Reviewed-by: -
Marcelo Cerri authored
This patch updates the nx-aes-ecb implementation to perform several hyper calls if needed in order to always respect the length limits for scatter/gather lists. Two different limits are considered: - "ibm,max-sg-len": maximum number of bytes of each scatter/gather list. - "ibm,max-sync-cop": - The total number of bytes that a scatter/gather list can hold. - The maximum number of elements that a scatter/gather list can have. Reviewed-by: -
Marcelo Cerri authored
This patch includes one more parameter to nx_build_sg_lists() to skip the given number of bytes from beginning of each sg list. This is needed in order to implement the fixes for the AES modes to make them able to process larger chunks of data. Reviewed-by:
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- 29 Aug, 2013 2 commits
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Richard Weinberger authored
padata_cpu_callback() takes pinst->lock, to avoid taking an uninitialized lock, register the notifier after it's initialization. Signed-off-by:
Richard Weinberger <richard@nod.at> Acked-by:
Steffen Klassert <steffen.klassert@secunet.com> Signed-off-by:
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Chen Gang authored
padata - share code between CPU_ONLINE and CPU_DOWN_FAILED, same to CPU_DOWN_PREPARE and CPU_UP_CANCELED Share code between CPU_ONLINE and CPU_DOWN_FAILED, same to CPU_DOWN_PREPARE and CPU_UP_CANCELED. It will fix 2 bugs: "not check the return value of __padata_remove_cpu() and __padata_add_cpu()". "need add 'break' between CPU_UP_CANCELED and CPU_DOWN_FAILED". Signed-off-by:
Chen Gang <gang.chen@asianux.com> Acked-by:
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- 21 Aug, 2013 25 commits
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Olof Johansson authored
The newly added omap4 support in the driver was added without consideration for building older configs. When building omap1_defconfig, it resulted in: drivers/char/hw_random/omap-rng.c:190:12: warning: 'omap4_rng_init' defined but not used [-Wunused-function] drivers/char/hw_random/omap-rng.c:215:13: warning: 'omap4_rng_cleanup' defined but not used [-Wunused-function] drivers/char/hw_random/omap-rng.c:251:20: warning: 'omap4_rng_irq' defined but not used [-Wunused-function] Move the code around so it is grouped with its operations struct, which for the omap4 case means also under the #ifdef CONFIG_OF, where it needs to be. Signed-off-by:
Olof Johansson <olof@lixom.net> Reviewed-by:
Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by:
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Lokesh Vutla authored
Each cycle of SHA512 operates on 32 data words where as SHA256 operates on 16 data words. This needs to be updated while configuring DMA channels. Doing the same. Signed-off-by:
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Lokesh Vutla authored
For writing input buffer into DATA_IN register current driver has the following state machine: -> if input buffer < 9 : use fallback driver -> else if input buffer < block size : Copy input buffer into data_in regs -> else use dma transfer. In cases where requesting for DMA channels fails for some reason, or channel numbers are not provided in DT or platform data, probe also fails. Instead of returning from driver use cpu polling mode. In this mode processor polls on INPUT_READY bit and writes data into data_in regs when it equals 1. This operation is repeated until the length of message. Now the state machine looks like: -> if input buffer < 9 : use fallback driver -> else if input buffer < block size : Copy input buffer into data_in regs -> else if dma enabled: use dma transfer else use cpu polling mode. Signed-off-by:
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Dan Carpenter authored
The bug here is that: while (eng_busy & (!icq_empty) & dma_busy) is never true because it's using bitwise instead of logical ANDs. The other bitwise AND conditions work as intended but I changed them as well for consistency. Signed-off-by:
Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by:
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Dan Carpenter authored
There is a typo here. "dev->hw_link[]" is an array, not a pointer, so the check is nonsense. We should be checking recently allocated "dev->hw_link[0]" instead. Signed-off-by:
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Joel Fernandes authored
For AM437x SoC, ARCH_OMAP2 and ARCH_OMAP3 is not enabled in the defconfig. We follow same thing as SHA driver, and add depends on ARCH_OMAP2PLUS so that the config is selectable for AES driver on AM437x SoC builds. Signed-off-by:
Joel Fernandes <joelf@ti.com> Signed-off-by:
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Joel Fernandes authored
Keeps request_irq exit/error code paths simpler. Suggested-by:
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Joel Fernandes authored
Use devm_kzalloc instead of kzalloc. With this change, there is no need to call kfree in error/exit paths. Signed-off-by:
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Joel Fernandes authored
For cases where offset/length of on any page of the input SG is not aligned by AES_BLOCK_SIZE, we copy all the pages from the input SG list into a contiguous buffer and prepare a single element SG list for this buffer with length as the total bytes to crypt. This is requried for cases such as when an SG list of 16 bytes total size contains 16 pages each containing 1 byte. DMA using the direct buffers of such instances is not possible. For this purpose, we first detect if the unaligned case and accordingly allocate enough number of pages to satisfy the request and prepare SG lists. We then copy data into the buffer, and copy data out of it on completion. Signed-off-by:
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Joel Fernandes authored
In cases where requesting for DMA channels fails for some reason, or channel numbers are not provided in DT or platform data, we switch to PIO-only mode also checking if platform provides IRQ numbers and interrupt register offsets in DT and platform data. All dma-only paths are avoided in this mode. Signed-off-by:
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Joel Fernandes authored
We initialize the scatter gather walk lists needed for PIO mode and avoid all DMA paths such as mapping/unmapping buffers by checking for the pio_only flag. Signed-off-by:
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Joel Fernandes authored
We add an IRQ handler that implements a state-machine for PIO-mode and data structures for walking the scatter-gather list. The IRQ handler is called in succession both when data is available to read or next data can be sent for processing. This process continues till the entire in/out SG lists have been walked. Once the SG-list has been completely walked, the IRQ handler schedules the done_task tasklet. Also add a useful macro that is used through out the IRQ code for a common pattern of calculating how much an SG list has been walked. This improves code readability and avoids checkpatch errors. Signed-off-by:
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Joel Fernandes authored
Add IRQ information to pdata and helper macros. These are required for PIO-mode support. Signed-off-by:
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Joel Fernandes authored
Intermdiate buffers were allocated, mapped and used for DMA. These are no longer required as we use the SGs from crypto layer directly in previous commits in the series. Also along with it, remove the logic for copying SGs etc as they are no longer used, and all the associated variables in omap_aes_device. Signed-off-by:
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Joel Fernandes authored
Earlier functions that did a similar sync are replaced by the dma_sync_sg_* which can operate on entire SG list. Signed-off-by:
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Joel Fernandes authored
In early version of this driver, assumptions were made such as DMA layer requires contiguous buffers etc. Due to this, new buffers were allocated, mapped and used for DMA. These assumptions are no longer true and DMAEngine scatter-gather DMA doesn't have such requirements. We simply the DMA operations by directly using the scatter-gather buffers provided by the crypto layer instead of creating our own. Lot of logic that handled DMA'ing only X number of bytes of the total, or as much as fitted into a 3rd party buffer is removed and is no longer required. Also, good performance improvement of atleast ~20% seen with encrypting a buffer size of 8K (1800 ops/sec vs 1400 ops/sec). Improvement will be higher for much larger blocks though such benchmarking is left as an exercise for the reader. Also DMA usage is much more simplified and coherent with rest of the code. Signed-off-by:
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Joel Fernandes authored
Crypto layer only passes nbytes but number of SG elements is needed for mapping or unmapping SGs at one time using dma_map* API and also needed to pass in for dmaengine prep function. We call function added to scatterwalk for this purpose in omap_aes_handle_queue to populate the values which are used later. Signed-off-by:
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Joel Fernandes authored
When DEBUG is enabled, these macros can be used to print variables in integer and hex format, and clearly display which registers, offsets and values are being read/written , including printing the names of the offsets and their values. Using statement expression macros in read path as, Suggested-by:
Joe Perches <joe@perches.com> Signed-off-by:
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Joel Fernandes authored
Crypto layer only passes nbytes to encrypt but in omap-aes driver we need to know number of SG elements to pass to dmaengine slave API. We add function for the same to scatterwalk library. Signed-off-by:
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jmlatten@linux.vnet.ibm.com authored
This patch fixes a bug in the nx-aes-gcm implementation. Corrected the code so that the authtag is always verified after decrypting and not just when there is associated data included. Also, corrected the code to retrieve the input authtag from src instead of dst. Reviewed-by:
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Alex Porosanu authored
This patch adds an option to the Kconfig file for SEC which enables the user to see the debug messages that are printed inside the SEC driver. Signed-off-by:
Alex Porosanu <alexandru.porosanu@freescale.com> Signed-off-by:
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Alex Porosanu authored
CAAM driver contains one macro (xstr) used for printing the line location in a file where a memdump is done. This patch replaces the xstr macro with the already existing __stringify macro that performs the same function. Signed-off-by:
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John Haxby authored
This affects xen pv guests with sufficiently old versions of xen and sufficiently new hardware. On such a system, a guest with a btrfs root won't even boot. Signed-off-by:
John Haxby <john.haxby@oracle.com> Signed-off-by:
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Julia Lawall authored
Adjust alignment and replace commas by semicolons in automatically generated code. Signed-off-by:
Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by:
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Julia Lawall authored
Adjust alignment and replace commas by semicolons in automatically generated code. Signed-off-by:
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- 14 Aug, 2013 1 commit
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Julia Lawall authored
Remove unneeded error handling on the result of a call to platform_get_resource when the value is passed to devm_ioremap_resource. Move the call to platform_get_resource adjacent to the call to devm_ioremap_resource to make the connection between them more clear. A simplified version of the semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression pdev,res,n,e,e1; expression ret != 0; identifier l; @@ - res = platform_get_resource(pdev, IORESOURCE_MEM, n); ... when != res - if (res == NULL) { ... \(goto l;\|return ret;\) } ... when != res + res = platform_get_resource(pdev, IORESOURCE_MEM, n); e = devm_ioremap_resource(e1, res); // </smpl> Signed-off-by:
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