- 18 Jun, 2016 40 commits
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H Hartley Sweeten authored
The timer subdevice can generate an interrupt. Currently send_sig() is used to let the task know when the interrupt occurs. Use the dev->read_subdev and comedi_handle_events() instead. Signed-off-by:
H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by:
Ian Abbott <abbotti@mev.co.uk> Signed-off-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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H Hartley Sweeten authored
This board supports change-of-state interrupts on digital inputs 4 to 19 not 0 to 15. The current code "works" but it could set inappropriate bits in the mode1 and mode2 registers that setup which channels are enabled. It also doesn't return the status of the upper 4 channels (19 to 16). Fix the comment and mask the mode1/mode2 values so that only the interrupt capable channels can be enabled. Add the SDF_LSAMPL flag to the subdevice so that 32-bit samples are used instead of 16-bit ones. This allows returning the upper 4 channels. Use the remaining bits in the sample to return "event" flags to the user. The timer and counter subdevices can also generate interrupts and are a bit hacked. They don't currently follow the comedi API and they use send_sig() to let the task that know that the interrupt occured. The "event" flags will be used instead when these subdevices are fixed. Signed-off-by:
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Ian Abbott authored
Add `#include` lines to declare stuff used by "plx9080.h" itself. Signed-off-by:
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Ian Abbott authored
Document the DMA descriptor `struct plx_dma_desc`, and the DMA abort function `plx9080_abort_dma()`. Signed-off-by:
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Ian Abbott authored
Use the usual block comment style and remove some excess spaces from single-line comments. Remove some obvious stuff about register offsets being zero relative. Remove some text about the original history of the file, as it bears hardly any resemblance to it now. Signed-off-by:
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Ian Abbott authored
Add macros in "plx9080.h" that define values for the DMATHR register values. Use the prefix `PLX_DMATHR_` for the macros. Make use of the `BIT(x)` and `GENMASK(h,l)` macros to define the values. Signed-off-by:
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Ian Abbott authored
Replace the existing macros in "plx9080.h" that define values for the DMACSR0 and DMACSR0 registers. Use the prefix `PLX_DMACSR_` for the macros. Make use of the `BIT(x)` macro to define the values. Signed-off-by:
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Ian Abbott authored
Replace the existing macros in "plx9080.h" that define values for the DMADPR0 and DMADPR1 registers. (A little-endian version of the register value is also placed in the `next` member of `struct plx_dma_desc`.) Use the prefix `PLX_DMADPR_` for the macros. Make use of the `BIT(x)` and `GENMASK(h,l)` macros to define the values. Signed-off-by:
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Ian Abbott authored
Replace the existing macros in "plx9080.h" that define values for the DMAMODE0 and DMAMODE1 registers. Use the prefix `PLX_DMAMODE_` for the macros. Make use of the `BIT(x)` and `GENMASK(h,l)` macros to define the values. Signed-off-by:
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Ian Abbott authored
For the PLX PCI 9080, the read-only PCIHIDR register is hard-coded with the value `0x908010b5`. Add a macro `PLX_PCIHIDR_9080` that expands to this value. Signed-off-by:
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Ian Abbott authored
Replace the existing macros in "plx9080.h" that define values for the CNTRL register. Use the prefix `PLX_CNTRL_` for the macros. Make use of the `BIT(x)` and `GENMASK(h,l)` macros to define the values. Signed-off-by:
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Ian Abbott authored
Replace the existing macros in "plx9080.h" that define values for the INTCSR register. Use the prefix `PLX_INTCSR_` for the macros. Make use of the `BIT(x)` and `GENMASK(h,l)` macros to define the values. Signed-off-by:
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Ian Abbott authored
Replace the existing macros in "plx9080.h" that define values for the DMCFGA register. Use the prefix `PLX_DMCFGA_` for the macros. Make use of the `BIT(x)` and `GENMASK(h,l)` macros to define the values. Signed-off-by:
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Ian Abbott authored
Replace the existing macros in "plx9080.h" that define values for the DMPBAM register. Use the prefix `PLX_DMPBAM_` for the macros. Make use of the `BIT(x)` and `GENMASK(h,l)` macros to define the values. Signed-off-by:
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Ian Abbott authored
Replace the existing macros in "plx9080.h" that define values for the LBRD0 and LBRD1 registers. Use the prefix `PLX_LBRD_` for macros that apply to both registers, `PLX_LBRD0_` for macros that apply only to the LBRD0 register, and `PLX_LBRD1_` for macros that apply only to the LBRD1 register. Make use of the `BIT(x)` and `GENMASK(h,l)` macros to define the values. Signed-off-by:
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Ian Abbott authored
Replace `enum bigend_bits` in "plx9080.h" with a bunch of macros defining values for the BIGEND register. Use the prefix `PLX_BIGEND_` for the macro names. Make use of the `BIT(x)` and `GENMASK(h,l)` macros to define the values. Signed-off-by:
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Ian Abbott authored
Replace `enum marb_bits` in "plx9080.h" with a bunch of macros defining values for the MARBR and DMAARB registers (which are the same Mode/Arbitation register at two different offsets). Use the prefix `PLX_MARBR_` for the macros. Make use of the `BIT(x)` and `GENMASK(h,l)` macros to define the values. Signed-off-by:
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Ian Abbott authored
Replace the existing macros in "plx9080.h" that define values for the LAS0BA and LAS1BA registers. Use the prefix `PLX_LASBA_` for the macros. Make use of the `BIT(x)` and `GENMASK(h,l)` macros to define the macros. Signed-off-by:
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Ian Abbott authored
Rename the macros for the PLX PCI 9080 LAS0RR and LAS1RR registers in "plx9080.h", using the prefix `PLX_LASRR_`. Make use of the `BIT(x)` and `GENMASK(h,l)` macros to define the values. Define a macro `PLX_LASRR_PREFETCH` for the "prefetchable memory" bit in this register, and define a macro `PLX_LASRR_MLOC_MASK` to mask the PCI memory location control bits. Signed-off-by:
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Ian Abbott authored
Rename the macros in "plx9080.h" that define the offsets of registers, following the pattern `PLX_REG_<NAME>`, where `<NAME>` is the register name from the PLX PCI 9080 Data Book. Add defines for the "Mailbox" registers, and add parameterized macros for the mailbox registers and the DMA control registers. Make use of the parameterized versions of the macros where it seems appropriate. The registers for supporting the I2O (Intelligent Input/Output) feature are largely left undefined, just defining enough to allow the I2O feature to be disabled. Signed-off-by:
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Ian Abbott authored
The defines related to the Power-Up Test Suite (PUTS) are just cruft that has nothing to do with the PLX PCI-9080 chip. They seem to have been inherited from "drivers/net/plx9060.h" in the kernel 2.2.16 sources for use by the "wanxl" driver. Remove them. Signed-off-by:
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Ian Abbott authored
For the PLX local address space range registers, LAS0RR and LAS1RR, bit 0 indicates whether the local address space will be mapped to memory space or I/O space. If mapped to I/O space, bit 1 must be set to 0, and bits 31 to 2 form the address decoding mask, which should be -2^N mod 2^32 for a range of length 2^N. The `LRNG_IO_MASK` macro is supposed to specify the address decoding bits for I/O space. It currently has the value `0xfffffffa`, but should be `0xfffffffc`, or possibly `0xfffffffe` (it doesn't really matter, since bit 1 is required to be set to 0). Change it to `0xfffffffc`. Similarly, for the PLX local address space local base address (remap) registers, LAS0BA and LAS1BA, bits 31 to 2, masked with the corresponding "range" register form the local base address for the local address space. The `LMAP_IO_MASK` macro is supposed to mask the valid bits for I/O space. Change its value from `0xfffffffa` to `0xfffffffc` to match `LRNG_IO_MASK`. Signed-off-by:
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Ian Abbott authored
The checkpatch.pl warns about two `udelay(x)` calls, one of 100 microseconds, and one of 10 microseconds. The 100 microseconds one is used when waiting for FPGA to become ready to accept firmware, and is not that critical, so replace it with a call to `usleep_range(100, 1000)`. The 10 microseconds one is called as each 16-bit word of firmware data is written. Replace it with a fairly tight `usleep_range(10, 20)` to avoid slowing down firmware loading too much. The firmware is fairly short, so this would only slow it down firmware loading by about 20 milliseconds or so. Signed-off-by:
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Ian Abbott authored
Rename functions to avoid CamelCase warnings from checkpatch, and to use namespace associated with the driver. Signed-off-by:
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Ian Abbott authored
Rename the macros that define values for the reference DACs register to avoid CamelCase, and to make it clearer which register they are associated with. Add a macro `DB2K_REG_DACS_SET` for the value `0x0080` that triggers setting one of the references. Signed-off-by:
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Ian Abbott authored
Rename the macros that define values for the trigger control register to avoid CamelCase, and to make it clearer which register they are associated with. Signed-off-by:
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Ian Abbott authored
Rename the macros defining values for the DAC status register to avoid CamelCase, and to make it clear which register they are associated with. Refactor the macros defining the regular DAC channel "busy" bits into a single macro that takes the DAC channel number as a parameter. Add a macro to define the offset of the read-only DAC status register. It is the same offset as the DAC control register, which is write-only. The code in `daqboard2000_ao_eoc()` that checks the status for completion of the DAC conversion looks wrong. The register has a "busy" bit for each channel, but the existing code only works for channels 0 and 1. The driver only supports two DAC channels at the moment, so the bug is currently harmless, but fix it so we can support four DAC channels on some board models. Signed-off-by:
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Ian Abbott authored
Rename the macros used to define values for the DAC control register to avoid CamelCase and to make it clearer which register they are associated with. Refactor the macros used to define values to enable or disable DAC channels to use the channel number as a parameter. None of these macros are currently used by the driver. Signed-off-by:
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Ian Abbott authored
Rename the macros associated with the acquisition status register to avoid CamelCase and to make it clear which register they are associated with. Add a macro to define the offset of the read-only acquisition status register. It's the same offset as the acquisition control register, which is write-only. Signed-off-by:
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Ian Abbott authored
Rename the macros defining values for the acquisition control register to avoid CamelCase, and to make it clearer which register they are associated with. Signed-off-by:
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Ian Abbott authored
Rename the macros defining register offsets to avoid CamelCase, and to use namespace associated with the driver. Signed-off-by:
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Ian Abbott authored
Rename the macros defining values for the Serial EEPROM Control Register to avoid CamelCase. Signed-off-by:
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Ian Abbott authored
Fix checkpatch issue: "CHECK: Please use a blank line after function/struct/union/enum declarations". Signed-off-by:
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Ian Abbott authored
Fix checkpatch issues of the form "CHECK: spaces preferred around that '*' (ctx:VxV)". Signed-off-by:
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Ian Abbott authored
Reformat one of the block comments to conform to the usual style (it's the only one that doesn't). Signed-off-by:
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Ian Abbott authored
Remove some commented out code. Some of it uses constructs that don't exist in the driver, and probably come from the source code for the MS Windows driver. Signed-off-by:
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Ravishankar Karkala Mallikarjunayya authored
This patch Replace all occurences of (1<<x) by BIT(x) in the file pcmmio.c to get rid of checkpatch.pl "CHECK" output "Prefer using the BIT macro" Signed-off-by:
Ravishankar Karkala Mallikarjunayya <ravishankarkm32@gmail.com> Reviewed-by:
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Ravishankar Karkala Mallikarjunayya authored
This is a patch to the dt2801.c file that fixes up a Block comments issues found by the checkpatch.pl tool. i.e. Block comments use a trailing */ on a separate line Signed-off-by:
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Ravishankar Karkala Mallikarjunayya authored
This fixes up a WARNING: 'Block comments use a trailing */ on a separate line'found by the checkpatch.pl tool. Signed-off-by:
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H Hartley Sweeten authored
The interrupt support available on this board is pretty limited but its simple enough to give basic async command support. This allows reading a single channel continuously using either the internal or an external clock to trigger each conversion. The command can also use the external trigger input to start the command if the external clock is being used for conversions. Signed-off-by:
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