- 12 Jun, 2009 40 commits
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Michael Hennerich authored
Signed-off-by:
Michael Hennerich <michael.hennerich@analog.com> Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
Due to a processor anomaly (05000263 to be exact), most Blackfin parts cannot keep the embedded filesystem image directly after the kernel in RAM. Instead, the filesystem needs to be relocated to the end of memory. As such, we need to tweak the map addr/size during boot for Blackfin systems. Signed-off-by: -
Mike Frysinger authored
Commit 6b3087c6 (which introduced Blackfin SMP) broke command line passing when the DEBUG_DOUBLEFAULT config option was enabled. Switch the code to using a scratch register and not R7 which holds the command line. Signed-off-by:
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Graf Yang authored
This restores some L1 reservation logic that was lost during the Blackfin SMP merge. Signed-off-by:
Graf Yang <graf.yang@analog.com> Signed-off-by:
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Graf Yang authored
Now that the sram_init() function exists only to call the bfin_sram_init() after the punting of the reserve_pda() function, simply merge the two to avoid pointless overhead. Signed-off-by:
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Graf Yang authored
The Per-processor Data Area isn't actually reserved by this function, and all it ended up doing was issuing a printk(), so punt it. Signed-off-by:
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Michael Hennerich authored
First we fix the prototypes for functions that return boolean values by using "int" rather than "uint16_t". Then we introduce a get_gptimer_run() function for checking the current run status of a timer, and then we add a disable_gptimers_sync() function which parallels disable_gptimers() with corresponding normal "_sync" behavior. Signed-off-by:
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Robin Getz authored
People often copy & paste crash messages without surrounding context, so include common useful information like system/processor stats in the crash summary. This should smooth over the report/test cycle a bit more. Signed-off-by:
Robin Getz <robin.getz@analog.com> Signed-off-by:
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Robin Getz authored
Returning too fast with a bad RETI can trigger false errors. Signed-off-by:
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Robin Getz authored
When displaying a crash dump, make sure accessing the stack is safe so we don't crash at the same time. Signed-off-by:
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Robin Getz authored
Hardware errors on the Blackfin architecture are queued by nature of the hardware design. Things that could generate a hardware level queue up at the system interface and might not process until much later, at which point the system would send a notification back to the core. As such, it is possible for user space code to do something that would trigger a hardware error, but have it delay long enough for the process context to switch. So when the hardware error does signal, we mistakenly evaluate it as a different process or as kernel context and panic (erp!). This makes it pretty difficult to find the offending context. But wait, there is good news somewhere. By forcing a SSYNC in the interrupt entry, we force all pending queues at the system level to be processed and all hardware errors to be signaled. Then we check the current interrupt state to see if the hardware error is now signaled. If so, we re-queue the current interrupt and return thus allowing the higher priority hardware error interrupt to process properly. Since we haven't done any other context processing yet, the right context will be selected and killed. There is still the possibility that the exact offending instruction will be unknown, but at least we'll have a much better idea of where to look. The downside of course is that this causes system-wide syncs at every interrupt point which results in significant performance degradation. Since this situation should not occur in any properly configured system (as hardware errors are triggered by things like bad pointers), make it a debug configuration option and disable it by default. Signed-off-by:
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Mike Frysinger authored
Document anomaly 05000242 workaround in source code. Signed-off-by: -
Graf Yang authored
When possible, work around anomaly 05000220 (external memory is write back cached, but L2 is not cached). If not possible, detect the conditions at build time and reject any qualifying configurations. Signed-off-by:
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Mike Frysinger authored
Try to keep the naming conventions consistent, so: SPI_ADC_BF533 -> BFIN_SPI_ADC TWI_LCD -> BFIN_TWI_LCD Signed-off-by: -
Robin Getz authored
This way we properly catch and kill applications that jump to a NULL ptr. Signed-off-by:
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Graf Yang authored
Signed-off-by:
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Graf Yang authored
For systems where the core cycles are not a usable tick source (like SMP or cycles gets updated), enable gptimer0 as an alternative. Signed-off-by:
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Graf Yang authored
Add some notes for anomaly 05000120 to make sure we work around it. Signed-off-by:
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Graf Yang authored
The two high address lines on the BF51x are not dedicated which means we need to handle them like any other peripheral pin if we want to access the upper 2MB of parallel flash. Signed-off-by:
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Sonic Zhang authored
Detect and reject operating conditions for anomaly 05000274 since the problem cannot be worked around in software. Signed-off-by:
Sonic Zhang <sonic.zhang@analog.com> Signed-off-by:
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Mike Frysinger authored
The panic() function already handles newlines for us. Signed-off-by: -
Mike Frysinger authored
Workaround anomaly 05000227 by only using the scratch pad for stack when absolutely necessary. The core code which reprograms clocks really only touches MMRs directly with constants. Signed-off-by: -
Mike Frysinger authored
Signed-off-by: -
Graf Yang authored
Make sure we work around anomaly 05000287 by configuring different port preferences for the data cache. Signed-off-by:
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Mike Frysinger authored
This init code existed only to dump a printk(), and not even a useful one. Signed-off-by: -
Robin Getz authored
Add a reminder note to avoid the DMA_DONE bit in our DMA core code. Signed-off-by:
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Robin Getz authored
Note the reason for using CHIPD over DSPID. Signed-off-by:
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Robin Getz authored
Our early L1 relocate code may implicitly call code which lives in L1 memory. This is due to the dma_memcpy() rewrite that made the DMA code lockless and safe to be used by multiple processes. If we start the early DMA memcpy to relocate things into L1 instruction but then our DMA memcpy code calls a function that lives in L1, things fall apart. As such, create a small dedicated DMA memcpy routine that we can assume sanity at boot time. Reported-by:
Filip Van Rillaer <filip.vanrillaer@oneaccess-net.com> Signed-off-by:
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Graf Yang authored
Add some defines to make the BF538/BF561 look like most other Blackfin parts in that it has a MDMA0 channel available for low level init. Signed-off-by:
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Mike Frysinger authored
Make sure our bfin_addr_dcachable() function flags cached L2 SRAM properly else memory easily goes unflushed when working with DMA. Signed-off-by: -
Mike Frysinger authored
Since 90% of this driver can be handled in user space, move it to the corebld user space application. Signed-off-by: -
Sonic Zhang authored
Signed-off-by:
Bryan Wu <cooloney@kernel.org>
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Mike Frysinger authored
Simplify the do_flush macro now that we don't need to take into account a second instruction being used together. Signed-off-by:
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Mike Frysinger authored
Update the default revs based on what we actually support (bf54x-0.[01] is too broken to use). Signed-off-by:
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Michael Hennerich authored
Some drivers expect to be able to request both as GPIO and GPIO IRQ, so allow that use case. Signed-off-by:
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Mike Frysinger authored
Signed-off-by:
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Michael Hennerich authored
Make sure the addresses declared match reality, and make the PATA IRQ code optional. Signed-off-by:
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Philippe Gerum authored
ipipe-2.6.28.9-blackfin-git95aafe6.patch Singed-off-by:
Philippe Gerum <rpm@xenomai.org> Signed-off-by:
Yi Li <yi.li@analog.com> Signed-off-by:
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Mike Frysinger authored
The I/O port functions take ints, so we need to cast them up before passing to our read/write funcs to avoid ugly messes of warnings. Signed-off-by:
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Mariusz Kozlowski authored
Signed-off-by:
Mariusz Kozlowski <m.kozlowski@tuxland.pl> Signed-off-by:
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