- 19 May, 2022 10 commits
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Jesse Taube authored
Add the pinctrl driver support for i.MXRT1170. Cc: Giulio Benetti <giulio.benetti@benettiengineering.com> Signed-off-by:
Jesse Taube <Mr.Bossman075@gmail.com> Reviewed-by:
Dong Aisheng <aisheng.dong@nxp.com> Link: https://lore.kernel.org/r/20220517032802.451743-11-Mr.Bossman075@gmail.comSigned-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Jesse Taube authored
Add i.MXRT1170 pinctrl binding Documentation Cc: Giulio Benetti <giulio.benetti@benettiengineering.com> Signed-off-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220517032802.451743-5-Mr.Bossman075@gmail.comSigned-off-by:
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Sebastian Reichel authored
RK3588 can have 10 different device functions, so increase the maximum amount appropriately. Considering rockchip uses auto-generated pinmux files, adding a quite complex if construct to increase the limit just for rk3588 does not seem to be worth the effort. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com> Acked-by:
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Krzysztof Kozlowski authored
'gpio-reserved-ranges' property is already used and supported by common pinctrl bindings, so add it also here to fix warnings like: qrb5165-rb5.dtb: gpio@c000: 'gpio-reserved-ranges' does not match any of the regexes: '-state$', 'pinctrl-[0-9]+' Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by:
Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by:
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Krzysztof Kozlowski authored
'input-disable' is already used and supported by common pinctrl bindings, so add it also here to fix warnings like: arch/arm64/boot/dts/qcom/qrb5165-rb5.dtb: gpio@c000: lt9611-rst-state: 'oneOf' conditional failed, one must be fixed: 'input-disable' does not match any of the regexes: 'pinctrl-[0-9]+' 'function', 'input-disable', 'output-high', 'pins', 'power-source' do not match any of the regexes: '(pinconf|-pins)$', 'pinctrl-[0-9]+' Signed-off-by: -
Krzysztof Kozlowski authored
Add missing 'gpio-line-names' property and describe its constraints for all models except PM8226 (which seems not really used). Signed-off-by:
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Krzysztof Kozlowski authored
Matching PMIC GPIOs config nodes within a '-state' node by '.*' pattern does not work as expected because of linux,phandle in the DTB: arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon-cityman.dtb: gpios@c000: divclk4-state: 'oneOf' conditional failed, one must be fixed: 'pins' is a required property 'function' is a required property 'pinconf' does not match any of the regexes: 'pinctrl-[0-9]+' [[2]] is not of type 'object' Make the schema stricter and expect such nodes to be either named 'pinconfig' or followed with '-pins' prefix. Signed-off-by: -
Krzysztof Kozlowski authored
Add missing compatibles for devices: PM8150L and PMM8155AU. Signed-off-by:
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Marijn Suijten authored
The pm6125 has 9 GPIOs with no holes inbetween. Signed-off-by:
Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Reviewed-by:
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Marijn Suijten authored
The pm6125 comes with 9 GPIOs, without holes. Signed-off-by:
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- 13 May, 2022 2 commits
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Andy Shevchenko authored
The np variable is used globally for stm32_pctl_probe() and in one of its code branches. cppcheck is not happy with that: pinctrl-stm32.c:1530:23: warning: Local variable 'np' shadows outer variable [shadowVariable] Instead of simply renaming one of the variables convert some code to use a device pointer directly. Fixes: bb949ed9 ("pinctrl: stm32: Switch to use for_each_gpiochip_node() helper") Reported-by:
kernel test robot <lkp@intel.com> Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by:
Fabien Dessenne <fabien.dessenne@foss.st.com> Link: https://lore.kernel.org/r/20220507102257.26414-1-andriy.shevchenko@linux.intel.comSigned-off-by:
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Linus Walleij authored
Merge tag 'renesas-pinctrl-for-v5.19-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v5.19 (take two) - Reserved field optimizations, - Miscellaneous fixes and improvements.
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- 09 May, 2022 2 commits
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Andy Shevchenko authored
GPIO library now accepts fwnode as a firmware node, so switch the driver to use it. Signed-off-by:
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Andy Shevchenko authored
GPIO library now accepts fwnode as a firmware node, so switch the driver to use it. Signed-off-by:
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- 05 May, 2022 26 commits
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Michael Walle authored
Since recently, the kernel is nagging about mutable irq_chips: [ 4.967050] gpio gpiochip1: (e2004190.gpio-input): not an immutable chip, please consider fixing it! Drop the unneeded copy, flag it as IRQCHIP_IMMUTABLE, add the new helper functions and call the appropriate gpiolib functions. Signed-off-by:
Michael Walle <michael@walle.cc> Reviewed-by:
Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220428111622.1395831-1-michael@walle.ccSigned-off-by:
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Linus Walleij authored
Merge branch 'irq/gpio-immutable' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into devel
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Linus Walleij authored
When merging the for_each_gpiochip_node() changes, I made some mistakes by not disabling the clocks on the errorpath, fix it up. Fixes: a0912083 ("Merge tag 'intel-gpio-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-gpio-intel into devel") Cc: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Fabien Dessenne <fabien.dessenne@foss.st.com> Reported-by:
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Geert Uytterhoeven authored
Add checks for discovering registers with reserved fields that could benefit from being described using variable-width reserved field shorthands, reducing kernel size. Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/f5a5159ba7b396e6f09dd3f23c864a74ed8e342d.1649865241.git.geert+renesas@glider.be
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Geert Uytterhoeven authored
Describe registers with fixed-width register fields and many reserved fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a shorthand not requiring dummy values. This reduces kernel size by 79 bytes. Signed-off-by:
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Geert Uytterhoeven authored
Describe registers with fixed-width register fields and many reserved fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a shorthand not requiring dummy values. This reduces kernel size by 150 bytes. Signed-off-by:
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Geert Uytterhoeven authored
Describe registers with fixed-width register fields and many reserved fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a shorthand not requiring dummy values. This reduces kernel size by 115 bytes. Signed-off-by:
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Geert Uytterhoeven authored
Describe registers with fixed-width register fields and many reserved fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a shorthand not requiring dummy values. This reduces kernel size by 161 bytes. Signed-off-by:
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Geert Uytterhoeven authored
Describe registers with fixed-width register fields and many reserved fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a shorthand not requiring dummy values. This reduces kernel size by 8 bytes. Signed-off-by:
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Geert Uytterhoeven authored
Describe registers with fixed-width register fields and many reserved fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a shorthand not requiring dummy values. This reduces kernel size by 105 bytes. Signed-off-by:
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Geert Uytterhoeven authored
Describe registers with fixed-width register fields and many reserved fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a shorthand not requiring dummy values. This reduces kernel size by 396 bytes. Signed-off-by:
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Geert Uytterhoeven authored
Describe registers with fixed-width register fields and many reserved fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a shorthand not requiring dummy values. This reduces kernel size by 128 bytes. Signed-off-by:
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Geert Uytterhoeven authored
Describe registers with fixed-width register fields and many reserved fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a shorthand not requiring dummy values. This reduces kernel size by 154 bytes. Signed-off-by:
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Geert Uytterhoeven authored
Describe registers with fixed-width register fields and many reserved fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a shorthand not requiring dummy values. This reduces kernel size by 406 bytes. Signed-off-by:
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Geert Uytterhoeven authored
Describe registers with fixed-width register fields and many reserved fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a shorthand not requiring dummy values. This reduces kernel size by 572 bytes. Signed-off-by:
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Geert Uytterhoeven authored
Describe registers with fixed-width register fields and many reserved fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a shorthand not requiring dummy values. This reduces kernel size by 281 bytes. Signed-off-by:
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Geert Uytterhoeven authored
Describe registers with fixed-width register fields and many reserved fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a shorthand not requiring dummy values. This reduces kernel size by 183 bytes. Signed-off-by:
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Geert Uytterhoeven authored
Describe registers with fixed-width register fields and many reserved fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a shorthand not requiring dummy values. This reduces kernel size by 556 bytes. Signed-off-by:
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Geert Uytterhoeven authored
Describe registers with fixed-width register fields and many reserved fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a shorthand not requiring dummy values. This reduces kernel size by 422 bytes. Signed-off-by:
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Geert Uytterhoeven authored
Describe registers with fixed-width register fields and many reserved fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a shorthand not requiring dummy values. This reduces kernel size by 226 bytes. Signed-off-by:
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Geert Uytterhoeven authored
Describe registers with fixed-width register fields and many reserved fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a shorthand not requiring dummy values. This reduces kernel size by 198 bytes. Signed-off-by:
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Geert Uytterhoeven authored
Describe registers with fixed-width register fields and many reserved fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a shorthand not requiring dummy values. This reduces kernel size by 268 bytes. Signed-off-by:
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Geert Uytterhoeven authored
Describe registers with fixed-width register fields and many reserved fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a shorthand not requiring dummy values. This reduces kernel size by 496 bytes. Signed-off-by:
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Geert Uytterhoeven authored
Describe registers with fixed-width register fields and many reserved fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a shorthand not requiring dummy values. This reduces kernel size by 496 bytes. Signed-off-by:
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Geert Uytterhoeven authored
Describe registers with fixed-width register fields and many reserved fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a shorthand not requiring dummy values. This reduces kernel size by 496 bytes. Signed-off-by:
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Geert Uytterhoeven authored
Describe registers with fixed-width register fields and many reserved fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a shorthand not requiring dummy values. This reduces kernel size by 473 bytes. Signed-off-by:
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