• Paolo Bonzini's avatar
    KVM: x86: optimize delivery of TSC deadline timer interrupt · 9c8fd1ba
    Paolo Bonzini authored
    The newly-added tracepoint shows the following results on
    the tscdeadline_latency test:
    
            qemu-kvm-8387  [002]  6425.558974: kvm_vcpu_wakeup:      poll time 10407 ns
            qemu-kvm-8387  [002]  6425.558984: kvm_vcpu_wakeup:      poll time 0 ns
            qemu-kvm-8387  [002]  6425.561242: kvm_vcpu_wakeup:      poll time 10477 ns
            qemu-kvm-8387  [002]  6425.561251: kvm_vcpu_wakeup:      poll time 0 ns
    
    and so on.  This is because we need to go through kvm_vcpu_block again
    after the timer IRQ is injected.  Avoid it by polling once before
    entering kvm_vcpu_block.
    
    On my machine (Xeon E5 Sandy Bridge) this removes about 500 cycles (7%)
    from the latency of the TSC deadline timer.
    Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
    9c8fd1ba
x86.c 200 KB