Commit 57a4fd42 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Simon Horman

arm64: dts: r8a7796: Remove unit-address and reg from integrated cache

The Cortex-A57 cache controller is an integrated controller, and thus
the device node representing it should not have a unit-addresses or reg
property.

Fixes: 1561f207 ("arm64: dts: r8a7796: Add Renesas R8A7796 SoC support")
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent d165856d
...@@ -47,9 +47,8 @@ a57_0: cpu@0 { ...@@ -47,9 +47,8 @@ a57_0: cpu@0 {
enable-method = "psci"; enable-method = "psci";
}; };
L2_CA57: cache-controller@0 { L2_CA57: cache-controller-0 {
compatible = "cache"; compatible = "cache";
reg = <0>;
power-domains = <&sysc R8A7796_PD_CA57_SCU>; power-domains = <&sysc R8A7796_PD_CA57_SCU>;
cache-unified; cache-unified;
cache-level = <2>; cache-level = <2>;
......
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