Commit 73b2d136 authored by H Hartley Sweeten's avatar H Hartley Sweeten Committed by Greg Kroah-Hartman

staging: comedi: ni_tio_internal: simplify ni_tio_counting_mode_registers_present()

Only the e series gpct variant does not have counting mode registers.
Simplfy this function. For aesthetics, return bool instead of int.

This fixes the checkpatch.pl issues:
CHECK: spaces preferred around that '*' (ctx:ExV)
CHECK: Avoid crashing the kernel - try using WARN_ON & recovery code
       rather than BUG() or BUG_ON()
Signed-off-by: default avatarH Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: default avatarIan Abbott <abbotti@mev.co.uk>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent f4e0331f
......@@ -451,7 +451,7 @@ static void ni_tio_set_sync_mode(struct ni_gpct *counter, int force_alt_sync)
unsigned mode;
uint64_t clock_period_ps;
if (ni_tio_counting_mode_registers_present(counter_dev) == 0)
if (!ni_tio_counting_mode_registers_present(counter_dev))
return;
mode = ni_tio_get_soft_copy(counter, counting_mode_reg);
......
......@@ -174,21 +174,11 @@ static inline unsigned read_register(struct ni_gpct *counter,
return counter->counter_dev->read_register(counter, reg);
}
static inline int ni_tio_counting_mode_registers_present(const struct
ni_gpct_device
*counter_dev)
static inline bool
ni_tio_counting_mode_registers_present(const struct ni_gpct_device *counter_dev)
{
switch (counter_dev->variant) {
case ni_gpct_variant_e_series:
return 0;
case ni_gpct_variant_m_series:
case ni_gpct_variant_660x:
return 1;
default:
BUG();
break;
}
return 0;
/* m series and 660x variants have counting mode registers */
return counter_dev->variant != ni_gpct_variant_e_series;
}
void ni_tio_set_bits(struct ni_gpct *, enum ni_gpct_register reg,
......
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