Commit 98adb34c authored by Guido Guenther's avatar Guido Guenther Committed by Linus Torvalds

[PATCH] rivafb: clean up ordering constraints

I had another look at the ugly rivafb memory ordering requirements.

It seems P{V,C}IO areas are only accessed using VGA_{RD,WR}8 macros. 
NV_{RW,WR}08 are never actually used directly.  So this patch makes at
least usage consistent: VGA_{RD,WR}8 to access "I/O areas" in an ordered
way.  NV_* for the rest.
Signed-off-by: default avatarGuido Guenther <agx@sigxcpu.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent dbda961b
......@@ -75,15 +75,15 @@ typedef unsigned int U032;
*/
#include <asm/io.h>
#define NV_WR08(p,i,d) (writeb((d), (void __iomem *)(p) + (i)))
#define NV_RD08(p,i) (readb((void __iomem *)(p) + (i)))
#define NV_WR08(p,i,d) (__raw_writeb((d), (void __iomem *)(p) + (i)))
#define NV_RD08(p,i) (__raw_readb((void __iomem *)(p) + (i)))
#define NV_WR16(p,i,d) (__raw_writew((d), (void __iomem *)(p) + (i)))
#define NV_RD16(p,i) (__raw_readw((void __iomem *)(p) + (i)))
#define NV_WR32(p,i,d) (__raw_writel((d), (void __iomem *)(p) + (i)))
#define NV_RD32(p,i) (__raw_readl((void __iomem *)(p) + (i)))
#define VGA_WR08(p,i,d) NV_WR08(p,i,d)
#define VGA_RD08(p,i) NV_RD08(p,i)
#define VGA_WR08(p,i,d) (writeb((d), (void __iomem *)(p) + (i)))
#define VGA_RD08(p,i) (readb((void __iomem *)(p) + (i)))
/*
* Define different architectures.
......
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