[PATCH] rivafb: clean up ordering constraints

I had another look at the ugly rivafb memory ordering requirements.

It seems P{V,C}IO areas are only accessed using VGA_{RD,WR}8 macros. 
NV_{RW,WR}08 are never actually used directly.  So this patch makes at
least usage consistent: VGA_{RD,WR}8 to access "I/O areas" in an ordered
way.  NV_* for the rest.
Signed-off-by: Guido Guenther <agx@sigxcpu.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

drivers/video/riva/riva_hw.h

@@ -75,15 +75,15 @@ typedef unsigned int   U032;
  */
 #include <asm/io.h>
 
-#define NV_WR08(p,i,d)  (writeb((d), (void __iomem *)(p) + (i)))
-#define NV_RD08(p,i)    (readb((void __iomem *)(p) + (i)))
+#define NV_WR08(p,i,d)  (__raw_writeb((d), (void __iomem *)(p) + (i)))
+#define NV_RD08(p,i)    (__raw_readb((void __iomem *)(p) + (i)))
 #define NV_WR16(p,i,d)  (__raw_writew((d), (void __iomem *)(p) + (i)))
 #define NV_RD16(p,i)    (__raw_readw((void __iomem *)(p) + (i)))
 #define NV_WR32(p,i,d)  (__raw_writel((d), (void __iomem *)(p) + (i)))
 #define NV_RD32(p,i)    (__raw_readl((void __iomem *)(p) + (i)))
 
-#define VGA_WR08(p,i,d) NV_WR08(p,i,d)
-#define VGA_RD08(p,i)   NV_RD08(p,i)
+#define VGA_WR08(p,i,d) (writeb((d), (void __iomem *)(p) + (i)))
+#define VGA_RD08(p,i)   (readb((void __iomem *)(p) + (i)))
 
 /*
  * Define different architectures.