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Commit b3d0ee51 authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'uniphier-dt64-v5.7' of... 

Merge tag 'uniphier-dt64-v5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into arm/dt

UniPhier ARM64 SoC DT updates for v5.7

- Rename nodes to avoid dt-schema warnings

- Enable SPI for PXs3 reference board

- Enable thermal monitor for PXs3 SoC

- Fix clock and reset of SPI nodes

* tag 'uniphier-dt64-v5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
  arm64: dts: uniphier: Set SCSSI clock and reset IDs for each channel
  arm64: dts: uniphier: Add nodes of thermal monitor and thermal zone for PXs3
  arm64: dts: uniphier: Enable spi node for PXs3 reference board
  arm64: dts: uniphier: rename NAND node names to follow json-schema
  arm64: dts: uniphier: rename aidet node names to follow json-schema
  arm64: dts: uniphier: change SD/eMMC node names to follow json-schema

Link: https://lore.kernel.org/r/CAK7LNASMD-zqNfG02WhU1LeAJevnjBv=oT2N_7y6C8w7kryotQ@mail.gmail.comSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents c354f77b fdf9c17b
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Showing with 74 additions and 21 deletions
arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
View file @ b3d0ee51
......@@ -143,8 +143,8 @@ spi1: spi@54006100 {
interrupts = <0 216 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
clocks = <&peri_clk 11>;
resets = <&peri_rst 11>;
clocks = <&peri_clk 12>;
resets = <&peri_rst 12>;
};
serial0: serial@54006800 {
......@@ -433,7 +433,7 @@ peri_rst: reset {
};
};
emmc: sdhc@5a000000 {
emmc: mmc@5a000000 {
compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc";
reg = <0x5a000000 0x400>;
interrupts = <0 78 4>;
......@@ -566,7 +566,7 @@ efuse@200 {
};
};
aidet: aidet@5fc20000 {
aidet: interrupt-controller@5fc20000 {
compatible = "socionext,uniphier-ld11-aidet";
reg = <0x5fc20000 0x200>;
interrupt-controller;
......@@ -621,7 +621,7 @@ mdio: mdio {
};
};
nand: nand@68000000 {
nand: nand-controller@68000000 {
compatible = "socionext,uniphier-denali-nand-v5b";
status = "disabled";
reg-names = "nand_data", "denali_reg";
......
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
View file @ b3d0ee51
......@@ -248,8 +248,8 @@ spi1: spi@54006100 {
interrupts = <0 216 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
clocks = <&peri_clk 11>;
resets = <&peri_rst 11>;
clocks = <&peri_clk 12>;
resets = <&peri_rst 12>;
};
spi2: spi@54006200 {
......@@ -259,8 +259,8 @@ spi2: spi@54006200 {
interrupts = <0 229 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi2>;
clocks = <&peri_clk 11>;
resets = <&peri_rst 11>;
clocks = <&peri_clk 13>;
resets = <&peri_rst 13>;
};
spi3: spi@54006300 {
......@@ -270,8 +270,8 @@ spi3: spi@54006300 {
interrupts = <0 230 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi3>;
clocks = <&peri_clk 11>;
resets = <&peri_rst 11>;
clocks = <&peri_clk 14>;
resets = <&peri_rst 14>;
};
serial0: serial@54006800 {
......@@ -559,7 +559,7 @@ peri_rst: reset {
};
};
emmc: sdhc@5a000000 {
emmc: mmc@5a000000 {
compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc";
reg = <0x5a000000 0x400>;
interrupts = <0 78 4>;
......@@ -578,7 +578,7 @@ emmc: sdhc@5a000000 {
cdns,phy-dll-delay-sdclk-hsmmc = <21>;
};
sd: sdhc@5a400000 {
sd: mmc@5a400000 {
compatible = "socionext,uniphier-sd-v3.1.1";
status = "disabled";
reg = <0x5a400000 0x800>;
......@@ -664,7 +664,7 @@ usb_hs_i2: trim@5a,0 {
};
};
aidet: aidet@5fc20000 {
aidet: interrupt-controller@5fc20000 {
compatible = "socionext,uniphier-ld20-aidet";
reg = <0x5fc20000 0x200>;
interrupt-controller;
......@@ -925,7 +925,7 @@ pcie_phy: phy@66038000 {
socionext,syscon = <&soc_glue>;
};
nand: nand@68000000 {
nand: nand-controller@68000000 {
compatible = "socionext,uniphier-denali-nand-v5b";
status = "disabled";
reg-names = "nand_data", "denali_reg";
......
arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
View file @ b3d0ee51
......@@ -27,6 +27,8 @@ aliases {
i2c2 = &i2c2;
i2c3 = &i2c3;
i2c6 = &i2c6;
spi0 = &spi0;
spi1 = &spi1;
};
memory@80000000 {
......@@ -39,6 +41,14 @@ &ethsc {
interrupts = <4 8>;
};
&spi0 {
status = "okay";
};
&spi1 {
status = "okay";
};
&serial0 {
status = "okay";
};
......
arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
View file @ b3d0ee51
......@@ -7,6 +7,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/gpio/uniphier-gpio.h>
#include <dt-bindings/thermal/thermal.h>
/ {
compatible = "socionext,uniphier-pxs3";
......@@ -42,6 +43,7 @@ cpu0: cpu@0 {
clocks = <&sys_clk 33>;
enable-method = "psci";
operating-points-v2 = <&cluster0_opp>;
#cooling-cells = <2>;
};
cpu1: cpu@1 {
......@@ -51,6 +53,7 @@ cpu1: cpu@1 {
clocks = <&sys_clk 33>;
enable-method = "psci";
operating-points-v2 = <&cluster0_opp>;
#cooling-cells = <2>;
};
cpu2: cpu@2 {
......@@ -60,6 +63,7 @@ cpu2: cpu@2 {
clocks = <&sys_clk 33>;
enable-method = "psci";
operating-points-v2 = <&cluster0_opp>;
#cooling-cells = <2>;
};
cpu3: cpu@3 {
......@@ -69,6 +73,7 @@ cpu3: cpu@3 {
clocks = <&sys_clk 33>;
enable-method = "psci";
operating-points-v2 = <&cluster0_opp>;
#cooling-cells = <2>;
};
};
......@@ -136,6 +141,37 @@ timer {
<1 10 4>;
};
thermal-zones {
cpu-thermal {
polling-delay-passive = <250>; /* 250ms */
polling-delay = <1000>; /* 1000ms */
thermal-sensors = <&pvtctl>;
trips {
cpu_crit: cpu-crit {
temperature = <110000>; /* 110C */
hysteresis = <2000>;
type = "critical";
};
cpu_alert: cpu-alert {
temperature = <100000>; /* 100C */
hysteresis = <2000>;
type = "passive";
};
};
cooling-maps {
map0 {
trip = <&cpu_alert>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
......@@ -171,8 +207,8 @@ spi1: spi@54006100 {
interrupts = <0 216 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
clocks = <&peri_clk 11>;
resets = <&peri_rst 11>;
clocks = <&peri_clk 12>;
resets = <&peri_rst 12>;
};
serial0: serial@54006800 {
......@@ -353,7 +389,7 @@ peri_rst: reset {
};
};
emmc: sdhc@5a000000 {
emmc: mmc@5a000000 {
compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc";
reg = <0x5a000000 0x400>;
interrupts = <0 78 4>;
......@@ -372,7 +408,7 @@ emmc: sdhc@5a000000 {
cdns,phy-dll-delay-sdclk-hsmmc = <21>;
};
sd: sdhc@5a400000 {
sd: mmc@5a400000 {
compatible = "socionext,uniphier-sd-v3.1.1";
status = "disabled";
reg = <0x5a400000 0x800>;
......@@ -462,7 +498,7 @@ usb_hs_i2: trim@5a,0 {
};
};
aidet: aidet@5fc20000 {
aidet: interrupt-controller@5fc20000 {
compatible = "socionext,uniphier-pxs3-aidet";
reg = <0x5fc20000 0x200>;
interrupt-controller;
......@@ -496,6 +532,13 @@ sys_rst: reset {
watchdog {
compatible = "socionext,uniphier-wdt";
};
pvtctl: pvtctl {
compatible = "socionext,uniphier-pxs3-thermal";
interrupts = <0 3 4>;
#thermal-sensor-cells = <0>;
socionext,tmod-calibration = <0x0f22 0x68ee>;
};
};
eth0: ethernet@65000000 {
......@@ -783,7 +826,7 @@ pcie_phy: phy@66038000 {
socionext,syscon = <&soc_glue>;
};
nand: nand@68000000 {
nand: nand-controller@68000000 {
compatible = "socionext,uniphier-denali-nand-v5b";
status = "disabled";
reg-names = "nand_data", "denali_reg";
......
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