- 31 Aug, 2015 1 commit
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Linus Walleij authored
This reverts commit 5e22ec01.
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- 27 Aug, 2015 1 commit
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Linus Walleij authored
There is a helper function to do the container_of() magic for the tc3589x GPIO, so use it. Signed-off-by:Linus Walleij <linus.walleij@linaro.org>
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- 26 Aug, 2015 9 commits
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Julia Lawall authored
Return a negative error code on failure. A simplified version of the semantic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ identifier ret; expression e1,e2; @@ ( if (\(ret < 0\|ret != 0\)) { ... return ret; } | ret = 0 ) ... when != ret = e1 when != &ret *if(...) { ... when != ret = e2 when forall return ret; } // </smpl> Signed-off-by:
Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by:
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Stefan Agner authored
The GPIO IRQ controller is able to generate level triggered interrupts, however, these were handled by handle_simple_irq so far which did not take care of IRQ masking. This lead to "nobody cared (try booting with the "irqpoll" option)" stack traces. Use the generic interrupt handlers depending on the IRQ type. Signed-off-by:
Stefan Agner <stefan@agner.ch> Signed-off-by:
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Nicholas Krause authored
This fixes error handling in the function max732x_probe by checking if the calls to the function max732x_readb fail by returning a error code. Signed-off-by:
Nicholas Krause <xerofoify@gmail.com> Signed-off-by:
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Grygorii Strashko authored
As per CCF documentation (clk.txt) the clk_prepare/unprepare APIs are not allowed in atomic context. But now OMAP GPIO driver uses them while applying debounce settings and as part of PM runtime irqsafe operations: - omap_gpio_debounce() is holding the lock with IRQs off. + omap2_set_gpio_debounce() + clk_prepare_enable() + clk_prepare() this one might sleep. - pm_runtime_get_sync() is holding the lock with IRQs off + omap_gpio_runtime_suspend() + raw_spin_lock_irqsave() + omap_gpio_dbck_disable() + clk_disable_unprepare() Hence, fix it by moeving dbclk prepare/unprepare in OMAP GPIO omap_gpio_probe/omap_gpio_remove. Also, while here, ensure that debounce functionality is disabled if clk_get() failed, because otherwise kernel will carsh in omap2_set_gpio_debounce(). Reported-by:Sebastian Andrzej Siewior <bigeasy@linutronix.de> Acked-by:
Santosh Shilimkar <ssantosh@kernel.org> Tested-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by:
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Grygorii Strashko authored
The access to HW registers has to be be protected in omap_gpio_irq_handler(), as it may race with code executed on another CPUs. Signed-off-by:
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Grygorii Strashko authored
According to TRMs: Required input line stable = (the value of the GPIO_DEBOUNCINGTIME[7:0].DEBOUNCETIME + 1) × 31, where the value of the GPIO_DEBOUNCINGTIME[7:0].DEBOUNCETIME bit field is from 0 to 255. But now omap2_set_gpio_debounce() will calculate debounce time and behave incorrectly in the following cases: 1) requested debounce time is !0 and <32 calculated DEBOUNCETIME = 0x1 == 62 us; expected value of DEBOUNCETIME = 0x0 == 31us 2) requested debounce time is 0 calculated DEBOUNCETIME = 0x1 == 62 us; expected: disable debounce and DEBOUNCETIME = 0x0 3) requested debounce time is >32 and <63 calculated DEBOUNCETIME = 0x0 and debounce will be disabled; expected: enable debounce and DEBOUNCETIME = 0x1 == 62 us Hence, rework omap2_set_gpio_debounce() to fix above cases: 1) introduce local variable "enable" and use it to identify when debounce need to be enabled or disabled. Disable debounce if requested debounce time is 0. 2) use below formula for debounce time calculation: debounce = (DIV_ROUND_UP(debounce, 31) - 1) & 0xFF; Signed-off-by:
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Grygorii Strashko authored
Switch OMAP GPIO driver to use platform_get_irq(), because it is not recommened to use platform_get_resource(pdev, IORESOURCE_IRQ, ..) for requesting IRQ resources any more, as they can be not ready yet in case of DT-boot. Signed-off-by:
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Grygorii Strashko authored
The bank->chip.irqdomain is uninitialized at the moment when irq_domain_remove() is called, so remove this call. Signed-off-by:
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Grygorii Strashko authored
Add missed description for GPIO irqchip fields in struct gpio_chip. Signed-off-by:
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- 25 Aug, 2015 1 commit
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Julia Lawall authored
Remove unneeded variable used to store return value. Generated by: scripts/coccinelle/misc/returnvar.cocci Signed-off-by:
Fengguang Wu <fengguang.wu@intel.com> Signed-off-by:
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- 17 Aug, 2015 3 commits
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Grygorii Strashko authored
Since IRQ chip helpers were introduced drivers lose ability to register separate lockdep classes for each registered GPIO IRQ chip and the gpiolib now is using shared lockdep class for all GPIO IRQ chips (gpiochip_irq_lock_class). As result, lockdep will produce warning when there are min two stacked GPIO chips and all of them are interrupt controllers. HW configuration which generates lockdep warning (TI dra7-evm): [SOC GPIO bankA.gpioX] <- irq - [pcf875x.gpioY] <- irq - DevZ.enable_irq_wake(pcf_gpioY_irq); The issue was reported in [1] and discussed [2]. ============================================= [ INFO: possible recursive locking detected ] 4.2.0-rc6-00013-g5d050ed-dirty #55 Not tainted --------------------------------------------- sh/63 is trying to acquire lock: (class){......}, at: [<c009b91c>] __irq_get_desc_lock+0x50/0x94 but task is already holding lock: (class){......}, at: [<c009b91c>] __irq_get_desc_lock+0x50/0x94 other info that might help us debug this: Possible unsafe locking scenario: CPU0 ---- lock(class); lock(class); *** DEADLOCK *** May be due to missing lock nesting notation 7 locks held by sh/63: #0: (sb_writers#4){.+.+.+}, at: [<c016bbb8>] vfs_write+0x13c/0x164 #1: (&of->mutex){+.+.+.}, at: [<c01debf4>] kernfs_fop_write+0x4c/0x1a0 #2: (s_active#36){.+.+.+}, at: [<c01debfc>] kernfs_fop_write+0x54/0x1a0 #3: (pm_mutex){+.+.+.}, at: [<c009758c>] pm_suspend+0xec/0x4c4 #4: (&dev->mutex){......}, at: [<c03f77f8>] __device_suspend+0xd4/0x398 #5: (&gpio->lock){+.+.+.}, at: [<c009b940>] __irq_get_desc_lock+0x74/0x94 #6: (class){......}, at: [<c009b91c>] __irq_get_desc_lock+0x50/0x94 stack backtrace: CPU: 0 PID: 63 Comm: sh Not tainted 4.2.0-rc6-00013-g5d050ed-dirty #55 Hardware name: Generic DRA74X (Flattened Device Tree) [<c0016e24>] (unwind_backtrace) from [<c0013338>] (show_stack+0x10/0x14) [<c0013338>] (show_stack) from [<c05f6b24>] (dump_stack+0x84/0x9c) [<c05f6b24>] (dump_stack) from [<c00903f4>] (__lock_acquire+0x19c0/0x1e20) [<c00903f4>] (__lock_acquire) from [<c0091098>] (lock_acquire+0xa8/0x128) [<c0091098>] (lock_acquire) from [<c05fd61c>] (_raw_spin_lock_irqsave+0x38/0x4c) [<c05fd61c>] (_raw_spin_lock_irqsave) from [<c009b91c>] (__irq_get_desc_lock+0x50/0x94) [<c009b91c>] (__irq_get_desc_lock) from [<c009c4f4>] (irq_set_irq_wake+0x20/0xfc) [<c009c4f4>] (irq_set_irq_wake) from [<c0393ac4>] (pcf857x_irq_set_wake+0x24/0x54) [<c0393ac4>] (pcf857x_irq_set_wake) from [<c009c560>] (irq_set_irq_wake+0x8c/0xfc) [<c009c560>] (irq_set_irq_wake) from [<c04a02ac>] (gpio_keys_suspend+0x70/0xd4) [<c04a02ac>] (gpio_keys_suspend) from [<c03f6a00>] (dpm_run_callback+0x50/0x124) [<c03f6a00>] (dpm_run_callback) from [<c03f7830>] (__device_suspend+0x10c/0x398) [<c03f7830>] (__device_suspend) from [<c03f90f0>] (dpm_suspend+0x134/0x2f4) [<c03f90f0>] (dpm_suspend) from [<c0096e20>] (suspend_devices_and_enter+0xa8/0x728) [<c0096e20>] (suspend_devices_and_enter) from [<c00977cc>] (pm_suspend+0x32c/0x4c4) [<c00977cc>] (pm_suspend) from [<c0096060>] (state_store+0x64/0xb8) [<c0096060>] (state_store) from [<c01dec64>] (kernfs_fop_write+0xbc/0x1a0) [<c01dec64>] (kernfs_fop_write) from [<c016b280>] (__vfs_write+0x20/0xd8) [<c016b280>] (__vfs_write) from [<c016bb0c>] (vfs_write+0x90/0x164) [<c016bb0c>] (vfs_write) from [<c016c330>] (SyS_write+0x44/0x9c) [<c016c330>] (SyS_write) from [<c000f500>] (ret_fast_syscall+0x0/0x54) Lets fix it by using separate lockdep class for each registered GPIO IRQ Chip. This is done by wrapping gpiochip_irqchip_add call into macros. The implementation of this patch inspired by solution done by Nicolas Boichat for regmap [3] [1] http://www.spinics.net/lists/linux-gpio/msg05844.html [2] http://www.spinics.net/lists/linux-gpio/msg06021.html [3] http://www.spinics.net/lists/arm-kernel/msg429834.html Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Roger Quadros <rogerq@ti.com> Reported-by:Roger Quadros <rogerq@ti.com> Tested-by:
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Alexandre Courbot authored
As reported by Alexey Khoroshilov: grgpio_irq_unmap() code looks quite suspicious regarding usage of priv->bgc.lock spinlock. It locks the spinlock in line 310: spin_lock_irqsave(&priv->bgc.lock, flags); and then it can call grgpio_set_imask() in line 317: grgpio_set_imask(priv, i, 0); But grgpio_set_imask() unconditionally locks the spinlock by itself. Fix this by moving the spinlock acquisition outside of grgpio_set_imask(). Found by Linux Driver Verification project (linuxtesting.org). Reported-by:Alexey Khoroshilov <khoroshilov@ispras.ru> Signed-off-by:
Alexandre Courbot <acourbot@nvidia.com> Cc: Alexey Khoroshilov <khoroshilov@ispras.ru> Cc: Andreas Larsson <andreas@gaisler.com> Signed-off-by:
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Dirk Behme authored
I've been searching for any documentation of 'the active-low property of a GPIO' already mentioned in this documenation. But couldn't find any. Add it. Sigend-off-by:
Dirk Behme <dirk.behme@gmail.com> Acked-by:
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- 13 Aug, 2015 7 commits
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Dirk Behme authored
Fix the section mismatch warning WARNING: vmlinux.o(.text+0x2b2788): Section mismatch in reference from the function mxc_gpio_probe() to the function .init.text:mxc_gpio_init_gc() The function mxc_gpio_probe() references the function __init mxc_gpio_init_gc(). This is often because mxc_gpio_probe lacks a __init annotation or the annotation of mxc_gpio_init_gc is wrong. Signed-off-by:
Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by:
Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Signed-off-by:
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Ulises Brindis authored
Currently in the FSL platform all GPIO interrupts in a bank are muxed into two GPIO lines to the GPC interrupt controller. In each GPIO bank GPIOs 0-15 are OR'ed into one GPC interrupt controller interrupt and 16-31 are OR'ed into another. With the current code, if any of the 0-15 or 16-31 interrupts are marked as wakeup capable, all interrupts belonging to that sub-bank (either 0-15 or 16-31) will wake up the device. This is because interrupts are only being masked at the interrupt controller and not at the GPIO controller. This patch allows masking of GPIO interrupts at the GPIO controller during suspend if they have not been labeled wakeup capable. This patch uses preexisting IRQCHIP_MASK_ON_SUSPEND flag while initializing the GPIO interrupts to get the desired behavior. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: linux-gpio@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by:
Eduardo Valentin <edubezval@gmail.com> Signed-off-by:
Ulises Brindis <ubrindis56@gmail.com> Signed-off-by:
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Axel Lin authored
Fix below build warning: CC drivers/gpio/gpio-omap.o drivers/gpio/gpio-omap.c: In function 'omap_gpio_irq_type': drivers/gpio/gpio-omap.c:504:3: warning: passing argument 1 of 'spin_unlock_irqrestore' from incompatible pointer type [enabled by default] include/linux/spinlock.h:360:29: note: expected 'struct spinlock_t *' but argument is of type 'struct raw_spinlock_t *' Fixes: commit 4dbada2b ("gpio: omap: use raw locks for locking") Signed-off-by:
Axel Lin <axel.lin@ingics.com> Signed-off-by:
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Linus Walleij authored
Linux 4.2-rc4
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Gregory Fong authored
For wake from S5, we need to: - register a reboot handler - set wakeup capability before requesting IRQ so wakeup count is incremented - mask all GPIO IRQs and clear any pending interrupts during driver probe to since no driver will yet be registered to handle any IRQs carried over from boot at that time, and it's possible that the booted kernel does not request the same IRQ anyway. This means that /sys/.../power/wakeup_count is valid at boot time, and we can properly account for S5 wakeup stats. e.g.: ### After waking from S5 from a GPIO key # cat /sys/bus/platform/drivers/brcmstb-gpio/f04172c0.gpio/power/wakeup enabled # cat /sys/bus/platform/drivers/brcmstb-gpio/f04172c0.gpio/power/wakeup_count 1 Signed-off-by:
Gregory Fong <gregory.0xf0@gmail.com> Reviewed-by:
Florian Fainelli <f.fainelli@gmail.com> Signed-off-by:
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Gregory Fong authored
Uses the gpiolib irqchip helpers. For this to work, the irq setup function is called once per bank instead of once per device. Note that all known uses of this block have a BCM7120 L2 interrupt controller as a parent. Supports interrupts for all GPIOs. In the IRQ handler, we check for raised IRQs for invalid GPIOs and warn (ratelimited) if they're encountered. Also, several drivers (e.g. gpio-keys) allow for GPIOs to be configured as wakeup sources, and this GPIO controller supports that through a separate interrupt path. The de-facto standard DT property "wakeup-source" is checked, since that indicates whether the GPIO controller hardware can wake. Uses the IRQCHIP_MASK_ON_SUSPEND irq_chip flag because UPG GIO doesn't have any of its own wakeup source configuration. Aside regarding gpiolib irqchip helpers: It wasn't obvious (to me) that you can have multiple chained irqchips and associated IRQ domains for a single parent IRQ, and as long as the xlate function is written correctly, a GPIO IRQ request end up checking the correct domain and will get associated with the correct IRQ. What helps make this clear is to read drivers/gpio/gpiolib-of.c: - of_gpiochip_find_and_xlate() - of_get_named_gpiod_flags() drivers/gpio/gpiolib.c: - gpiochip_find() Signed-off-by:
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Linus Walleij authored
commit 926b663c "gpiolib: allow GPIOs to be named" added the ability to name GPIO lines by an array of names stored in the GPIO chip. This was in 2009 and has been an ABI since. Let's document it properly. Cc: Daniel Silverstone <dsilvers@digital-scurf.org> Cc: Markus Pargmann <mpa@pengutronix.de> Cc: Johan Hovold <johan@kernel.org> Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by:
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- 03 Aug, 2015 2 commits
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Rabin Vincent authored
On ETRAX FS, all pins on the first port (and only the first port) have interrupt support. On ARTPEC-3, all pins on all ports have interrupt support. However, there are only eight interrupts. Each of the interrupts is associated with a group of pins and for each interrupt the one pin from the group which will trigger it can be selected. Signed-off-by:
Rabin Vincent <rabin@rab.in> Signed-off-by:
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Rabin Vincent authored
If the driver has specified its own irq_{request/release}_resources() functions, don't override them. The gpio-etraxfs driver will use this. Signed-off-by:
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- 28 Jul, 2015 3 commits
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Alexander Stein authored
mpc8xxx_gpio_chip.lock needs to be a real spinlock in preempt-rt. Especially the interrupt related functions can not be converted to a sleeping lock. Signed-off-by:
Alexander Stein <alexander.stein@systec-electronic.com> Acked-by:
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by:
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Tomeu Vizoso authored
When an OF node has a pin range for its GPIOs, return -EPROBE_DEFER if the pin controller isn't available. Otherwise, the GPIO range wouldn't be set at all unless the pin controller probed always before the GPIO chip. With this change, the probe of the GPIO chip will be deferred and will be retried at a later point, hopefully once the pin controller has been registered and probed already. Signed-off-by:
Tomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by:
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Rob Herring authored
set_irq_flags is ARM specific with custom flags which have genirq equivalents. Convert drivers to use the genirq interfaces directly, so we can kill off set_irq_flags. The translation of flags is as follows: IRQF_VALID -> !IRQ_NOREQUEST IRQF_PROBE -> !IRQ_NOPROBE IRQF_NOAUTOEN -> IRQ_NOAUTOEN For IRQs managed by an irqdomain, the irqdomain core code handles clearing and setting IRQ_NOREQUEST already, so there is no need to do this in .map() functions and we can simply remove the set_irq_flags calls. Some users also modify IRQ_NOPROBE and this has been maintained although it is not clear that is really needed as most platforms don't use probing. There appears to be a great deal of blind copy and paste of this code. Signed-off-by:
Rob Herring <robh@kernel.org> Cc: Michael Hennerich <michael.hennerich@analog.com> Acked-by:
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- 27 Jul, 2015 10 commits
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Rabin Vincent authored
Add support for the GIO block in the ARTPEC-3 SoC. The basic functionality is essentialy the same as the version in the ETRAX FS, except for a different set of ports, including a read-only port. Cc: devicetree@vger.kernel.org Signed-off-by:
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Rabin Vincent authored
Allow chips to indicates that they are input-only and thus cannot set the output value. This will be used by the gpio-etraxfs driver. Signed-off-by:
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Rabin Vincent authored
BGPIO_F_UNREADABLE_REG_SET is incorrect, since the set register _is_ readable. What's really required is BGPIO_F_READ_OUTPUT_REG_SET: reading the set register reads the set output value. Signed-off-by:
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Ulrich Hecht authored
R-Car Gen3's GPIO blocks are identical to Gen2's in every respect. Signed-off-by:
Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by:
Simon Horman <horms+renesas@verge.net.au> Acked-by:
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by:
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Sebastian Andrzej Siewior authored
This patch converts gpio_bank.lock from a spin_lock into a raw_spin_lock. The call path is to access this lock is always under a raw_spin_lock, for instance - __setup_irq() holds &desc->lock with irq off + __irq_set_trigger() + omap_gpio_irq_type() - handle_level_irq() (runs with irqs off therefore raw locks) + mask_ack_irq() + omap_gpio_mask_irq() This fixes the obvious backtrace on -RT. However the locking vs context is not and this is not limited to -RT: - omap_gpio_irq_type() is called with IRQ off and has an conditional call to pm_runtime_get_sync() which may sleep. Either it may happen or it may not happen but pm_runtime_get_sync() should not be called with irqs off. - omap_gpio_debounce() is holding the lock with IRQs off. + omap2_set_gpio_debounce() + clk_prepare_enable() + clk_prepare() this one might sleep. The number of users of gpiod_set_debounce() / gpio_set_debounce() looks low but still this is not good. Acked-by:Javier Martinez Canillas <javier@dowhile0.org> Acked-by:
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Masahiro Yamada authored
This variable is used as an iterator and initialized in the list_for_each() loop. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by:
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Uwe Kleine-König authored
Signed-off-by:
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Uwe Kleine-König authored
The gpio controller on MPC5125 is identical to the MPC5121 register wise, the only difference is that the lines 0..3 are input only instead of 28..31 on MPC5121. Signed-off-by:
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Uwe Kleine-König authored
The gpio controllers that are handled by the mpc8xxx driver differ slightly. Up to now some differences were handled by use of of_device_is_compatible, others by use of struct of_device_id's data. To make this consistent and easily extendable handle the differences at a single place. Signed-off-by:
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Uwe Kleine-König authored
This variable is not modified in the driver and all functions it it passed to don't change it either. So it can and should be marked const. Signed-off-by:
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- 26 Jul, 2015 3 commits
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Linus Torvalds authored
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds authored
Pull perf fix from Thomas Gleixner: "A single fix for the intel cqm perf facility to prevent IPIs from interrupt context" * 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: perf/x86/intel/cqm: Return cached counter value from IRQ context
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds authored
Pull x86 fixes from Thomas Gleixner: "This update contains: - the manual revert of the SYSCALL32 changes which caused a regression - a fix for the MPX vma handling - three fixes for the ioremap 'is ram' checks. - PAT warning fixes - a trivial fix for the size calculation of TLB tracepoints - handle old EFI structures gracefully This also contains a PAT fix from Jan plus a revert thereof. Toshi explained why the code is correct" * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/mm/pat: Revert 'Adjust default caching mode translation tables' x86/asm/entry/32: Revert 'Do not use R9 in SYSCALL32' commit x86/mm: Fix newly introduced printk format warnings mm: Fix bugs in region_is_ram() x86/mm: Remove region_is_ram() call from ioremap x86/mm: Move warning from __ioremap_check_ram() to the call site x86/mm/pat, drivers/media/ivtv: Move the PAT warning and replace WARN() with pr_warn() x86/mm/pat, drivers/infiniband/ipath: Replace WARN() with pr_warn() x86/mm/pat: Adjust default caching mode translation tables x86/fpu: Disable dependent CPU features on "noxsave" x86/mpx: Do not set ->vm_ops on MPX VMAs x86/mm: Add parenthesis for TLB tracepoint size calculation efi: Handle memory error structures produced based on old versions of standard
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