- 04 Sep, 2019 40 commits
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Ahung Cheng authored
The IER and DLH registers occupy the same address space, selected by the LCR.DLAB bit. Hence, add port lock to protect IER when LCR.DLAB bit is set. Signed-off-by:
Ahung Cheng <ahcheng@nvidia.com> Signed-off-by:
Krishna Yarlagadda <kyarlagadda@nvidia.com> Acked-by:
Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/1565609303-27000-5-git-send-email-kyarlagadda@nvidia.comSigned-off-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Andreas Abel authored
Add the internal loopback functionality that can be enabled with TIOCM_LOOP. Signed-off-by:
Andreas Abel <aabel@nvidia.com> Signed-off-by:
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Razvan Stefanescu authored
When half-duplex RS485 communication is used, after RX is started, TX tasklet still needs to be scheduled tasklet. This avoids console freezing when more data is to be transmitted, if the serial communication is not closed. Fixes: 69646d7a ("tty/serial: atmel: RS485 HD w/DMA: enable RX after TX is stopped") Signed-off-by:
Razvan Stefanescu <razvan.stefanescu@microchip.com> Cc: stable <stable@vger.kernel.org> Link: https://lore.kernel.org/r/20190813074025.16218-1-razvan.stefanescu@microchip.comSigned-off-by:
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Stefan-gabriel Mirea authored
Introduce support for LINFlex driver, based on: - the version of Freescale LPUART driver after commit b3e3bf2e ("Merge 4.0-rc7 into tty-next"); - commit abf1e0a9 ("tty: serial: fsl_lpuart: lock port on console write"). In this basic version, the driver can be tested using initramfs and relies on the clocks and pin muxing set up by U-Boot. Remarks concerning the earlycon support: - LinFlexD does not allow character transmissions in the INIT mode (see section 47.4.2.1 in the reference manual[1]). Therefore, a mutual exclusion between the first linflex_setup_watermark/linflex_set_termios executions and linflex_earlycon_putchar was employed and the characters normally sent to earlycon during initialization are kept in a buffer and sent afterwards. - Empirically, character transmission is also forbidden within the last 1-2 ms before entering the INIT mode, so we use an explicit timeout (PREINIT_DELAY) between linflex_earlycon_putchar and the first call to linflex_setup_watermark. - U-Boot currently uses the UART FIFO mode, while this driver makes the transition to the buffer mode. Therefore, the earlycon putchar function matches the U-Boot behavior before initializations and the Linux behavior after. [1] https://www.nxp.com/webapp/Download?colCode=S32V234RMSigned-off-by:
Stoica Cosmin-Stefan <cosmin.stoica@nxp.com> Signed-off-by:
Adrian.Nitu <adrian.nitu@freescale.com> Signed-off-by:
Larisa Grigore <Larisa.Grigore@nxp.com> Signed-off-by:
Ana Nedelcu <B56683@freescale.com> Signed-off-by:
Mihaela Martinas <Mihaela.Martinas@freescale.com> Signed-off-by:
Matthew Nunez <matthew.nunez@nxp.com> [stefan-gabriel.mirea@nxp.com: Reduced for upstreaming and implemented earlycon support] Signed-off-by:
Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com> Link: https://lore.kernel.org/r/20190809112853.15846-6-stefan-gabriel.mirea@nxp.comSigned-off-by:
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Colin Ian King authored
Variable ret is initialized to a value that is never read and it is re-assigned later. The initialization is redundant and can be removed. Addresses-Coverity: ("Unused value") Signed-off-by:Colin Ian King <colin.king@canonical.com> Link: https://lore.kernel.org/r/20190809174042.6276-1-colin.king@canonical.comSigned-off-by:
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Kai-Heng Feng authored
Sunix Multi I/O boards are different to Timedia's. This patch adds proper support for Sunix MIO boards with 1 parallel and up to 4 serial ports. Cc: Morris Ku <morris_ku@sunix.com> Cc: Debbie Liu <debbie_liu@sunix.com> Signed-off-by:
Kai-Heng Feng <kai.heng.feng@canonical.com> Link: https://lore.kernel.org/r/20190809190130.30773-2-kai.heng.feng@canonical.comSigned-off-by:
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Kai-Heng Feng authored
Add support to Sunix serial boards with up to 16 ports. Sunix board need its own setup callback instead of using Timedia's, to properly support more than 4 ports. Cc: Morris Ku <morris_ku@sunix.com> Cc: Debbie Liu <debbie_liu@sunix.com> Signed-off-by:
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Arnd Bergmann authored
The platform is getting removed, so there are no more users of this driver. Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20190809202749.742267-3-arnd@arndb.deSigned-off-by:
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Rahul Tanwar authored
This patch adds IRQ & ISR support in the driver for Lightning Mountain SoC. Signed-off-by:
Rahul Tanwar <rahul.tanwar@linux.intel.com> Reviewed-by:
Andy Shevchenko <andriy.shevchenko@intel.com> Link: https://lore.kernel.org/r/0df20f6e4bbf9de09c85a5c92c92e642f62f441f.1565257887.git.rahul.tanwar@linux.intel.comSigned-off-by:
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Rahul Tanwar authored
This driver/IP is reused across multiple SoCs. Older SoCs supported three separate IRQs for tx, rx & err interrupts. Newer Lightning Mountain SoC supports single IRQ for all of tx/rx/err interrupts. This patch modifies the driver design to support dynamic assignment of IRQ resources & ISRs based on devicetree node compatible entries. Suggested-by:
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Rahul Tanwar authored
Use explicit string instead of a macro for devicetree compatible string. This series of patches is to add support for multiple SoCs which reuse the same serial controller IP. The following patches will add another compatible string to support new Lightning Mountain(LGM) SoC. So it makes sense to have the compatible strings explicitly mentioned instead of a fixed macro. Suggested-by:
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Andy Shevchenko authored
Intel Elkhart Lake may use High Speed UART from OSE IP block. This is different to what we have in main LPSS, though compatible with older version of it, which is handled by this driver. Enable OSE HS UART on Intel Elkhart Lake by adding PCI IDs. Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by:
Heikki Krogerus <heikki.krogerus@linux.intel.com> Link: https://lore.kernel.org/r/20190806094322.64987-9-andriy.shevchenko@linux.intel.comSigned-off-by:
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Andy Shevchenko authored
Since PCI core provides a generic PCI_DEVICE_DATA() macro, replace LPSS_DEVICE() with former one. No functional change intended. Signed-off-by:
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Andy Shevchenko authored
It is really useful not only for debugging to have an DMA IRQ line and pool being mapped to the corresponding IP by using its instance ID. Provide PCI device and function as instance ID for Intel Quark UART DMA. Signed-off-by:
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Andy Shevchenko authored
For Synopsys DesignWare 8250 uart which version >= 4.00a, there's a valid divisor latch fraction register. Now the preparation is done, it's easy to add the feature support. This patch firstly tries to get the fractional divisor width during probe, then setups specific get_divisor() and set_divisor() hook. Among other changes the FIFO size is now retrieved from the hardware. Signed-off-by:
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Andy Shevchenko authored
Since we have a common library module for Synopsys DesignWare UART, let us use it. Signed-off-by:
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Andy Shevchenko authored
Since we have a common library module for Synopsys DesignWare UART, let us use it. Signed-off-by:
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Andy Shevchenko authored
We would like to use same functions in the couple of drivers for Synopsys DesignWare 8250 UART. Split them from 8250_dw into new brand library module which users will select explicitly. Signed-off-by:
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Andy Shevchenko authored
The use of pointer will simplify enabling runtime PM for the driver. Signed-off-by:
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Andy Shevchenko authored
The commit 2cb78eab ("serial: 8250_dw: Use a unified new dev variable in probe") introduced a local dev variable in ->probe(). Do the same in ->remove() in order to prepare for sequential patches. Signed-off-by:
Kefeng Wang <wangkefeng.wang@huawei.com> Link: https://lore.kernel.org/r/20190806094322.64987-1-andriy.shevchenko@linux.intel.comSigned-off-by:
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Rahul Tanwar authored
The existing driver can only support single core SoC. But new multicore platforms which reuse the same driver/IP need SMP support. This patch adds multicore support in the driver. Signed-off-by:
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Andrey Smirnov authored
In a mixed DMA/IRQ use-case (e.g.: DMA for TX, IRQ for RX), interrupt handler might try to handle Rx/Tx condition it shouldn't. Change the code to only handle TX/RX event if corresponding path isn't being handled by DMA. Signed-off-by:
Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Stefan Agner <stefan@agner.ch> Cc: Chris Healy <cphealy@gmail.com> Cc: Cory Tusar <cory.tusar@zii.aero> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Jiri Slaby <jslaby@suse.com> Cc: linux-imx@nxp.com Cc: linux-serial@vger.kernel.org Cc: linux-kernel@vger.kernel.org Link: https://lore.kernel.org/r/20190805185701.22863-7-andrew.smirnov@gmail.comSigned-off-by:
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Andrey Smirnov authored
Enabling TIE in .startup() callback causes the driver to start (or at least try) to transmit data before .start_tx() is called. Which, while harmless (since TIE handler will immediately disable it), is a no-op and shouldn't really happen. Drop UARTCR2_TIE from list of bits set in lpuart_startup(). This change will also not enable TIE in .resume(), but it seems that, similart to .startup(), transmit interrupt shouldn't be enabled there either. Signed-off-by:
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Andrey Smirnov authored
Most users of lpuart*_setup_watermark() enable identical set of flags right after the call, so combine those two action into a subroutine and make use of it. Signed-off-by:
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Andrey Smirnov authored
Code doing final steps of TX/RX configuration in lpuart32_startup() and lpuart_resume() is identical, so move it into a standalone subroutine. Signed-off-by:
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Andrey Smirnov authored
Code doing initial DMA RX configuration in lpuart_startup() and lpuart32_startup() is exactly the same, so move it into a standalone subroutine. Signed-off-by:
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Andrey Smirnov authored
Code configure DMA TX path in lpuart_startup(), lpuart32_startup() and lpuart_resume() is doing exactly the same thing, so move it into a standalone subroutine. Signed-off-by:
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Andy Shevchenko authored
As explained in Documentation/timers/timers-howto.rst the small amount of milliseconds sometimes produces much longer delays. Replace msleep(1) with usleep_range(1000, 1100). Signed-off-by:
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Andy Shevchenko authored
For better maintenance consolidate port callbacks in default_setup(). Signed-off-by:
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YueHaibing authored
Use devm_platform_ioremap_resource() to simplify the code a bit. This is detected by coccinelle. Reported-by:
Hulk Robot <hulkci@huawei.com> Signed-off-by:
YueHaibing <yuehaibing@huawei.com> Link: https://lore.kernel.org/r/20190802130817.16220-1-yuehaibing@huawei.comSigned-off-by:
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Frieder Schrempf authored
Now that the mctrl_gpio code returns NULL instead of ERR_PTR(-ENOSYS) if CONFIG_GPIOLIB is disabled, we can safely remove this check. Signed-off-by:
Frieder Schrempf <frieder.schrempf@kontron.de> Acked-by:
Uwe Kleine-Knig <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20190802100349.8659-4-frieder.schrempf@kontron.deSigned-off-by:
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Frieder Schrempf authored
Now that the mctrl_gpio code returns NULL instead of ERR_PTR(-ENOSYS) if CONFIG_GPIOLIB is disabled, we can safely remove this check. Signed-off-by:
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Frieder Schrempf authored
If CONFIG_GPIOLIB is not enabled, mctrl_gpio_init() and mctrl_gpio_init_noauto() will currently return an error pointer with -ENOSYS. As the mctrl GPIOs are usually optional, drivers need to check for this condition to allow continue probing. To avoid the need for this check in each driver, we return NULL instead, as all the mctrl_gpio_*() functions are skipped anyway. We also adapt mctrl_gpio_to_gpiod() to be in line with this change. Reviewed-by:
Fabio Estevam <festevam@gmail.com> Signed-off-by:
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Aaron Sierra authored
Move INT0 clearing out of common, per-port serial8250_do_startup() into PCI device probe/resume. As described in commit 2c0ac5b4 ("serial: exar: Fix stuck MSIs"), the purpose of clearing INT0 is to prevent the PCI interrupt line from becoming stuck asserted, "which is fatal with edge-triggered MSIs". Like the clearing via interrupt handler that moved from common code in commit c7e1b405 ("tty: serial: exar: Relocate sleep wake-up handling"), this clearing at startup can be better handled at the PCI device level. Cc: Jan Kiszka <jan.kiszka@siemens.com> Cc: Sudip Mukherjee <sudip.mukherjee@codethink.co.uk> Signed-off-by:
Aaron Sierra <asierra@xes-inc.com> Reviewed-by:
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Geert Uytterhoeven authored
While commit b6b996b6 ("treewide: Use DEVICE_ATTR_RW") converted the rx_fifo_timeout attribute, it forgot to convert rx_fifo_trigger due to a slightly different function naming. Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by:
Ulrich Hecht <uli+renesas@fpond.eu> Link: https://lore.kernel.org/r/20190731124555.14349-1-geert+renesas@glider.beSigned-off-by:
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Vivek Gautam authored
For QUP IP versions 2.5 and above the oversampling rate is halved from 32 to 16. Update this rate after reading hardware version register, so that the clock divider value is correctly set to achieve required baud rate. Signed-off-by:
Vivek Gautam <vivek.gautam@codeaurora.org> Link: https://lore.kernel.org/r/20190801121153.10613-1-vivek.gautam@codeaurora.orgSigned-off-by:
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Robert Middleton authored
When closing and shutting down the exar serial port, if the chip has not finished sending all of the data in its buffer, the remaining bytes will be lost. Hold off on the shutdown until the bytes have all been sent. Signed-off-by:
Robert Middleton <robert.middleton@rm5248.com> Link: https://lore.kernel.org/r/20190801145640.26080-1-robert.middleton@rm5248.comSigned-off-by:
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Andy Shevchenko authored
There are Exar custom divisor support in 8250_port which belongs to 8250_exar module. Move it out to the correct module and do not contaminate generic code with it. Cc: Aaron Sierra <asierra@xes-inc.com> Cc: Jan Kiszka <jan.kiszka@siemens.com> Cc: Sudip Mukherjee <sudip.mukherjee@codethink.co.uk> Signed-off-by:
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Andy Shevchenko authored
There are Exar quirks in 8250_port which belong to 8250_exar module. Extract PM routine to the correct module and do not contaminate generic code with it. Cc: Aaron Sierra <asierra@xes-inc.com> Cc: Jan Kiszka <jan.kiszka@siemens.com> Cc: Sudip Mukherjee <sudip.mukherjee@codethink.co.uk> Signed-off-by:
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Andy Shevchenko authored
Since we have a separate driver there is no need to autoconfigure ports, we already know what they are. Drop autoconfiguration in 8250_port and move type detection to 8250_exar. Cc: Aaron Sierra <asierra@xes-inc.com> Cc: Jan Kiszka <jan.kiszka@siemens.com> Cc: Sudip Mukherjee <sudip.mukherjee@codethink.co.uk> Signed-off-by:
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