1. 09 Sep, 2016 9 commits
  2. 08 Sep, 2016 1 commit
    • Robin Murphy's avatar
      arm64/io: Allow I/O writes to use {W,X}ZR · ee5e41b5
      Robin Murphy authored
      When zeroing an I/O location, the current accessors are forced to
      allocate a temporary register to store the zero for the write. By
      tweaking the assembly constraints, we can allow the compiler to use
      the zero register directly in such cases, and save some juggling.
      Compiling a representative kernel configuration with GCC 6 shows
      that 2.3KB worth of code can be wasted just on that!
      
        text     data    bss      dec      hex     filename
       13316776 3248256 18176769 34741801 2121e29 vmlinux.o.new
       13319140 3248256 18176769 34744165 2122765 vmlinux.o.old
      Acked-by: default avatarMark Rutland <mark.rutland@arm.com>
      Signed-off-by: default avatarRobin Murphy <robin.murphy@arm.com>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      ee5e41b5
  3. 07 Sep, 2016 2 commits
  4. 06 Sep, 2016 2 commits
  5. 05 Sep, 2016 3 commits
    • Pratyush Anand's avatar
      arm64: ftrace: add save_stack_trace_regs() · 98ab10e9
      Pratyush Anand authored
      Currently, enabling stacktrace of a kprobe events generates warning:
      
        echo stacktrace > /sys/kernel/debug/tracing/trace_options
        echo "p xhci_irq" > /sys/kernel/debug/tracing/kprobe_events
        echo 1 > /sys/kernel/debug/tracing/events/kprobes/enable
      
      save_stack_trace_regs() not implemented yet.
      ------------[ cut here ]------------
      WARNING: CPU: 1 PID: 0 at ../kernel/stacktrace.c:74 save_stack_trace_regs+0x3c/0x48
      Modules linked in:
      
      CPU: 1 PID: 0 Comm: swapper/1 Not tainted 4.8.0-rc4-dirty #5128
      Hardware name: ARM Juno development board (r1) (DT)
      task: ffff800975dd1900 task.stack: ffff800975ddc000
      PC is at save_stack_trace_regs+0x3c/0x48
      LR is at save_stack_trace_regs+0x3c/0x48
      pc : [<ffff000008126c64>] lr : [<ffff000008126c64>] pstate: 600003c5
      sp : ffff80097ef52c00
      
      Call trace:
         save_stack_trace_regs+0x3c/0x48
         __ftrace_trace_stack+0x168/0x208
         trace_buffer_unlock_commit_regs+0x5c/0x7c
         kprobe_trace_func+0x308/0x3d8
         kprobe_dispatcher+0x58/0x60
         kprobe_breakpoint_handler+0xbc/0x18c
         brk_handler+0x50/0x90
         do_debug_exception+0x50/0xbc
      
      This patch implements save_stack_trace_regs(), so that stacktrace of a
      kprobe events can be obtained.
      
      After this patch, there is no warning and we can see the stacktrace for
      kprobe events in trace buffer.
      
      more /sys/kernel/debug/tracing/trace
                <idle>-0     [004] d.h.  1356.000496: p_xhci_irq_0:(xhci_irq+0x0/0x9ac)
                <idle>-0     [004] d.h.  1356.000497: <stack trace>
        => xhci_irq
        => __handle_irq_event_percpu
        => handle_irq_event_percpu
        => handle_irq_event
        => handle_fasteoi_irq
        => generic_handle_irq
        => __handle_domain_irq
        => gic_handle_irq
        => el1_irq
        => arch_cpu_idle
        => default_idle_call
        => cpu_startup_entry
        => secondary_start_kernel
        =>
      Tested-by: default avatarDavid A. Long <dave.long@linaro.org>
      Reviewed-by: default avatarJames Morse <james.morse@arm.com>
      Signed-off-by: default avatarPratyush Anand <panand@redhat.com>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      98ab10e9
    • Ard Biesheuvel's avatar
      arm64: kernel: re-export _cpu_resume() from sleep.S · dc002475
      Ard Biesheuvel authored
      Commit b5fe2429 ("arm64: kernel: fix style issues in sleep.S")
      changed the linkage of _cpu_resume() to local, even though the symbol
      is also referenced from hibernate.c. So revert this change.
      Signed-off-by: default avatarArd Biesheuvel <ard.biesheuvel@linaro.org>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      dc002475
    • James Morse's avatar
      arm64: Drop generic xlate_dev_mem_{k,}ptr() · f928c16d
      James Morse authored
      The code that provides /dev/mem uses xlate_dev_mem_{k,}ptr() to
      avoid making a cachable mapping of a non-cachable area on ia64.
      On arm64 we do this via phys_mem_access_prot() instead, but provide
      dummy versions of xlate_dev_mem_{k,}ptr().
      
      These are the same as those in asm-generic/io.h, which we include from
      asm/io.h
      Signed-off-by: default avatarJames Morse <james.morse@arm.com>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      f928c16d
  6. 02 Sep, 2016 8 commits
  7. 01 Sep, 2016 4 commits
  8. 31 Aug, 2016 7 commits
  9. 26 Aug, 2016 4 commits
    • Will Deacon's avatar
      arm64: errata: Pass --fix-cortex-a53-843419 to ld if workaround enabled · 6ffe9923
      Will Deacon authored
      Cortex-A53 erratum 843419 is worked around by the linker, although it is
      a configure-time option to GCC as to whether ld is actually asked to
      apply the workaround or not.
      
      This patch ensures that we pass --fix-cortex-a53-843419 to the linker
      when both CONFIG_ARM64_ERRATUM_843419=y and the linker supports the
      option.
      Acked-by: default avatarArd Biesheuvel <ard.biesheuvel@linaro.org>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      6ffe9923
    • James Morse's avatar
      Revert "arm64: hibernate: Refuse to hibernate if the boot cpu is offline" · b2d8b0cb
      James Morse authored
      Now that we use the MPIDR to resume on the same CPU that we hibernated on,
      we no longer need to refuse to hibernate if the boot cpu is offline. (Which
      we can't possibly know if kexec causes logical CPUs to be renumbered).
      
      This reverts commit 1fe492ce.
      Signed-off-by: default avatarJames Morse <james.morse@arm.com>
      Acked-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      b2d8b0cb
    • James Morse's avatar
      arm64: hibernate: Resume when hibernate image created on non-boot CPU · 8ec058fd
      James Morse authored
      disable_nonboot_cpus() assumes that the lowest numbered online CPU is
      the boot CPU, and that this is the correct CPU to run any power
      management code on.
      
      On arm64 CPU0 can be taken offline. For hibernate/resume this means we
      may hibernate on a CPU other than CPU0. If the system is rebooted with
      kexec 'CPU0' will be assigned to a different CPU. This complicates
      hibernate/resume as now we can't trust the CPU numbers.
      
      We currently forbid hibernate if CPU0 has been hotplugged out to avoid
      this situation without kexec.
      
      Save the MPIDR of the CPU we hibernated on in the hibernate arch-header,
      use hibernate_resume_nonboot_cpu_disable() to direct which CPU we should
      resume on based on the MPIDR of the CPU we hibernated on. This allows us to
      hibernate/resume on any CPU, even if the logical numbers have been
      shuffled by kexec.
      Signed-off-by: default avatarJames Morse <james.morse@arm.com>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
      Reviewed-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      8ec058fd
    • James Morse's avatar
      cpu/hotplug: Allow suspend/resume CPU to be specified · d391e552
      James Morse authored
      disable_nonboot_cpus() assumes that the lowest numbered online CPU is
      the boot CPU, and that this is the correct CPU to run any power
      management code on.
      
      On x86 this is always correct, as CPU0 cannot (easily) by taken offline.
      
      On arm64 CPU0 can be taken offline. For hibernate/resume this means we
      may hibernate on a CPU other than CPU0. If the system is rebooted with
      kexec 'CPU0' will be assigned to a different physical CPU. This
      complicates hibernate/resume as now we can't trust the CPU numbers.
      Arch code can find the correct physical CPU, and ensure it is online
      before resume from hibernate begins, but also needs to influence
      disable_nonboot_cpus()s choice of CPU.
      
      Rename disable_nonboot_cpus() as freeze_secondary_cpus() and add an
      argument indicating which CPU should be left standing. Follow the logic
      in migrate_to_reboot_cpu() to use the lowest numbered online CPU if the
      requested CPU is not online.
      Add disable_nonboot_cpus() as an inline function that has the existing
      behaviour.
      
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Reviewed-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Signed-off-by: default avatarJames Morse <james.morse@arm.com>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      d391e552