- 23 Aug, 2019 6 commits
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Jiaxun Yang authored
Simply replace with memblock functions. Signed-off-by:
Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by:
Paul Burton <paul.burton@mips.com> Cc: linux-mips@vger.kernel.org Cc: yasha.che3@gmail.com Cc: aurelien@aurel32.net Cc: sfr@canb.auug.org.au Cc: fancer.lancer@gmail.com Cc: matt.redfearn@mips.com Cc: chenhc@lemote.com
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Jiaxun Yang authored
It can be replaced by page_is_ram. Signed-off-by:
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Jiaxun Yang authored
boot_mem_map is nolonger exist so we need to maintain a list of prom memory by ourselves Signed-off-by:
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Jiaxun Yang authored
Current prom_free_prom_memory is freeing maps marked as BOOT_MEM_ROM_DATA, however, nobody is exactly setting this type for malta. Signed-off-by:
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Jiaxun Yang authored
boot_mem_map is nolonger exist so we need to maintain a list of prom memory by ourselves. Signed-off-by:
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Jiaxun Yang authored
Replace walk through boot_mem_map with for_each_memblock. And remove the check of total boot_mem_map. Signed-off-by:
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- 19 Aug, 2019 2 commits
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YueHaibing authored
While do COMPILE_TEST building, if GENERIC_IRQ_CHIP is not selected, it fails: drivers/irqchip/irq-ingenic-tcu.o: In function `ingenic_tcu_intc_cascade': irq-ingenic-tcu.c:(.text+0x13f): undefined reference to `irq_get_domain_generic_chip' drivers/irqchip/irq-ingenic-tcu.o: In function `ingenic_tcu_irq_init': irq-ingenic-tcu.c:(.init.text+0x97): undefined reference to `irq_generic_chip_ops' irq-ingenic-tcu.c:(.init.text+0xdd): undefined reference to `__irq_alloc_domain_generic_chips' irq-ingenic-tcu.c:(.init.text+0x10b): undefined reference to `irq_get_domain_generic_chip' select GENERIC_IRQ_CHIP to fix this. Reported-by:
Hulk Robot <hulkci@huawei.com> Fixes: 9536eba0 ("irqchip: Add irq-ingenic-tcu driver") Signed-off-by:
YueHaibing <yuehaibing@huawei.com> Acked-by:
Thomas Gleixner <tglx@linutronix.de> Signed-off-by:
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Christophe JAILLET authored
It should be OCTEON_SERIAL_LEN. Update the #define and use it accordingly Signed-off-by:
Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by:
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- 12 Aug, 2019 3 commits
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Nathan Chancellor authored
clang warns: arch/mips/mm/tlbex.c:634:19: error: use of logical '&&' with constant operand [-Werror,-Wconstant-logical-operand] if (cpu_has_rixi && _PAGE_NO_EXEC) { ^ ~~~~~~~~~~~~~ arch/mips/mm/tlbex.c:634:19: note: use '&' for a bitwise operation if (cpu_has_rixi && _PAGE_NO_EXEC) { ^~ & arch/mips/mm/tlbex.c:634:19: note: remove constant to silence this warning if (cpu_has_rixi && _PAGE_NO_EXEC) { ~^~~~~~~~~~~~~~~~ 1 error generated. Explicitly cast this value to a boolean so that clang understands we intend for this to be a non-zero value. Fixes: 00bf1c69 ("MIPS: tlbex: Avoid placing software PTE bits in Entry* PFN fields") Link: https://github.com/ClangBuiltLinux/linux/issues/609Signed-off-by:Nathan Chancellor <natechancellor@gmail.com> Signed-off-by:
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Nathan Chancellor authored
clang warns: arch/mips/include/asm/syscall.h:136:3: error: variable 'ret' is uninitialized when used here [-Werror,-Wuninitialized] ret |= mips_get_syscall_arg(args++, task, regs, i++); ^~~ arch/mips/include/asm/syscall.h:129:9: note: initialize the variable 'ret' to silence this warning int ret; ^ = 0 1 error generated. It's not wrong; however, it's not an issue in practice because ret is only assigned to, not read from. ret could just be initialized to zero but looking into it further, ret has been unused since it was first added in 2012 so just get rid of it and update mips_get_syscall_arg's return type since none of the return values are ever checked. If it is ever needed again, this commit can be reverted and ret can be properly initialized. Fixes: c0ff3c53 ("MIPS: Enable HAVE_ARCH_TRACEHOOK.") Link: https://github.com/ClangBuiltLinux/linux/issues/604Signed-off-by: -
Nathan Chancellor authored
clang warns: arch/mips/kernel/branch.c:148:8: error: variable 'bc_false' is used uninitialized whenever switch case is taken [-Werror,-Wsometimes-uninitialized] case mm_bc2t_op: ^~~~~~~~~~ arch/mips/kernel/branch.c:157:8: note: uninitialized use occurs here if (bc_false) ^~~~~~~~ arch/mips/kernel/branch.c:149:8: error: variable 'bc_false' is used uninitialized whenever switch case is taken [-Werror,-Wsometimes-uninitialized] case mm_bc1t_op: ^~~~~~~~~~ arch/mips/kernel/branch.c:157:8: note: uninitialized use occurs here if (bc_false) ^~~~~~~~ arch/mips/kernel/branch.c:142:4: note: variable 'bc_false' is declared here int bc_false = 0; ^ 2 errors generated. When mm_bc1t_op and mm_bc2t_op are taken, the bc_false initialization does not happen, which leads to a garbage value upon use, as illustrated below with a small sample program. $ mipsel-linux-gnu-gcc --version | head -n1 mipsel-linux-gnu-gcc (Debian 8.3.0-2) 8.3.0 $ clang --version | head -n1 ClangBuiltLinux clang version 9.0.0 (git://github.com/llvm/llvm-project 544315b4197034a3be8acd12cba56a75fb1f08dc) (based on LLVM 9.0.0svn) $ cat test.c #include <stdio.h> static void switch_scoped(int opcode) { switch (opcode) { case 1: case 2: { int bc_false = 0; bc_false = 4; case 3: case 4: printf("\t* switch scoped bc_false = %d\n", bc_false); } } } static void function_scoped(int opcode) { int bc_false = 0; switch (opcode) { case 1: case 2: { bc_false = 4; case 3: case 4: printf("\t* function scoped bc_false = %d\n", bc_false); } } } int main(void) { int opcode; for (opcode = 1; opcode < 5; opcode++) { printf("opcode = %d:\n", opcode); switch_scoped(opcode); function_scoped(opcode); printf("\n"); } return 0; } $ mipsel-linux-gnu-gcc -std=gnu89 -static test.c && \ qemu-mipsel a.out opcode = 1: * switch scoped bc_false = 4 * function scoped bc_false = 4 opcode = 2: * switch scoped bc_false = 4 * function scoped bc_false = 4 opcode = 3: * switch scoped bc_false = 2147483004 * function scoped bc_false = 0 opcode = 4: * switch scoped bc_false = 2147483004 * function scoped bc_false = 0 $ clang -std=gnu89 --target=mipsel-linux-gnu -m32 -static test.c && \ qemu-mipsel a.out opcode = 1: * switch scoped bc_false = 4 * function scoped bc_false = 4 opcode = 2: * switch scoped bc_false = 4 * function scoped bc_false = 4 opcode = 3: * switch scoped bc_false = 2147483004 * function scoped bc_false = 0 opcode = 4: * switch scoped bc_false = 2147483004 * function scoped bc_false = 0 Move the definition up so that we get the right behavior and mark it __maybe_unused as it will not be used when CONFIG_MIPS_FP_SUPPORT isn't enabled. Fixes: 6a1cc218 ("MIPS: branch: Remove FP branch handling when CONFIG_MIPS_FP_SUPPORT=n") Link: https://github.com/ClangBuiltLinux/linux/issues/603Signed-off-by:
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- 08 Aug, 2019 14 commits
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Paul Burton authored
Merge the Ingenic TCU patchset from the ingenic-tcu-v5.4 branch which was created to enable follow-on changes in other subsystems. Signed-off-by: -
Paul Cercueil authored
The old clocksource/timer platform code is now obsoleted by the newly introduced TCU drivers. Signed-off-by:
Paul Cercueil <paul@crapouillou.net> Tested-by:
Mathieu Malaterre <malat@debian.org> Tested-by:
Artur Rojek <contact@artur-rojek.eu> Signed-off-by:
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Paul Cercueil authored
The default clock (12 MHz) is too fast for the system timer. Signed-off-by:
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Paul Cercueil authored
The default clock (48 MHz) is too fast for the system timer. Signed-off-by:
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Paul Cercueil authored
The default clock (12 MHz) is too fast for the system timer, which fails to report time accurately. Signed-off-by:
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Paul Cercueil authored
Add DTS nodes for the JZ4780, JZ4770 and JZ4740 devicetree files. Signed-off-by:
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Paul Cercueil authored
Add the missing TCU clock to the list of clocks supplied by the CGU for the JZ4740 SoC. Signed-off-by:
Stephen Boyd <sboyd@kernel.org> Acked-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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Paul Cercueil authored
This driver handles the TCU (Timer Counter Unit) present on the Ingenic JZ47xx SoCs, and provides the kernel with a system timer, a clocksource and a sched_clock. Signed-off-by:
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Paul Cercueil authored
This driver handles the interrupt controller built in the Timer/Counter Unit (TCU) of the JZ47xx SoCs from Ingenic. Signed-off-by:
Marc Zyngier <maz@kernel.org> Signed-off-by:
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Paul Cercueil authored
Add driver to support the clocks provided by the Timer/Counter Unit (TCU) of the JZ47xx SoCs from Ingenic. Signed-off-by:
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Paul Cercueil authored
device_node_to_regmap() is exactly like syscon_node_to_regmap(), but it does not check that the node is compatible with "syscon", and won't attach the first clock it finds to the regmap. The rationale behind this, is that one device node with a standard compatible string "foo,bar" can be covered by multiple drivers sharing a regmap, or by a single driver doing all the job without a regmap, but these are implementation details which shouldn't reflect on the devicetree. Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
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Paul Cercueil authored
Add documentation about how to properly use the Ingenic TCU (Timer/Counter Unit) drivers from devicetree. Signed-off-by:
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Paul Cercueil authored
Add documentation about the Timer/Counter Unit (TCU) present in the Ingenic JZ47xx SoCs. The Timer/Counter Unit (TCU) in Ingenic JZ47xx SoCs is a multi-function hardware block. It features up to to eight channels, that can be used as counters, timers, or PWM. - JZ4725B, JZ4750, JZ4755 only have six TCU channels. The other SoCs all have eight channels. - JZ4725B introduced a separate channel, called Operating System Timer (OST). It is a 32-bit programmable timer. On JZ4770 and above, it is 64-bit. - Each one of the TCU channels has its own clock, which can be reparented to three different clocks (pclk, ext, rtc), gated, and reclocked, through their TCSR register. * The watchdog and OST hardware blocks also feature a TCSR register with the same format in their register space. * The TCU registers used to gate/ungate can also gate/ungate the watchdog and OST clocks. - Each TCU channel works in one of two modes: * mode TCU1: channels cannot work in sleep mode, but are easier to operate. * mode TCU2: channels can work in sleep mode, but the operation is a bit more complicated than with TCU1 channels. - The mode of each TCU channel depends on the SoC used: * On the oldest SoCs (up to JZ4740), all of the eight channels operate in TCU1 mode. * On JZ4725B, channel 5 operates as TCU2, the others operate as TCU1. * On newest SoCs (JZ4750 and above), channels 1-2 operate as TCU2, the others operate as TCU1. - Each channel can generate an interrupt. Some channels share an interrupt line, some don't, and this changes between SoC versions: * on older SoCs (JZ4740 and below), channel 0 and channel 1 have their own interrupt line; channels 2-7 share the last interrupt line. * On JZ4725B, channel 0 has its own interrupt; channels 1-5 share one interrupt line; the OST uses the last interrupt line. * on newer SoCs (JZ4750 and above), channel 5 has its own interrupt; channels 0-4 and (if eight channels) 6-7 all share one interrupt line; the OST uses the last interrupt line. Signed-off-by: -
Paul Cercueil authored
This header provides clock numbers for the ingenic,tcu DT binding. Signed-off-by:
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- 06 Aug, 2019 5 commits
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Arnd Bergmann authored
The generic vdso support adds the same #if hack in two places, asm/vdso/vdso.h and config-n32-o32-env.c, but only the second is actually used. The result lacks the BUILD_VDSO32_64 macro, and that triggers a build error: ./include/linux/page-flags-layout.h:95:2: error: #error "Not enough bits in page flags" Move the macro into the other place, and remove the duplicated bits. Reported-by:
Guenter Roeck <linux@roeck-us.net> Fixes: ee38d94a ("page flags: prioritize kasan bits over last-cpuid") Fixes: 24640f23 ("mips: Add support for generic vDSO") Signed-off-by:
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Paul Burton authored
ARCH_HAS_IRQ_PER_CPU is unused anywhere in the kernel - remove the definition. Signed-off-by: -
Paul Burton authored
The cpu_has_saa feature macro was added along with Cavium Octeon CPU support back in commit 5b3b1688 ("MIPS: Add Cavium OCTEON processor support files to arch/mips/cavium-octeon.") but has never been used. Remove the dead code. Signed-off-by:
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Zhou Yanjie authored
In order to further reduce power consumption, the XBurst core by default attempts to avoid branch target buffer lookups by detecting & special casing loops. This feature will cause BogoMIPS and lpj calculate in error. Set cp0 config7 bit 4 to disable this feature. Signed-off-by:
Zhou Yanjie <zhouyanjie@zoho.com> Signed-off-by:
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Zhou Yanjie authored
1.fix bugs when detecting L2 cache sets value. 2.fix bugs when detecting L2 cache ways value. Signed-off-by:
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- 30 Jul, 2019 10 commits
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Firoz Khan authored
The __SYSCALL macro's arguments are system call number, system call entry name and number of arguments for the system call. Argument- nargs in __SYSCALL(nr, entry, nargs) is neither calculated nor used anywhere. So it would be better to keep the implementaion as __SYSCALL(nr, entry). This will unifies the implementation with some other architetures too. Signed-off-by:
Firoz Khan <firoz.khan@linaro.org> Signed-off-by:
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Paul Cercueil authored
Remove all the source files that are not used anywhere anymore. Signed-off-by:
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Paul Cercueil authored
The JZ4740 boards now use the iio-hwmon driver. Signed-off-by:
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Paul Cercueil authored
It has been replaced with the more mature ingenic-battery driver. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com> Signed-off-by:
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Paul Cercueil authored
It has been replaced with the newer Ingenic NAND driver. Signed-off-by:
Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by:
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Paul Cercueil authored
The newer and better JZ4780 driver is now used to provide DMA functionality on the JZ4740. Signed-off-by:
Vinod Koul <vkoul@kernel.org> Signed-off-by:
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Paul Cercueil authored
The JZ4740 fbdev driver has been replaced with the ingenic-drm driver. Signed-off-by:
Sam Ravnborg <sam@ravnborg.org> Signed-off-by:
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Paul Cercueil authored
The board now uses the simple-audio-card driver. Signed-off-by:
Mark Brown <broonie@kernel.org> Signed-off-by:
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Paul Cercueil authored
Update the defconfig to select the new drivers instead of the old ones. Signed-off-by:
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Paul Cercueil authored
Move all the platform data to devicetree. The only bit dropped is the PWM beeper, which requires the PWM driver to be updated. I figured it's okay to remove it here since it's really a non-critical device, and it'll be re-introduced soon enough. The other change is the CS line of the SPI is now set as active low. The SPI core would have forced "active low" anyway, unless the 'spi-cs-high' property is set. In the process of moving to devicetree, we also switched to new drivers: - We use the simple-audio-card and simple-amplifier drivers instead of the custom ASoC code; - We use the new Ingenic DRM driver coupled with the GiantPlus GPM940B0 DRM panel driver instead of the old framebuffer driver; - We use the new jz4780-dma driver instead of the old jz4740-dma one; - We use the ingenic-nand and jz4740-ecc drivers instead of the old jz4740-nand driver; - We use ingenic-battery instead of jz4740-battery; - We use iio-hwmon instead of jz4740-hwmon; - We use ingenic-iio instead of the old jz4740-adc MFD driver. Signed-off-by:
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