1. 29 Oct, 2013 2 commits
    • Chunhe Lan's avatar
      powerpc/pci: Change the DECLARE_PCI_FIXUP_{HEADER => EARLY} macro of pci quirk · bbd234b1
      Chunhe Lan authored
      Freescale platform has class code = 0x0b2000, when it boots. This makes
      kernel PCI bus code to setup these devices resulting into the following
      notice information when trying to enable them:
      
      pci 0000:00:00.0: ignoring class 0x0b2000 (doesn't match header type 01)
      
      The above information is outputted by judging value of dev->class before
      pci_setup_device() function, and the DECLARE_PCI_FIXUP_HEADER quirk runs
      after pci_setup_device() function. But the DECLARE_PCI_FIXUP_EARLY quirk
      runs before judging value of dev->class and pci_setup_device() function.
      So we use the DECLARE_PCI_FIXUP_EARLY macro to fix this issue.
      Signed-off-by: default avatarChunhe Lan <Chunhe.Lan@freescale.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Paul Mackerras <paulus@samba.org>
      Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
      bbd234b1
    • Minghuan Lian's avatar
      powerpc/dts: fix sRIO error interrupt for b4860 · 0e3d4373
      Minghuan Lian authored
      For B4 platform, MPIC EISR register is in reversed bitmap order,
      instead of "Error interrupt source 0-31. Bit 0 represents SRC0."
      the correct ordering is "Error interrupt source 0-31. Bit 0
      represents SRC31." This patch is to fix sRIO EISR bit value
      of error interrupt in dts node.
      Signed-off-by: default avatarMinghuan Lian <Minghuan.Lian@freescale.com>
      Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
      0e3d4373
  2. 18 Oct, 2013 5 commits
  3. 16 Oct, 2013 4 commits
  4. 11 Oct, 2013 29 commits