- 16 May, 2014 40 commits
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Fabio Estevam authored
On imx35pdk there are two DRAM chip selects that are used: CS0 at 0x80000000 CS1 at 0x90000000 Each bank is connected to 128MB of DRAM, giving a total of 256MB of system DRAM. Fix the memory layout to describe the hardware appropriately. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Fabio Estevam authored
Add support for CAN based on a MCP2515 connected to ECSPI1. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Iain Paton authored
add element14s RIoTboard http://www.riotboard.org which is an i.MX6Solo based design targeted at makers. Signed-off-by: Iain Paton<ipaton0@gmail.com> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Iain Paton authored
add missing i2c4 clock and correct the compatible string to match other imx6 i2c blocks Signed-off-by: Iain Paton<ipaton0@gmail.com> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Silvio Fricke authored
Signed-off-by: Silvio Fricke <silvio.fricke@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Sascha Hauer authored
We should use hardware ecc on i.MX. While at it, add the optional nand-bus-width property. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Sascha Hauer authored
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Sascha Hauer authored
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Sascha Hauer authored
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Sascha Hauer authored
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Sascha Hauer authored
The dts relied on the FEC pad ctrl settings from the bootloader by using the NO_PAD_CTRL option. This breaks once the bootloader starts initializing the pad ctrl settings from the same dts file. Change to real pad ctrl settings taken from the platform based babbage support. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Fabio Estevam authored
USDHC4 is connected to a DDR MMC. Add support for it. Signed-off-by: Dong Aisheng <b29396@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Russell King authored
Add the HDMI DT configuration for the SolidRun HummingBoard and Cubox-i. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Lucas Stach authored
Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Lucas Stach authored
Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Fabio Estevam authored
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Sascha Hauer authored
This adds the stdout-path property to various i.MX boards. Values of the property have been taken from barebox, so they should be correct. Also, the older linux,stdout-path property is converted to stdout-path. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Tim Harvey authored
The GW52xx supports LVDS on channel 0. Remove the obsolete crtcs node and add display timings for the HanStar HSD100PXN1 display. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Tim Harvey authored
The GW54xx/GW53xx/GW52xx all support LVDS with a PWM controlled backlight. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Lucas Stach authored
This isn't compatible with the new binding and should be handled via a proper regulator. It shouldn't be needed as the driver has always ignored this property. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Lucas Stach authored
The new bindings drops one clock, renames the others and drops the old interrupt mapping. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Fabio Estevam authored
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Alexander Shiyan authored
Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Alexander Shiyan authored
This patch adds a GPIO fixed regulator which used on RDK to enable CSI bus. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Alexander Shiyan authored
This patch removes excess "#address-cells" and "#size-cells" entries for PMIC, since these entries is not used. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Alexander Shiyan authored
USB PWR and OC pins are used as GPIOs for different purposes, so add "disable-over-current" property for OTG node to indicate this. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Alexander Shiyan authored
FEC reset GPIO is active low. Fix this typo. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Alexander Shiyan authored
"compatible", "#address-cells" and "#size-cells" for USB PHY are already described in the SOM DTS. Remove these duplicate entries. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Tim Harvey authored
Configure ddc and enable HDMI Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Marek Vasut authored
Add support for the PCI express bus available on MX6 SabreSDP. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Fabio Estevam authored
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Fabio Estevam authored
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Fabio Estevam authored
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Fabio Estevam authored
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Philipp Zabel authored
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Fabio Estevam authored
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Fabio Estevam authored
It is not a good approach to have the USB PHY nodes inside imx27.dtsi since the USB PHYs on mx27 are not internal to the SoC. Place the USB PHY nodes in the board dts files instead. Also, each board may have a different clock source for the USB PHY, so do not hardcode it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Fabio Estevam authored
USB Host1, Host2 and OTG are gated via 'usb_ipg_gate' clock, so fix it in order to avoid the following kernel oops: usbcore: registered new interface driver usb-storage 10024000.usb supply vbus not found, using dummy regulator Unhandled fault: external abort on non-linefetch (0x808) at 0xf4424184 Internal error: : 808 [#1] PREEMPT ARM Modules linked in: CPU: 0 PID: 1 Comm: swapper Not tainted 3.15.0-rc1-26325-g971f9fd-dirty #64 task: c7829aa0 ti: c7836000 task.ti: c7836000 PC is at ci_hdrc_probe+0x3a4/0x634 LR is at ci_hdrc_probe+0x100/0x634 pc : [<c036cc78>] lr : [<c036c9d4>] psr: 60000013 sp : c7837d48 ip : 00000001 fp : 00000000 r10: 00000000 r9 : 00000000 r8 : c791b6c0 r7 : c7945000 r6 : f4424000 r5 : c7945010 r4 : c794e010 r3 : f4424184 r2 : 00000000 r1 : 8c000004 r0 : 0c000004 Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel Control: 0005317f Table: a0004000 DAC: 00000017 Process swapper (pid: 1, stack limit = 0xc78361c0) Stack: (0xc7837d48 to 0xc7838000) Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Fabio Estevam authored
The hardware is better described if we place the PMIC IRQ GPIO into its own pingroup. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Fabio Estevam authored
imx27-pdk has a MC13783 PMIC connected to CSPI2 port. Add support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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