- 28 Feb, 2018 2 commits
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Stefan Agner authored
Add Colibri UART_A as default serial console. Signed-off-by:
Stefan Agner <stefan@agner.ch> Reviewed-by:
Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Fabio Estevam authored
Pass the memory unit-adress to fix the following build warnings with W=1: Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name There are cases where dts passes an empty memory node, which will be filled by the bootloader. Passing the memory base address still allows the bootloader to fill the memory size. Signed-off-by:
Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by:
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- 24 Feb, 2018 7 commits
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Lothar Waßmann authored
According to the "i.MX 6Solo/6DualLite Applications Processor Reference Manual" Rev. 3, 09/2017 there is no LCDIF unit on the i.MX6DL. Signed-off-by:
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Baruch Siach authored
There is no pinctrl_usbotg_2 node in current Hummingboard dts files. Drop reference to that. Signed-off-by:
Baruch Siach <baruch@tkos.co.il> Reviewed-by:
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Jon Nettleton authored
Fix the USBOTG-ID pin to the correct definition. The top USB port stays in device-mode without this change. Signed-off-by:
Jon Nettleton <jon@solid-run.com> Signed-off-by:
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Fabio Estevam authored
Pass the memory unit name in order to fix the following dtc warning with W=1: arch/arm/boot/dts/imx28-tx28.dtb: Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name Signed-off-by:
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Lucas Stach authored
They aren't needed by the etnaviv driver anymore and have been removed from the binding. Signed-off-by:
Lucas Stach <l.stach@pengutronix.de> Reviewed-by:
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Lucas Stach authored
None of the slots support 1.8V signaling or SDIO. There is no point in probing for a SD card on the eMMC controller. Signed-off-by:
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Ken Lin authored
Add support for Advantech DMS-BA16 board, which uses the Advantech BA-16 module. Signed-off-by:
Ken Lin <yungching0725@gmail.com> Reviewed-by:
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- 12 Feb, 2018 31 commits
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Stefan Agner authored
Add support for the Computer on Module Colibri iMX6ULL and its Bluetooth/Wifi variant along with the development/evaluation carrier board device trees. Follow the usual hierarchic include model, maintaining shared configuration in imx6ull-colibri.dtsi and imx6ull-colibri-eval-v3.dtsi respectively. Signed-off-by:
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Jörg Krause authored
This is a rebased version of patch [0]. The 32 kHz reference clock on the i.MX6UL(L) can be output by setting the external signal XTALOSC_REF_CLK_32K in one of the following ways [1]: |----------------------------------------------------------| | Signal | Pad | Mode | Direction | |----------------------------------------------------------| | XTALOSC_REF_CLK_32K | ENET1_RX_EN | ALT2 | O | | | GPIO1_IO03 | ALT3 | | | | JTAG_TCK | ALT6 | | |----------------------------------------------------------| Before patch [2] the mux mode for the external reference clock was missing. The patch named the mux mode as used in the NXP Linux 4.9.11_1.0.0 release, but the Reference Manual uses the name OSC32K_32K_OUT, e.g. in [3]. As Philipp and Shawn suggest the name from the RM should be used instead. [0] https://patchwork.kernel.org/patch/10172187/ [1] IMX6ULRM, Rev. 1, 04/2016, Table 58-1, p. 3649 [2] https://patchwork.kernel.org/patch/10156121/ [3] IMX6ULRM, Rev. 1, 04/2016, 30.5.47 SW_MUX_CTL_PAD_ENET1_RX_EN SW MUX Control Register (IOMUXC_SW_MUX_CTL_PAD_ENET1_RX_EN), p. 1357 Signed-off-by:
Jörg Krause <joerg.krause@embedded.rocks> Reviewed-by:
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Lothar Waßmann authored
imx6ull-14x14-evk.dts currently includes the imx6ul.dtsi file for an i.MX6ULL SoC which is plain wrong. Rename the current imx6ul-14x14-evk.dts to .dtsi and include it from imx6ul-14x14-evk.dts and imx6ull-14x14-evk.dts, so that both can include the appropriate SoC specific (imx6ul.dtsi/imx6ull.dtsi) file. Signed-off-by:
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Peter Senna Tschudin authored
Enable secure debug enable register access for Bx50v3 devices to enable PMU and hardware counters for perf. Signed-off-by:
Peter Senna Tschudin <peter.senna@collabora.com> Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.co.uk> Reviewed-by:
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Fabio Estevam authored
Put the UART clock node directly under root with a unique node name and drop unit-address in order to fix the following build warning with W=1: arch/arm/boot/dts/imx27-eukrea-mbimxsd27-baseboard.dtb: Warning (simple_bus_reg): Node /clocks/osc26m missing or empty reg/ranges property Signed-off-by:
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Aapo Vienamo authored
The missing last digit of the CONFIG values is added. Looks like a typo of some sort when comparing to the downstream dt. This fixes intermittent behavior behaviour of the ethernet controllers. Signed-off-by:
Aapo Vienamo <aapo@tuxera.com> Signed-off-by:
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Benoît Thébaudeau authored
The eSDHC does not work properly if the SION bit is not set for the bidirectional CMD signal, whatever the eSDHC instance and the selected pad. Therefore, setting SION is mandatory for all eSDHC CMD ports. Do this for MX25_PAD_*__ESDHCn_CMD in imx25-pinfunc.h in order to enforce this behavior for all boards. This had already been done for eSDHC1, but not for eSDHC2. Also, define MX25_PAD_FEC_MDC__ESDHC2_CMD so that all the possible cases are covered from now on. Signed-off-by:
Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com> Reviewed-by:
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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Benoît Thébaudeau authored
This file had several naming inconsistencies for eSDHC: - the instances were named sometimes SDn, sometimes SDHCn, whereas they are named ESDHCn in the reference manual, e.g.: MX25_PAD_SD1_CMD__SD1_CMD MX25_PAD_D15__SDHC1_DAT7 - the data ports were named sometimes DATAn, sometimes DATn like in the reference manual, e.g.: MX25_PAD_SD1_DATA0__SD1_DATA0 MX25_PAD_D15__SDHC1_DAT7 - in one case, the clock port was named DAT_CLK instead of CLK: MX25_PAD_CSI_D7__SDHC2_DAT_CLK This change: - introduces new definitions using the naming from the reference manual, - keeps definitions using the legacy naming in order not to break compatibility for out-of-tree users (they can be removed later), - updates the in-tree files that were using the legacy naming. Signed-off-by: -
Bartosz Golaszewski authored
Using 'at24' as fallback is now deprecated - use the full 'atmel,<model>' string. Signed-off-by:
Bartosz Golaszewski <brgl@bgdev.pl> Signed-off-by:
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Bartosz Golaszewski authored
Using 'at' as the <manufacturer> part of the compatible string is now deprecated. Use a correct string: 'atmel,<model>'. Signed-off-by:
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Bartosz Golaszewski authored
Using 'at' as the <manufacturer> part of the compatible string is now deprecated. Use a correct string: 'atmel,<model>'. Signed-off-by:
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Marco Franchi authored
Fix the following warnings from dtc by adding the unit name to memory nodes: Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name Converted using the following command: perl -p0777i -e 's/memory \{\n\t\treg = \<0x+([0-9a-f])/memory\@$1$\0000000 \{\n\t\treg = <0x$1/m' `find ./arch/arm/boot/dts -name "imx*"` The files below were manually fixed: -imx1-ads.dts -imx1-apf9328.dts -imx6q-pistachio.dts Signed-off-by:Marco Franchi <marco.franchi@nxp.com> Reviewed-by:
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Marco Franchi authored
Remove the empty reg property from the SoC dtsi files in order to avoid duplicate memory nodes when the correct size is passed in board dts files. Signed-off-by:
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Marco Franchi authored
In preparation for removing 'reg = <0 0>;' from the dtsi SoC files, pass 'reg = <0 0 >;' to the dts/dtsi board files that do not pass the memory size. Signed-off-by:
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Anson Huang authored
Add ARM power domain in PGC. Signed-off-by:
Anson Huang <Anson.Huang@nxp.com> Reviewed-by:
Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by:
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Anson Huang authored
Add PU power domain support, GPU is the only module inside PU power domain, and PU power is supplied by LDO_SOC. Signed-off-by:
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Ryan Harkin authored
This patch configures the board to output UART6 to the mikroBus. The NXP WaRP7 board can route UART6 to the mikroBus, where an RS232 click board can be plugged in to get an additional serial port. Signed-off-by:
Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by:
Rui Miguel Silva <rui.silva@linaro.org> Reviewed-by:
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Ian Ray authored
Default boot medium must be internal eMMC, we don't want the SDIO to be used for these devices. This commit disables the SD card interface for GE Healthcare Bx50v3 devices. Signed-off-by:
Ian Ray <ian.ray@ge.com> Signed-off-by:
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Sebastian Reichel authored
PPD uses the PMIC's TSI pins in general purpose ADC mode. Signed-off-by:
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Martyn Welch authored
Utilise new support in Atmel MaxTouch driver to drive the touchscreen controllers reset line correctly. Signed-off-by:
Martyn Welch <martyn.welch@collabora.co.uk> Signed-off-by:
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Stefan Agner authored
In i.MX 6ULL UART8 is part of the AIPS-3 memory map instead of AIPS-1. Clocks and interrupts remain the same. Signed-off-by:
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Stefan Agner authored
The i.MX 6ULL features another IOMUX Controller called IOMUXC SNVS which allows to control BOOT_MODE and TAMPER pins. Add the controller to the i.MX 6ULL specific imx6ull.dtsi device tree. Signed-off-by:
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Stefan Agner authored
Add per-core ARM architected timer. Unfortunately bootloaders (U-Boot) currently do not make the necessary initialization. Also specifing the clock manually using the clock-frequency property seems not to help. Therefor leave the timer disabled by default for now. Signed-off-by:
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Stefan Agner authored
The Cortex-A7 and its GIC support virtualization extensions. To make use of them the CPU private interrupt needs to be specified. Signed-off-by:
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Bai Ping authored
On i.MX 6ULL, the pin MUX and CTRL register of BOOT_MODEx and TAMPERx pins are available through IOMUXC_SNVS. Add additional pinfunc defines. Signed-off-by:
Bai Ping <ping.bai@nxp.com> Signed-off-by:
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Fugang Duan authored
Add previously missing daisy chain configurations and several additional pinmux options. Synchronized with NXP Linux 4.9.11_1.0.0 release. Signed-off-by:
Fugang Duan <fugang.duan@nxp.com> Signed-off-by:
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Enrico Scholz authored
Add support for the PHYTEC phyBOARD-Mira with i.MX 6QuadPlus with NAND. It is based on the phyBOARD-Mira with i.MX 6Quad/Dual and supports the same interfaces. Signed-off-by:
Enrico Scholz <enrico.scholz@sigma-chemnitz.de> Signed-off-by:
Stefan Lengfeld <s.lengfeld@phytec.de> Signed-off-by:
Christian Hemp <c.hemp@phytec.de> Signed-off-by:
Stefan Riedmueller <s.riedmueller@phytec.de> Reviewed-by:
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Christian Hemp authored
Add support for the PHYTEC phyBOARD-Mira Low-Cost Rapid Development Kit with i.MX 6DualLight/Solo with NAND. Following interfaces are supported: - 100 MBit Ethernet - USB Host - RS232 - HDMI Signed-off-by:
Stefan Christ <s.christ@phytec.de> Signed-off-by:
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Christian Hemp authored
Add support for the PHYTEC phyBOARD-Mira Rapid Development Kit with i.MX 6Quad/Dual with eMMC or NAND. Following interfaces are supported: - Gigabit Ethernet - USB Host - CAN - RS232 - PCIe - LVDS - HDMI Signed-off-by:
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Stefan Riedmueller authored
This patch adds basic support for PHYTEC phyBOARD-Mira as carrier board for PHYTEC phyCORE-i.MX 6. Signed-off-by:
Christoph Fritz <chf.fritz@googlemail.com> Signed-off-by:
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Stefan Riedmueller authored
This patch adds basic support for PHYTEC phyCORE-i.MX 6 SOM with i.MX 6Quad/Dual or i.MX 6DualLight/Solo. Signed-off-by:
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