• Stefan Roese's avatar
    [POWERPC] 4xx: Fix TLB 0 problem with CONFIG_SERIAL_TEXT_DEBUG · f4151b9b
    Stefan Roese authored
    Right now TLB entry 0 ist used as UART0 mapping for the early debug
    output (via CONFIG_SERIAL_TEXT_DEBUG). This causes problems when many
    TLB's get used upon Linux bootup (e.g. while PCIe scanning behind
    bridges and/or switches on 440SPe platforms). This will overwrite the
    TLB 0 entry and further debug output's may crash/hang the system.
    
    This patch moves the early debug UART0 TLB entry from 0 to 62 as done
    in arch/powerpc. This way it is in the "pinned" area and will not get
    overwritten. Also the arch/ppc/mm/44x_mmu.c code is now synced with the
    newer code from arch/powerpc.
    Signed-off-by: default avatarStefan Roese <sr@denx.de>
    Signed-off-by: default avatarJosh Boyer <jwboyer@linux.vnet.ibm.com>
    f4151b9b
head_44x.S 19.9 KB