Commit 11e03d69 authored by Sibi Sankar's avatar Sibi Sankar Committed by Bjorn Andersson

arm64: dts: qcom: sc7280: Fixup the cpufreq node

Fixup the register regions used by the cpufreq node on SC7280 SoC to
support per core L3 DCVS.

Fixes: 7dbd121a ("arm64: dts: qcom: sc7280: Add cpufreq hw node")
Signed-off-by: default avatarSibi Sankar <sibis@codeaurora.org>
Reviewed-by: default avatarStephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1627581885-32165-4-git-send-email-sibis@codeaurora.orgSigned-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent 53bc6b41
...@@ -1795,9 +1795,9 @@ rpmhcc: clock-controller { ...@@ -1795,9 +1795,9 @@ rpmhcc: clock-controller {
cpufreq_hw: cpufreq@18591000 { cpufreq_hw: cpufreq@18591000 {
compatible = "qcom,cpufreq-epss"; compatible = "qcom,cpufreq-epss";
reg = <0 0x18591000 0 0x1000>, reg = <0 0x18591100 0 0x900>,
<0 0x18592000 0 0x1000>, <0 0x18592100 0 0x900>,
<0 0x18593000 0 0x1000>; <0 0x18593100 0 0x900>;
clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
clock-names = "xo", "alternate"; clock-names = "xo", "alternate";
#freq-domain-cells = <1>; #freq-domain-cells = <1>;
......
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