Commit 1553d968 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'rproc-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/andersson/remoteproc

Pull remoteproc updates from Bjorn Andersson:
 "This introduces support for the Mediatek MT9182 SCP and controlling
  the Cortex R5F processors found in TI K3 platforms. It clones the
  longstanding debugfs interface for controlling crash handling to
  sysfs. Lastly it solves a bug where after a warm reset of Qualcomm
  platforms the modem would crash upon first boot"

* tag 'rproc-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/andersson/remoteproc:
  remoteproc/mediatek: Remove non-standard dsb()
  remoteproc: Add recovery configuration to the sysfs interface
  remoteproc: Add coredump as part of sysfs interface
  remoteproc: Change default dump configuration to "disabled"
  remoteproc: k3-r5: Add loading support for on-chip SRAM regions
  remoteproc: k3-r5: Initialize TCM memories for ECC
  remoteproc: k3-r5: Add a remoteproc driver for R5F subsystem
  dt-bindings: remoteproc: Add bindings for R5F subsystem on TI K3 SoCs
  remoteproc/mediatek: Add support for mt8192 SCP
  remoteproc: Fixup coredump debugfs disable request
  remoteproc: qcom_q6v5: Assign mpss region to Q6 before MBA boot
  remoteproc/mediatek: fix null pointer dereference on null scp pointer
  remoteproc: stm32: Fix pointer assignement
  remoteproc: scp: add COMPILE_TEST dependency
parents 3fec0eaa 141bc97c
...@@ -58,3 +58,47 @@ Description: Remote processor name ...@@ -58,3 +58,47 @@ Description: Remote processor name
Reports the name of the remote processor. This can be used by Reports the name of the remote processor. This can be used by
userspace in exactly identifying a remote processor and ease userspace in exactly identifying a remote processor and ease
up the usage in modifying the 'firmware' or 'state' files. up the usage in modifying the 'firmware' or 'state' files.
What: /sys/class/remoteproc/.../coredump
Date: July 2020
Contact: Bjorn Andersson <bjorn.andersson@linaro.org>, Ohad Ben-Cohen <ohad@wizery.com>
Description: Remote processor coredump configuration
Reports the coredump configuration of the remote processor,
which will be one of:
"disabled"
"enabled"
"inline"
"disabled" means no dump will be collected.
"enabled" means when the remote processor's coredump is
collected it will be copied to a separate buffer and that
buffer is exposed to userspace.
"inline" means when the remote processor's coredump is
collected userspace will directly read from the remote
processor's device memory. Extra buffer will not be used to
copy the dump. Also recovery process will not proceed until
all data is read by usersapce.
What: /sys/class/remoteproc/.../recovery
Date: July 2020
Contact: Bjorn Andersson <bjorn.andersson@linaro.org>, Ohad Ben-Cohen <ohad@wizery.com>
Description: Remote processor recovery mechanism
Reports the recovery mechanism of the remote processor,
which will be one of:
"enabled"
"disabled"
"enabled" means, the remote processor will be automatically
recovered whenever it crashes. Moreover, if the remote
processor crashes while recovery is disabled, it will
be automatically recovered too as soon as recovery is enabled.
"disabled" means, a remote processor will remain in a crashed
state if it crashes. This is useful for debugging purposes;
without it, debugging a crash is substantially harder.
...@@ -275,6 +275,19 @@ config TI_K3_DSP_REMOTEPROC ...@@ -275,6 +275,19 @@ config TI_K3_DSP_REMOTEPROC
It's safe to say N here if you're not interested in utilizing It's safe to say N here if you're not interested in utilizing
the DSP slave processors. the DSP slave processors.
config TI_K3_R5_REMOTEPROC
tristate "TI K3 R5 remoteproc support"
depends on ARCH_K3
select MAILBOX
select OMAP2PLUS_MBOX
help
Say m here to support TI's R5F remote processor subsystems
on various TI K3 family of SoCs through the remote processor
framework.
It's safe to say N here if you're not interested in utilizing
a slave processor.
endif # REMOTEPROC endif # REMOTEPROC
endmenu endmenu
...@@ -33,3 +33,4 @@ obj-$(CONFIG_ST_REMOTEPROC) += st_remoteproc.o ...@@ -33,3 +33,4 @@ obj-$(CONFIG_ST_REMOTEPROC) += st_remoteproc.o
obj-$(CONFIG_ST_SLIM_REMOTEPROC) += st_slim_rproc.o obj-$(CONFIG_ST_SLIM_REMOTEPROC) += st_slim_rproc.o
obj-$(CONFIG_STM32_RPROC) += stm32_rproc.o obj-$(CONFIG_STM32_RPROC) += stm32_rproc.o
obj-$(CONFIG_TI_K3_DSP_REMOTEPROC) += ti_k3_dsp_remoteproc.o obj-$(CONFIG_TI_K3_DSP_REMOTEPROC) += ti_k3_dsp_remoteproc.o
obj-$(CONFIG_TI_K3_R5_REMOTEPROC) += ti_k3_r5_remoteproc.o
...@@ -32,6 +32,23 @@ ...@@ -32,6 +32,23 @@
#define MT8183_SCP_CACHESIZE_8KB BIT(8) #define MT8183_SCP_CACHESIZE_8KB BIT(8)
#define MT8183_SCP_CACHE_CON_WAYEN BIT(10) #define MT8183_SCP_CACHE_CON_WAYEN BIT(10)
#define MT8192_L2TCM_SRAM_PD_0 0x210C0
#define MT8192_L2TCM_SRAM_PD_1 0x210C4
#define MT8192_L2TCM_SRAM_PD_2 0x210C8
#define MT8192_L1TCM_SRAM_PDN 0x2102C
#define MT8192_CPU0_SRAM_PD 0x21080
#define MT8192_SCP2APMCU_IPC_SET 0x24080
#define MT8192_SCP2APMCU_IPC_CLR 0x24084
#define MT8192_SCP_IPC_INT_BIT BIT(0)
#define MT8192_SCP2SPM_IPC_CLR 0x24094
#define MT8192_GIPC_IN_SET 0x24098
#define MT8192_HOST_IPC_INT_BIT BIT(0)
#define MT8192_CORE0_SW_RSTN_CLR 0x30000
#define MT8192_CORE0_SW_RSTN_SET 0x30004
#define MT8192_CORE0_WDT_CFG 0x30034
#define SCP_FW_VER_LEN 32 #define SCP_FW_VER_LEN 32
#define SCP_SHARE_BUFFER_SIZE 288 #define SCP_SHARE_BUFFER_SIZE 288
...@@ -50,6 +67,19 @@ struct scp_ipi_desc { ...@@ -50,6 +67,19 @@ struct scp_ipi_desc {
void *priv; void *priv;
}; };
struct mtk_scp;
struct mtk_scp_of_data {
int (*scp_before_load)(struct mtk_scp *scp);
void (*scp_irq_handler)(struct mtk_scp *scp);
void (*scp_reset_assert)(struct mtk_scp *scp);
void (*scp_reset_deassert)(struct mtk_scp *scp);
void (*scp_stop)(struct mtk_scp *scp);
u32 host_to_scp_reg;
u32 host_to_scp_int_bit;
};
struct mtk_scp { struct mtk_scp {
struct device *dev; struct device *dev;
struct rproc *rproc; struct rproc *rproc;
...@@ -58,6 +88,8 @@ struct mtk_scp { ...@@ -58,6 +88,8 @@ struct mtk_scp {
void __iomem *sram_base; void __iomem *sram_base;
size_t sram_size; size_t sram_size;
const struct mtk_scp_of_data *data;
struct mtk_share_obj __iomem *recv_buf; struct mtk_share_obj __iomem *recv_buf;
struct mtk_share_obj __iomem *send_buf; struct mtk_share_obj __iomem *send_buf;
struct scp_run run; struct scp_run run;
......
...@@ -124,9 +124,6 @@ static int scp_ipi_init(struct mtk_scp *scp) ...@@ -124,9 +124,6 @@ static int scp_ipi_init(struct mtk_scp *scp)
size_t send_offset = SCP_FW_END - sizeof(struct mtk_share_obj); size_t send_offset = SCP_FW_END - sizeof(struct mtk_share_obj);
size_t recv_offset = send_offset - sizeof(struct mtk_share_obj); size_t recv_offset = send_offset - sizeof(struct mtk_share_obj);
/* Disable SCP to host interrupt */
writel(MT8183_SCP_IPC_INT_BIT, scp->reg_base + MT8183_SCP_TO_HOST);
/* shared buffer initialization */ /* shared buffer initialization */
scp->recv_buf = scp->recv_buf =
(struct mtk_share_obj __iomem *)(scp->sram_base + recv_offset); (struct mtk_share_obj __iomem *)(scp->sram_base + recv_offset);
...@@ -138,7 +135,7 @@ static int scp_ipi_init(struct mtk_scp *scp) ...@@ -138,7 +135,7 @@ static int scp_ipi_init(struct mtk_scp *scp)
return 0; return 0;
} }
static void scp_reset_assert(const struct mtk_scp *scp) static void mt8183_scp_reset_assert(struct mtk_scp *scp)
{ {
u32 val; u32 val;
...@@ -147,7 +144,7 @@ static void scp_reset_assert(const struct mtk_scp *scp) ...@@ -147,7 +144,7 @@ static void scp_reset_assert(const struct mtk_scp *scp)
writel(val, scp->reg_base + MT8183_SW_RSTN); writel(val, scp->reg_base + MT8183_SW_RSTN);
} }
static void scp_reset_deassert(const struct mtk_scp *scp) static void mt8183_scp_reset_deassert(struct mtk_scp *scp)
{ {
u32 val; u32 val;
...@@ -156,17 +153,19 @@ static void scp_reset_deassert(const struct mtk_scp *scp) ...@@ -156,17 +153,19 @@ static void scp_reset_deassert(const struct mtk_scp *scp)
writel(val, scp->reg_base + MT8183_SW_RSTN); writel(val, scp->reg_base + MT8183_SW_RSTN);
} }
static irqreturn_t scp_irq_handler(int irq, void *priv) static void mt8192_scp_reset_assert(struct mtk_scp *scp)
{ {
struct mtk_scp *scp = priv; writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET);
u32 scp_to_host; }
int ret;
ret = clk_prepare_enable(scp->clk); static void mt8192_scp_reset_deassert(struct mtk_scp *scp)
if (ret) { {
dev_err(scp->dev, "failed to enable clocks\n"); writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_CLR);
return IRQ_NONE; }
}
static void mt8183_scp_irq_handler(struct mtk_scp *scp)
{
u32 scp_to_host;
scp_to_host = readl(scp->reg_base + MT8183_SCP_TO_HOST); scp_to_host = readl(scp->reg_base + MT8183_SCP_TO_HOST);
if (scp_to_host & MT8183_SCP_IPC_INT_BIT) if (scp_to_host & MT8183_SCP_IPC_INT_BIT)
...@@ -177,6 +176,40 @@ static irqreturn_t scp_irq_handler(int irq, void *priv) ...@@ -177,6 +176,40 @@ static irqreturn_t scp_irq_handler(int irq, void *priv)
/* SCP won't send another interrupt until we set SCP_TO_HOST to 0. */ /* SCP won't send another interrupt until we set SCP_TO_HOST to 0. */
writel(MT8183_SCP_IPC_INT_BIT | MT8183_SCP_WDT_INT_BIT, writel(MT8183_SCP_IPC_INT_BIT | MT8183_SCP_WDT_INT_BIT,
scp->reg_base + MT8183_SCP_TO_HOST); scp->reg_base + MT8183_SCP_TO_HOST);
}
static void mt8192_scp_irq_handler(struct mtk_scp *scp)
{
u32 scp_to_host;
scp_to_host = readl(scp->reg_base + MT8192_SCP2APMCU_IPC_SET);
if (scp_to_host & MT8192_SCP_IPC_INT_BIT)
scp_ipi_handler(scp);
else
scp_wdt_handler(scp, scp_to_host);
/*
* SCP won't send another interrupt until we clear
* MT8192_SCP2APMCU_IPC.
*/
writel(MT8192_SCP_IPC_INT_BIT,
scp->reg_base + MT8192_SCP2APMCU_IPC_CLR);
}
static irqreturn_t scp_irq_handler(int irq, void *priv)
{
struct mtk_scp *scp = priv;
int ret;
ret = clk_prepare_enable(scp->clk);
if (ret) {
dev_err(scp->dev, "failed to enable clocks\n");
return IRQ_NONE;
}
scp->data->scp_irq_handler(scp);
clk_disable_unprepare(scp->clk); clk_disable_unprepare(scp->clk);
return IRQ_HANDLED; return IRQ_HANDLED;
...@@ -238,20 +271,10 @@ static int scp_elf_load_segments(struct rproc *rproc, const struct firmware *fw) ...@@ -238,20 +271,10 @@ static int scp_elf_load_segments(struct rproc *rproc, const struct firmware *fw)
return ret; return ret;
} }
static int scp_load(struct rproc *rproc, const struct firmware *fw) static int mt8183_scp_before_load(struct mtk_scp *scp)
{ {
const struct mtk_scp *scp = rproc->priv; /* Clear SCP to host interrupt */
struct device *dev = scp->dev; writel(MT8183_SCP_IPC_INT_BIT, scp->reg_base + MT8183_SCP_TO_HOST);
int ret;
ret = clk_prepare_enable(scp->clk);
if (ret) {
dev_err(dev, "failed to enable clocks\n");
return ret;
}
/* Hold SCP in reset while loading FW. */
scp_reset_assert(scp);
/* Reset clocks before loading FW */ /* Reset clocks before loading FW */
writel(0x0, scp->reg_base + MT8183_SCP_CLK_SW_SEL); writel(0x0, scp->reg_base + MT8183_SCP_CLK_SW_SEL);
...@@ -272,6 +295,63 @@ static int scp_load(struct rproc *rproc, const struct firmware *fw) ...@@ -272,6 +295,63 @@ static int scp_load(struct rproc *rproc, const struct firmware *fw)
scp->reg_base + MT8183_SCP_CACHE_CON); scp->reg_base + MT8183_SCP_CACHE_CON);
writel(MT8183_SCP_CACHESIZE_8KB, scp->reg_base + MT8183_SCP_DCACHE_CON); writel(MT8183_SCP_CACHESIZE_8KB, scp->reg_base + MT8183_SCP_DCACHE_CON);
return 0;
}
static void mt8192_power_on_sram(void *addr)
{
int i;
for (i = 31; i >= 0; i--)
writel(GENMASK(i, 0), addr);
writel(0, addr);
}
static void mt8192_power_off_sram(void *addr)
{
int i;
writel(0, addr);
for (i = 0; i < 32; i++)
writel(GENMASK(i, 0), addr);
}
static int mt8192_scp_before_load(struct mtk_scp *scp)
{
/* clear SPM interrupt, SCP2SPM_IPC_CLR */
writel(0xff, scp->reg_base + MT8192_SCP2SPM_IPC_CLR);
writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET);
/* enable SRAM clock */
mt8192_power_on_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_0);
mt8192_power_on_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_1);
mt8192_power_on_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_2);
mt8192_power_on_sram(scp->reg_base + MT8192_L1TCM_SRAM_PDN);
mt8192_power_on_sram(scp->reg_base + MT8192_CPU0_SRAM_PD);
return 0;
}
static int scp_load(struct rproc *rproc, const struct firmware *fw)
{
struct mtk_scp *scp = rproc->priv;
struct device *dev = scp->dev;
int ret;
ret = clk_prepare_enable(scp->clk);
if (ret) {
dev_err(dev, "failed to enable clocks\n");
return ret;
}
/* Hold SCP in reset while loading FW. */
scp->data->scp_reset_assert(scp);
ret = scp->data->scp_before_load(scp);
if (ret < 0)
return ret;
ret = scp_elf_load_segments(rproc, fw); ret = scp_elf_load_segments(rproc, fw);
clk_disable_unprepare(scp->clk); clk_disable_unprepare(scp->clk);
...@@ -293,7 +373,7 @@ static int scp_start(struct rproc *rproc) ...@@ -293,7 +373,7 @@ static int scp_start(struct rproc *rproc)
run->signaled = false; run->signaled = false;
scp_reset_deassert(scp); scp->data->scp_reset_deassert(scp);
ret = wait_event_interruptible_timeout( ret = wait_event_interruptible_timeout(
run->wq, run->wq,
...@@ -309,13 +389,14 @@ static int scp_start(struct rproc *rproc) ...@@ -309,13 +389,14 @@ static int scp_start(struct rproc *rproc)
dev_err(dev, "wait SCP interrupted by a signal!\n"); dev_err(dev, "wait SCP interrupted by a signal!\n");
goto stop; goto stop;
} }
clk_disable_unprepare(scp->clk); clk_disable_unprepare(scp->clk);
dev_info(dev, "SCP is ready. FW version %s\n", run->fw_ver); dev_info(dev, "SCP is ready. FW version %s\n", run->fw_ver);
return 0; return 0;
stop: stop:
scp_reset_assert(scp); scp->data->scp_reset_assert(scp);
clk_disable_unprepare(scp->clk); clk_disable_unprepare(scp->clk);
return ret; return ret;
} }
...@@ -329,7 +410,7 @@ static void *scp_da_to_va(struct rproc *rproc, u64 da, size_t len) ...@@ -329,7 +410,7 @@ static void *scp_da_to_va(struct rproc *rproc, u64 da, size_t len)
offset = da; offset = da;
if (offset >= 0 && (offset + len) < scp->sram_size) if (offset >= 0 && (offset + len) < scp->sram_size)
return (void __force *)scp->sram_base + offset; return (void __force *)scp->sram_base + offset;
} else { } else if (scp->dram_size) {
offset = da - scp->dma_addr; offset = da - scp->dma_addr;
if (offset >= 0 && (offset + len) < scp->dram_size) if (offset >= 0 && (offset + len) < scp->dram_size)
return (void __force *)scp->cpu_addr + offset; return (void __force *)scp->cpu_addr + offset;
...@@ -338,6 +419,25 @@ static void *scp_da_to_va(struct rproc *rproc, u64 da, size_t len) ...@@ -338,6 +419,25 @@ static void *scp_da_to_va(struct rproc *rproc, u64 da, size_t len)
return NULL; return NULL;
} }
static void mt8183_scp_stop(struct mtk_scp *scp)
{
/* Disable SCP watchdog */
writel(0, scp->reg_base + MT8183_WDT_CFG);
}
static void mt8192_scp_stop(struct mtk_scp *scp)
{
/* Disable SRAM clock */
mt8192_power_off_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_0);
mt8192_power_off_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_1);
mt8192_power_off_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_2);
mt8192_power_off_sram(scp->reg_base + MT8192_L1TCM_SRAM_PDN);
mt8192_power_off_sram(scp->reg_base + MT8192_CPU0_SRAM_PD);
/* Disable SCP watchdog */
writel(0, scp->reg_base + MT8192_CORE0_WDT_CFG);
}
static int scp_stop(struct rproc *rproc) static int scp_stop(struct rproc *rproc)
{ {
struct mtk_scp *scp = (struct mtk_scp *)rproc->priv; struct mtk_scp *scp = (struct mtk_scp *)rproc->priv;
...@@ -349,9 +449,8 @@ static int scp_stop(struct rproc *rproc) ...@@ -349,9 +449,8 @@ static int scp_stop(struct rproc *rproc)
return ret; return ret;
} }
scp_reset_assert(scp); scp->data->scp_reset_assert(scp);
/* Disable SCP watchdog */ scp->data->scp_stop(scp);
writel(0, scp->reg_base + MT8183_WDT_CFG);
clk_disable_unprepare(scp->clk); clk_disable_unprepare(scp->clk);
return 0; return 0;
...@@ -443,6 +542,13 @@ static int scp_map_memory_region(struct mtk_scp *scp) ...@@ -443,6 +542,13 @@ static int scp_map_memory_region(struct mtk_scp *scp)
int ret; int ret;
ret = of_reserved_mem_device_init(scp->dev); ret = of_reserved_mem_device_init(scp->dev);
/* reserved memory is optional. */
if (ret == -ENODEV) {
dev_info(scp->dev, "skipping reserved memory initialization.");
return 0;
}
if (ret) { if (ret) {
dev_err(scp->dev, "failed to assign memory-region: %d\n", ret); dev_err(scp->dev, "failed to assign memory-region: %d\n", ret);
return -ENOMEM; return -ENOMEM;
...@@ -460,6 +566,9 @@ static int scp_map_memory_region(struct mtk_scp *scp) ...@@ -460,6 +566,9 @@ static int scp_map_memory_region(struct mtk_scp *scp)
static void scp_unmap_memory_region(struct mtk_scp *scp) static void scp_unmap_memory_region(struct mtk_scp *scp)
{ {
if (scp->dram_size == 0)
return;
dma_free_coherent(scp->dev, scp->dram_size, scp->cpu_addr, dma_free_coherent(scp->dev, scp->dram_size, scp->cpu_addr,
scp->dma_addr); scp->dma_addr);
of_reserved_mem_device_release(scp->dev); of_reserved_mem_device_release(scp->dev);
...@@ -536,6 +645,7 @@ static int scp_probe(struct platform_device *pdev) ...@@ -536,6 +645,7 @@ static int scp_probe(struct platform_device *pdev)
scp = (struct mtk_scp *)rproc->priv; scp = (struct mtk_scp *)rproc->priv;
scp->rproc = rproc; scp->rproc = rproc;
scp->dev = dev; scp->dev = dev;
scp->data = of_device_get_match_data(dev);
platform_set_drvdata(pdev, scp); platform_set_drvdata(pdev, scp);
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sram"); res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sram");
...@@ -642,8 +752,29 @@ static int scp_remove(struct platform_device *pdev) ...@@ -642,8 +752,29 @@ static int scp_remove(struct platform_device *pdev)
return 0; return 0;
} }
static const struct mtk_scp_of_data mt8183_of_data = {
.scp_before_load = mt8183_scp_before_load,
.scp_irq_handler = mt8183_scp_irq_handler,
.scp_reset_assert = mt8183_scp_reset_assert,
.scp_reset_deassert = mt8183_scp_reset_deassert,
.scp_stop = mt8183_scp_stop,
.host_to_scp_reg = MT8183_HOST_TO_SCP,
.host_to_scp_int_bit = MT8183_HOST_IPC_INT_BIT,
};
static const struct mtk_scp_of_data mt8192_of_data = {
.scp_before_load = mt8192_scp_before_load,
.scp_irq_handler = mt8192_scp_irq_handler,
.scp_reset_assert = mt8192_scp_reset_assert,
.scp_reset_deassert = mt8192_scp_reset_deassert,
.scp_stop = mt8192_scp_stop,
.host_to_scp_reg = MT8192_GIPC_IN_SET,
.host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT,
};
static const struct of_device_id mtk_scp_of_match[] = { static const struct of_device_id mtk_scp_of_match[] = {
{ .compatible = "mediatek,mt8183-scp"}, { .compatible = "mediatek,mt8183-scp", .data = &mt8183_of_data },
{ .compatible = "mediatek,mt8192-scp", .data = &mt8192_of_data },
{}, {},
}; };
MODULE_DEVICE_TABLE(of, mtk_scp_of_match); MODULE_DEVICE_TABLE(of, mtk_scp_of_match);
......
...@@ -30,10 +30,8 @@ int scp_ipi_register(struct mtk_scp *scp, ...@@ -30,10 +30,8 @@ int scp_ipi_register(struct mtk_scp *scp,
scp_ipi_handler_t handler, scp_ipi_handler_t handler,
void *priv) void *priv)
{ {
if (!scp) { if (!scp)
dev_err(scp->dev, "scp device is not ready\n");
return -EPROBE_DEFER; return -EPROBE_DEFER;
}
if (WARN_ON(id >= SCP_IPI_MAX) || WARN_ON(handler == NULL)) if (WARN_ON(id >= SCP_IPI_MAX) || WARN_ON(handler == NULL))
return -EINVAL; return -EINVAL;
...@@ -182,7 +180,7 @@ int scp_ipi_send(struct mtk_scp *scp, u32 id, void *buf, unsigned int len, ...@@ -182,7 +180,7 @@ int scp_ipi_send(struct mtk_scp *scp, u32 id, void *buf, unsigned int len,
ret = -ETIMEDOUT; ret = -ETIMEDOUT;
goto clock_disable; goto clock_disable;
} }
} while (readl(scp->reg_base + MT8183_HOST_TO_SCP)); } while (readl(scp->reg_base + scp->data->host_to_scp_reg));
scp_memcpy_aligned(send_obj->share_buf, buf, len); scp_memcpy_aligned(send_obj->share_buf, buf, len);
...@@ -191,7 +189,8 @@ int scp_ipi_send(struct mtk_scp *scp, u32 id, void *buf, unsigned int len, ...@@ -191,7 +189,8 @@ int scp_ipi_send(struct mtk_scp *scp, u32 id, void *buf, unsigned int len,
scp->ipi_id_ack[id] = false; scp->ipi_id_ack[id] = false;
/* send the command to SCP */ /* send the command to SCP */
writel(MT8183_HOST_IPC_INT_BIT, scp->reg_base + MT8183_HOST_TO_SCP); writel(scp->data->host_to_scp_int_bit,
scp->reg_base + scp->data->host_to_scp_reg);
if (wait) { if (wait) {
/* wait for SCP's ACK */ /* wait for SCP's ACK */
......
...@@ -931,6 +931,17 @@ static int q6v5_mba_load(struct q6v5 *qproc) ...@@ -931,6 +931,17 @@ static int q6v5_mba_load(struct q6v5 *qproc)
goto assert_reset; goto assert_reset;
} }
/*
* Some versions of the MBA firmware will upon boot wipe the MPSS region as well, so provide
* the Q6 access to this region.
*/
ret = q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, false, true,
qproc->mpss_phys, qproc->mpss_size);
if (ret) {
dev_err(qproc->dev, "assigning Q6 access to mpss memory failed: %d\n", ret);
goto disable_active_clks;
}
/* Assign MBA image access in DDR to q6 */ /* Assign MBA image access in DDR to q6 */
ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, false, true, ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, false, true,
qproc->mba_phys, qproc->mba_size); qproc->mba_phys, qproc->mba_size);
...@@ -1135,10 +1146,9 @@ static int q6v5_mpss_load(struct q6v5 *qproc) ...@@ -1135,10 +1146,9 @@ static int q6v5_mpss_load(struct q6v5 *qproc)
max_addr = ALIGN(phdr->p_paddr + phdr->p_memsz, SZ_4K); max_addr = ALIGN(phdr->p_paddr + phdr->p_memsz, SZ_4K);
} }
/** /*
* In case of a modem subsystem restart on secure devices, the modem * In case of a modem subsystem restart on secure devices, the modem
* memory can be reclaimed only after MBA is loaded. For modem cold * memory can be reclaimed only after MBA is loaded.
* boot this will be a nop
*/ */
q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, true, false, q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, true, false,
qproc->mpss_phys, qproc->mpss_size); qproc->mpss_phys, qproc->mpss_size);
......
...@@ -257,7 +257,7 @@ void rproc_coredump(struct rproc *rproc) ...@@ -257,7 +257,7 @@ void rproc_coredump(struct rproc *rproc)
* directly read from device memory. * directly read from device memory.
*/ */
data_size += elf_size_of_phdr(class); data_size += elf_size_of_phdr(class);
if (dump_conf == RPROC_COREDUMP_DEFAULT) if (dump_conf == RPROC_COREDUMP_ENABLED)
data_size += segment->size; data_size += segment->size;
phnum++; phnum++;
...@@ -297,14 +297,14 @@ void rproc_coredump(struct rproc *rproc) ...@@ -297,14 +297,14 @@ void rproc_coredump(struct rproc *rproc)
elf_phdr_set_p_flags(class, phdr, PF_R | PF_W | PF_X); elf_phdr_set_p_flags(class, phdr, PF_R | PF_W | PF_X);
elf_phdr_set_p_align(class, phdr, 0); elf_phdr_set_p_align(class, phdr, 0);
if (dump_conf == RPROC_COREDUMP_DEFAULT) if (dump_conf == RPROC_COREDUMP_ENABLED)
rproc_copy_segment(rproc, data + offset, segment, 0, rproc_copy_segment(rproc, data + offset, segment, 0,
segment->size); segment->size);
offset += elf_phdr_get_p_filesz(class, phdr); offset += elf_phdr_get_p_filesz(class, phdr);
phdr += elf_size_of_phdr(class); phdr += elf_size_of_phdr(class);
} }
if (dump_conf == RPROC_COREDUMP_DEFAULT) { if (dump_conf == RPROC_COREDUMP_ENABLED) {
dev_coredumpv(&rproc->dev, data, data_size, GFP_KERNEL); dev_coredumpv(&rproc->dev, data, data_size, GFP_KERNEL);
return; return;
} }
......
...@@ -33,9 +33,9 @@ static struct dentry *rproc_dbg; ...@@ -33,9 +33,9 @@ static struct dentry *rproc_dbg;
* enum rproc_coredump_mechanism * enum rproc_coredump_mechanism
*/ */
static const char * const rproc_coredump_str[] = { static const char * const rproc_coredump_str[] = {
[RPROC_COREDUMP_DEFAULT] = "default",
[RPROC_COREDUMP_INLINE] = "inline",
[RPROC_COREDUMP_DISABLED] = "disabled", [RPROC_COREDUMP_DISABLED] = "disabled",
[RPROC_COREDUMP_ENABLED] = "enabled",
[RPROC_COREDUMP_INLINE] = "inline",
}; };
/* Expose the current coredump configuration via debugfs */ /* Expose the current coredump configuration via debugfs */
...@@ -54,20 +54,19 @@ static ssize_t rproc_coredump_read(struct file *filp, char __user *userbuf, ...@@ -54,20 +54,19 @@ static ssize_t rproc_coredump_read(struct file *filp, char __user *userbuf,
/* /*
* By writing to the 'coredump' debugfs entry, we control the behavior of the * By writing to the 'coredump' debugfs entry, we control the behavior of the
* coredump mechanism dynamically. The default value of this entry is "default". * coredump mechanism dynamically. The default value of this entry is "disabled".
* *
* The 'coredump' debugfs entry supports these commands: * The 'coredump' debugfs entry supports these commands:
* *
* default: This is the default coredump mechanism. When the remoteproc * disabled: By default coredump collection is disabled. Recovery will
* crashes the entire coredump will be copied to a separate buffer * proceed without collecting any dump.
* and exposed to userspace. *
* enabled: When the remoteproc crashes the entire coredump will be copied
* to a separate buffer and exposed to userspace.
* *
* inline: The coredump will not be copied to a separate buffer and the * inline: The coredump will not be copied to a separate buffer and the
* recovery process will have to wait until data is read by * recovery process will have to wait until data is read by
* userspace. But this avoid usage of extra memory. * userspace. But this avoid usage of extra memory.
*
* disabled: This will disable coredump. Recovery will proceed without
* collecting any dump.
*/ */
static ssize_t rproc_coredump_write(struct file *filp, static ssize_t rproc_coredump_write(struct file *filp,
const char __user *user_buf, size_t count, const char __user *user_buf, size_t count,
...@@ -94,12 +93,12 @@ static ssize_t rproc_coredump_write(struct file *filp, ...@@ -94,12 +93,12 @@ static ssize_t rproc_coredump_write(struct file *filp,
goto out; goto out;
} }
if (!strncmp(buf, "disable", count)) { if (!strncmp(buf, "disabled", count)) {
rproc->dump_conf = RPROC_COREDUMP_DISABLED; rproc->dump_conf = RPROC_COREDUMP_DISABLED;
} else if (!strncmp(buf, "enabled", count)) {
rproc->dump_conf = RPROC_COREDUMP_ENABLED;
} else if (!strncmp(buf, "inline", count)) { } else if (!strncmp(buf, "inline", count)) {
rproc->dump_conf = RPROC_COREDUMP_INLINE; rproc->dump_conf = RPROC_COREDUMP_INLINE;
} else if (!strncmp(buf, "default", count)) {
rproc->dump_conf = RPROC_COREDUMP_DEFAULT;
} else { } else {
dev_err(&rproc->dev, "Invalid coredump configuration\n"); dev_err(&rproc->dev, "Invalid coredump configuration\n");
err = -EINVAL; err = -EINVAL;
......
...@@ -10,6 +10,123 @@ ...@@ -10,6 +10,123 @@
#define to_rproc(d) container_of(d, struct rproc, dev) #define to_rproc(d) container_of(d, struct rproc, dev)
static ssize_t recovery_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct rproc *rproc = to_rproc(dev);
return sprintf(buf, "%s", rproc->recovery_disabled ? "disabled\n" : "enabled\n");
}
/*
* By writing to the 'recovery' sysfs entry, we control the behavior of the
* recovery mechanism dynamically. The default value of this entry is "enabled".
*
* The 'recovery' sysfs entry supports these commands:
*
* enabled: When enabled, the remote processor will be automatically
* recovered whenever it crashes. Moreover, if the remote
* processor crashes while recovery is disabled, it will
* be automatically recovered too as soon as recovery is enabled.
*
* disabled: When disabled, a remote processor will remain in a crashed
* state if it crashes. This is useful for debugging purposes;
* without it, debugging a crash is substantially harder.
*
* recover: This function will trigger an immediate recovery if the
* remote processor is in a crashed state, without changing
* or checking the recovery state (enabled/disabled).
* This is useful during debugging sessions, when one expects
* additional crashes to happen after enabling recovery. In this
* case, enabling recovery will make it hard to debug subsequent
* crashes, so it's recommended to keep recovery disabled, and
* instead use the "recover" command as needed.
*/
static ssize_t recovery_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct rproc *rproc = to_rproc(dev);
if (sysfs_streq(buf, "enabled")) {
/* change the flag and begin the recovery process if needed */
rproc->recovery_disabled = false;
rproc_trigger_recovery(rproc);
} else if (sysfs_streq(buf, "disabled")) {
rproc->recovery_disabled = true;
} else if (sysfs_streq(buf, "recover")) {
/* begin the recovery process without changing the flag */
rproc_trigger_recovery(rproc);
} else {
return -EINVAL;
}
return count;
}
static DEVICE_ATTR_RW(recovery);
/*
* A coredump-configuration-to-string lookup table, for exposing a
* human readable configuration via sysfs. Always keep in sync with
* enum rproc_coredump_mechanism
*/
static const char * const rproc_coredump_str[] = {
[RPROC_COREDUMP_DISABLED] = "disabled",
[RPROC_COREDUMP_ENABLED] = "enabled",
[RPROC_COREDUMP_INLINE] = "inline",
};
/* Expose the current coredump configuration via debugfs */
static ssize_t coredump_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct rproc *rproc = to_rproc(dev);
return sprintf(buf, "%s\n", rproc_coredump_str[rproc->dump_conf]);
}
/*
* By writing to the 'coredump' sysfs entry, we control the behavior of the
* coredump mechanism dynamically. The default value of this entry is "default".
*
* The 'coredump' sysfs entry supports these commands:
*
* disabled: This is the default coredump mechanism. Recovery will proceed
* without collecting any dump.
*
* default: When the remoteproc crashes the entire coredump will be
* copied to a separate buffer and exposed to userspace.
*
* inline: The coredump will not be copied to a separate buffer and the
* recovery process will have to wait until data is read by
* userspace. But this avoid usage of extra memory.
*/
static ssize_t coredump_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct rproc *rproc = to_rproc(dev);
if (rproc->state == RPROC_CRASHED) {
dev_err(&rproc->dev, "can't change coredump configuration\n");
return -EBUSY;
}
if (sysfs_streq(buf, "disabled")) {
rproc->dump_conf = RPROC_COREDUMP_DISABLED;
} else if (sysfs_streq(buf, "enabled")) {
rproc->dump_conf = RPROC_COREDUMP_ENABLED;
} else if (sysfs_streq(buf, "inline")) {
rproc->dump_conf = RPROC_COREDUMP_INLINE;
} else {
dev_err(&rproc->dev, "Invalid coredump configuration\n");
return -EINVAL;
}
return count;
}
static DEVICE_ATTR_RW(coredump);
/* Expose the loaded / running firmware name via sysfs */ /* Expose the loaded / running firmware name via sysfs */
static ssize_t firmware_show(struct device *dev, struct device_attribute *attr, static ssize_t firmware_show(struct device *dev, struct device_attribute *attr,
char *buf) char *buf)
...@@ -138,6 +255,8 @@ static ssize_t name_show(struct device *dev, struct device_attribute *attr, ...@@ -138,6 +255,8 @@ static ssize_t name_show(struct device *dev, struct device_attribute *attr,
static DEVICE_ATTR_RO(name); static DEVICE_ATTR_RO(name);
static struct attribute *rproc_attrs[] = { static struct attribute *rproc_attrs[] = {
&dev_attr_coredump.attr,
&dev_attr_recovery.attr,
&dev_attr_firmware.attr, &dev_attr_firmware.attr,
&dev_attr_state.attr, &dev_attr_state.attr,
&dev_attr_name.attr, &dev_attr_name.attr,
......
...@@ -685,7 +685,7 @@ static int stm32_rproc_get_m4_status(struct stm32_rproc *ddata, ...@@ -685,7 +685,7 @@ static int stm32_rproc_get_m4_status(struct stm32_rproc *ddata,
* We couldn't get the coprocessor's state, assume * We couldn't get the coprocessor's state, assume
* it is not running. * it is not running.
*/ */
state = M4_STATE_OFF; *state = M4_STATE_OFF;
return 0; return 0;
} }
......
This diff is collapsed.
...@@ -442,16 +442,16 @@ enum rproc_crash_type { ...@@ -442,16 +442,16 @@ enum rproc_crash_type {
/** /**
* enum rproc_dump_mechanism - Coredump options for core * enum rproc_dump_mechanism - Coredump options for core
* @RPROC_COREDUMP_DEFAULT: Copy dump to separate buffer and carry on with * @RPROC_COREDUMP_DISABLED: Don't perform any dump
* @RPROC_COREDUMP_ENABLED: Copy dump to separate buffer and carry on with
recovery recovery
* @RPROC_COREDUMP_INLINE: Read segments directly from device memory. Stall * @RPROC_COREDUMP_INLINE: Read segments directly from device memory. Stall
recovery until all segments are read recovery until all segments are read
* @RPROC_COREDUMP_DISABLED: Don't perform any dump
*/ */
enum rproc_dump_mechanism { enum rproc_dump_mechanism {
RPROC_COREDUMP_DEFAULT,
RPROC_COREDUMP_INLINE,
RPROC_COREDUMP_DISABLED, RPROC_COREDUMP_DISABLED,
RPROC_COREDUMP_ENABLED,
RPROC_COREDUMP_INLINE,
}; };
/** /**
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment