ARM: 9271/1: vfp: Add hwcap for FEAT_AA32BF16

Advanced SIMD BFloat16 (FEAT_AA32BF16) is a feature present in AArch32
state for Armv8 and is represented by ISAR6.BF16 identification
register.

This feature denotes the presence of VCVT, VCVTB, VCVTT, VDOT, VFMAB,
VFMAT and VMMLA instructions and hence adding a hwcap will enable the
userspace to check it before trying to use those instructions.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>

arch/arm/include/uapi/asm/hwcap.h

@@ -32,6 +32,7 @@
 #define HWCAP_ASIMDHP	(1 << 23)
 #define HWCAP_ASIMDDP	(1 << 24)
 #define HWCAP_ASIMDFHM	(1 << 25)
+#define HWCAP_ASIMDBF16	(1 << 26)
 
 /*
  * HWCAP2 flags - for elf_hwcap2 (in kernel) and AT_HWCAP2

arch/arm/kernel/setup.c

@@ -1253,6 +1253,7 @@ static const char *hwcap_str[] = {
 	"asimdhp",
 	"asimddp",
 	"asimdfhm",
+	"asimdbf16",
 	NULL
 };
 

arch/arm/vfp/vfpmodule.c

@@ -851,6 +851,12 @@ static int __init vfp_init(void)
 		 */
 		if (cpuid_feature_extract_field(isar6, 8) == 0x1)
 			elf_hwcap |= HWCAP_ASIMDFHM;
+		/*
+		 * Check for the presence of Advanced SIMD Bfloat16
+		 * floating point instructions.
+		 */
+		if (cpuid_feature_extract_field(isar6, 20) == 0x1)
+			elf_hwcap |= HWCAP_ASIMDBF16;
 
 	/* Extract the architecture version on pre-cpuid scheme */
 	} else {