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Kirill Smelkov
linux
Commits
24a4ae86
Commit
24a4ae86
authored
Dec 23, 2013
by
Ben Skeggs
Browse files
Options
Browse Files
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Email Patches
Plain Diff
drm/nouveau/instmem: tidy up the subdev class definition
Signed-off-by:
Ben Skeggs
<
bskeggs@redhat.com
>
parent
64c672ae
Changes
15
Hide whitespace changes
Inline
Side-by-side
Showing
15 changed files
with
223 additions
and
208 deletions
+223
-208
drivers/gpu/drm/nouveau/core/engine/device/nv04.c
drivers/gpu/drm/nouveau/core/engine/device/nv04.c
+2
-2
drivers/gpu/drm/nouveau/core/engine/device/nv10.c
drivers/gpu/drm/nouveau/core/engine/device/nv10.c
+8
-8
drivers/gpu/drm/nouveau/core/engine/device/nv20.c
drivers/gpu/drm/nouveau/core/engine/device/nv20.c
+4
-4
drivers/gpu/drm/nouveau/core/engine/device/nv30.c
drivers/gpu/drm/nouveau/core/engine/device/nv30.c
+5
-5
drivers/gpu/drm/nouveau/core/engine/device/nv40.c
drivers/gpu/drm/nouveau/core/engine/device/nv40.c
+16
-16
drivers/gpu/drm/nouveau/core/engine/device/nv50.c
drivers/gpu/drm/nouveau/core/engine/device/nv50.c
+14
-14
drivers/gpu/drm/nouveau/core/engine/device/nvc0.c
drivers/gpu/drm/nouveau/core/engine/device/nvc0.c
+9
-9
drivers/gpu/drm/nouveau/core/engine/device/nve0.c
drivers/gpu/drm/nouveau/core/engine/device/nve0.c
+5
-5
drivers/gpu/drm/nouveau/core/include/subdev/instmem.h
drivers/gpu/drm/nouveau/core/include/subdev/instmem.h
+3
-16
drivers/gpu/drm/nouveau/core/subdev/instmem/base.c
drivers/gpu/drm/nouveau/core/subdev/instmem/base.c
+52
-42
drivers/gpu/drm/nouveau/core/subdev/instmem/nv04.c
drivers/gpu/drm/nouveau/core/subdev/instmem/nv04.c
+32
-45
drivers/gpu/drm/nouveau/core/subdev/instmem/nv04.h
drivers/gpu/drm/nouveau/core/subdev/instmem/nv04.h
+3
-1
drivers/gpu/drm/nouveau/core/subdev/instmem/nv40.c
drivers/gpu/drm/nouveau/core/subdev/instmem/nv40.c
+24
-20
drivers/gpu/drm/nouveau/core/subdev/instmem/nv50.c
drivers/gpu/drm/nouveau/core/subdev/instmem/nv50.c
+16
-21
drivers/gpu/drm/nouveau/core/subdev/instmem/priv.h
drivers/gpu/drm/nouveau/core/subdev/instmem/priv.h
+30
-0
No files found.
drivers/gpu/drm/nouveau/core/engine/device/nv04.c
View file @
24a4ae86
...
...
@@ -54,7 +54,7 @@ nv04_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv04_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv04_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv04_fifo_oclass
;
...
...
@@ -72,7 +72,7 @@ nv04_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv04_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv04_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv04_fifo_oclass
;
...
...
drivers/gpu/drm/nouveau/core/engine/device/nv10.c
View file @
24a4ae86
...
...
@@ -56,7 +56,7 @@ nv10_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv04_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv10_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv10_graph_oclass
;
...
...
@@ -73,7 +73,7 @@ nv10_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv04_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv10_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv10_fifo_oclass
;
...
...
@@ -92,7 +92,7 @@ nv10_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv04_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv10_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv10_fifo_oclass
;
...
...
@@ -111,7 +111,7 @@ nv10_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv04_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv1a_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv10_fifo_oclass
;
...
...
@@ -130,7 +130,7 @@ nv10_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv04_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv10_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv10_fifo_oclass
;
...
...
@@ -149,7 +149,7 @@ nv10_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv04_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv10_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
...
...
@@ -168,7 +168,7 @@ nv10_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv04_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv1a_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
...
...
@@ -187,7 +187,7 @@ nv10_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv04_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv10_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
...
...
drivers/gpu/drm/nouveau/core/engine/device/nv20.c
View file @
24a4ae86
...
...
@@ -57,7 +57,7 @@ nv20_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv04_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv20_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
...
...
@@ -76,7 +76,7 @@ nv20_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv04_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv25_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
...
...
@@ -95,7 +95,7 @@ nv20_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv04_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv25_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
...
...
@@ -114,7 +114,7 @@ nv20_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv04_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv25_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
...
...
drivers/gpu/drm/nouveau/core/engine/device/nv30.c
View file @
24a4ae86
...
...
@@ -57,7 +57,7 @@ nv30_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv04_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv30_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
...
...
@@ -76,7 +76,7 @@ nv30_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv04_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv35_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
...
...
@@ -95,7 +95,7 @@ nv30_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv31_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv30_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
...
...
@@ -115,7 +115,7 @@ nv30_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv31_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv36_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
...
...
@@ -135,7 +135,7 @@ nv30_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv31_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv10_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
...
...
drivers/gpu/drm/nouveau/core/engine/device/nv40.c
View file @
24a4ae86
...
...
@@ -62,7 +62,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv31_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv40_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
...
...
@@ -85,7 +85,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv31_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv41_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv41_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
...
...
@@ -108,7 +108,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv31_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv41_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv41_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
...
...
@@ -131,7 +131,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv31_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv41_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv41_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
...
...
@@ -154,7 +154,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv31_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv40_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
...
...
@@ -177,7 +177,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv31_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv47_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv41_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
...
...
@@ -200,7 +200,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv31_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv49_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv41_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
...
...
@@ -223,7 +223,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv31_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv49_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv41_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
...
...
@@ -246,7 +246,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv31_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv44_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv44_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
...
...
@@ -269,7 +269,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv31_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv46_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv44_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
...
...
@@ -292,7 +292,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv31_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv44_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv44_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
...
...
@@ -315,7 +315,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv31_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv46_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv44_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
...
...
@@ -338,7 +338,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv31_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv4e_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv44_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
...
...
@@ -361,7 +361,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv31_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv46_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv44_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
...
...
@@ -384,7 +384,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv31_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv46_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv44_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
...
...
@@ -407,7 +407,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv31_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv46_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv44_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
...
...
drivers/gpu/drm/nouveau/core/engine/device/nv50.c
View file @
24a4ae86
...
...
@@ -70,7 +70,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv50_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv50_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
...
...
@@ -95,7 +95,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv50_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv84_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
...
...
@@ -123,7 +123,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv50_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv84_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
...
...
@@ -151,7 +151,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv50_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv84_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
...
...
@@ -179,7 +179,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv94_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv84_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
...
...
@@ -207,7 +207,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv94_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv84_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
...
...
@@ -235,7 +235,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv94_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv84_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
...
...
@@ -263,7 +263,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv94_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv84_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
...
...
@@ -291,7 +291,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv94_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nvaa_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
...
...
@@ -319,7 +319,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv94_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nvaa_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
...
...
@@ -347,7 +347,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv94_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nva3_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
&
nva3_pwr_oclass
;
...
...
@@ -377,7 +377,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv94_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nva3_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
&
nva3_pwr_oclass
;
...
...
@@ -406,7 +406,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv94_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nva3_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
&
nva3_pwr_oclass
;
...
...
@@ -435,7 +435,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BUS
]
=
nv94_bus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_TIMER
]
=
&
nv04_timer_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nvaf_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
&
nva3_pwr_oclass
;
...
...
drivers/gpu/drm/nouveau/core/engine/device/nvc0.c
View file @
24a4ae86
...
...
@@ -72,7 +72,7 @@ nvc0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nvc0_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_LTCG
]
=
&
nvc0_ltcg_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_IBUS
]
=
&
nvc0_ibus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nvc0_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
&
nvc0_pwr_oclass
;
...
...
@@ -104,7 +104,7 @@ nvc0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nvc0_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_LTCG
]
=
&
nvc0_ltcg_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_IBUS
]
=
&
nvc0_ibus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nvc0_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
&
nvc0_pwr_oclass
;
...
...
@@ -136,7 +136,7 @@ nvc0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nvc0_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_LTCG
]
=
&
nvc0_ltcg_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_IBUS
]
=
&
nvc0_ibus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nvc0_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
&
nvc0_pwr_oclass
;
...
...
@@ -167,7 +167,7 @@ nvc0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nvc0_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_LTCG
]
=
&
nvc0_ltcg_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_IBUS
]
=
&
nvc0_ibus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nvc0_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
&
nvc0_pwr_oclass
;
...
...
@@ -199,7 +199,7 @@ nvc0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nvc0_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_LTCG
]
=
&
nvc0_ltcg_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_IBUS
]
=
&
nvc0_ibus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nvc0_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
&
nvc0_pwr_oclass
;
...
...
@@ -231,7 +231,7 @@ nvc0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nvc0_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_LTCG
]
=
&
nvc0_ltcg_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_IBUS
]
=
&
nvc0_ibus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nvc0_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
&
nvc0_pwr_oclass
;
...
...
@@ -262,7 +262,7 @@ nvc0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nvc0_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_LTCG
]
=
&
nvc0_ltcg_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_IBUS
]
=
&
nvc0_ibus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nvc0_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
&
nvc0_pwr_oclass
;
...
...
@@ -294,7 +294,7 @@ nvc0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nvc0_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_LTCG
]
=
&
nvc0_ltcg_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_IBUS
]
=
&
nvc0_ibus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nvc0_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
&
nvd0_pwr_oclass
;
...
...
@@ -325,7 +325,7 @@ nvc0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nvc0_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_LTCG
]
=
&
nvc0_ltcg_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_IBUS
]
=
&
nvc0_ibus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nvc0_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nvd0_dmaeng_oclass
;
...
...
drivers/gpu/drm/nouveau/core/engine/device/nve0.c
View file @
24a4ae86
...
...
@@ -72,7 +72,7 @@ nve0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nve0_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_LTCG
]
=
&
nvc0_ltcg_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_IBUS
]
=
&
nve0_ibus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nvc0_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
&
nvd0_pwr_oclass
;
...
...
@@ -105,7 +105,7 @@ nve0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nve0_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_LTCG
]
=
&
nvc0_ltcg_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_IBUS
]
=
&
nve0_ibus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nvc0_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
&
nvd0_pwr_oclass
;
...
...
@@ -138,7 +138,7 @@ nve0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nve0_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_LTCG
]
=
&
nvc0_ltcg_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_IBUS
]
=
&
nve0_ibus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nvc0_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
&
nvd0_pwr_oclass
;
...
...
@@ -171,7 +171,7 @@ nve0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nve0_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_LTCG
]
=
&
nvc0_ltcg_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_IBUS
]
=
&
nve0_ibus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nvc0_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
&
nvd0_pwr_oclass
;
...
...
@@ -206,7 +206,7 @@ nve0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nve0_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_LTCG
]
=
&
nvc0_ltcg_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_IBUS
]
=
&
nve0_ibus_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
&
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nvc0_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
&
nv108_pwr_oclass
;
...
...
drivers/gpu/drm/nouveau/core/include/subdev/instmem.h
View file @
24a4ae86
...
...
@@ -60,21 +60,8 @@ nouveau_instmem(void *obj)
return
(
void
*
)
nv_device
(
obj
)
->
subdev
[
NVDEV_SUBDEV_INSTMEM
];
}
#define nouveau_instmem_create(p,e,o,d) \
nouveau_instmem_create_((p), (e), (o), sizeof(**d), (void **)d)
#define nouveau_instmem_destroy(p) \
nouveau_subdev_destroy(&(p)->base)
int
nouveau_instmem_create_
(
struct
nouveau_object
*
,
struct
nouveau_object
*
,
struct
nouveau_oclass
*
,
int
,
void
**
);
int
nouveau_instmem_init
(
struct
nouveau_instmem
*
);
int
nouveau_instmem_fini
(
struct
nouveau_instmem
*
,
bool
);
#define _nouveau_instmem_dtor _nouveau_subdev_dtor
int
_nouveau_instmem_init
(
struct
nouveau_object
*
);
int
_nouveau_instmem_fini
(
struct
nouveau_object
*
,
bool
);
extern
struct
nouveau_oclass
nv04_instmem_oclass
;
extern
struct
nouveau_oclass
nv40_instmem_oclass
;
extern
struct
nouveau_oclass
nv50_instmem_oclass
;
extern
struct
nouveau_oclass
*
nv04_instmem_oclass
;
extern
struct
nouveau_oclass
*
nv40_instmem_oclass
;
extern
struct
nouveau_oclass
*
nv50_instmem_oclass
;
#endif
drivers/gpu/drm/nouveau/core/subdev/instmem/base.c
View file @
24a4ae86
...
...
@@ -22,7 +22,7 @@
* Authors: Ben Skeggs
*/
#include
<subdev/instmem.h>
#include
"priv.h"
int
nouveau_instobj_create_
(
struct
nouveau_object
*
parent
,
...
...
@@ -65,54 +65,31 @@ _nouveau_instobj_dtor(struct nouveau_object *object)
return
nouveau_instobj_destroy
(
iobj
);
}
int
nouveau_instmem_create_
(
struct
nouveau_object
*
parent
,
struct
nouveau_object
*
engine
,
struct
nouveau_oclass
*
oclass
,
int
length
,
void
**
pobject
)
{
struct
nouveau_instmem
*
imem
;
int
ret
;
/******************************************************************************
* instmem subdev base implementation
*****************************************************************************/
ret
=
nouveau_subdev_create_
(
parent
,
engine
,
oclass
,
0
,
"INSTMEM"
,
"instmem"
,
length
,
pobject
);
imem
=
*
pobject
;
if
(
ret
)
return
ret
;
INIT_LIST_HEAD
(
&
imem
->
list
);
return
0
;
}
int
nouveau_instmem_init
(
struct
nouveau_instmem
*
imem
)
static
int
nouveau_instmem_alloc
(
struct
nouveau_instmem
*
imem
,
struct
nouveau_object
*
parent
,
u32
size
,
u32
align
,
struct
nouveau_object
**
pobject
)
{
struct
nouveau_instobj
*
iobj
;
int
ret
,
i
;
struct
nouveau_object
*
engine
=
nv_object
(
imem
);
struct
nouveau_instmem_impl
*
impl
=
(
void
*
)
engine
->
oclass
;
int
ret
;
ret
=
nouveau_subdev_init
(
&
imem
->
base
);
ret
=
nouveau_object_ctor
(
parent
,
engine
,
impl
->
instobj
,
(
void
*
)(
unsigned
long
)
align
,
size
,
pobject
);
if
(
ret
)
return
ret
;
mutex_lock
(
&
imem
->
base
.
mutex
);
list_for_each_entry
(
iobj
,
&
imem
->
list
,
head
)
{
if
(
iobj
->
suspend
)
{
for
(
i
=
0
;
i
<
iobj
->
size
;
i
+=
4
)
nv_wo32
(
iobj
,
i
,
iobj
->
suspend
[
i
/
4
]);
vfree
(
iobj
->
suspend
);
iobj
->
suspend
=
NULL
;
}
}
mutex_unlock
(
&
imem
->
base
.
mutex
);
return
0
;
}
int
nouveau_instmem_fini
(
struct
nouveau_instmem
*
imem
,
bool
suspend
)
_nouveau_instmem_fini
(
struct
nouveau_object
*
object
,
bool
suspend
)
{
struct
nouveau_instmem
*
imem
=
(
void
*
)
object
;
struct
nouveau_instobj
*
iobj
;
int
i
,
ret
=
0
;
...
...
@@ -143,12 +120,45 @@ int
_nouveau_instmem_init
(
struct
nouveau_object
*
object
)
{
struct
nouveau_instmem
*
imem
=
(
void
*
)
object
;
return
nouveau_instmem_init
(
imem
);
struct
nouveau_instobj
*
iobj
;
int
ret
,
i
;
ret
=
nouveau_subdev_init
(
&
imem
->
base
);
if
(
ret
)
return
ret
;
mutex_lock
(
&
imem
->
base
.
mutex
);
list_for_each_entry
(
iobj
,
&
imem
->
list
,
head
)
{
if
(
iobj
->
suspend
)
{
for
(
i
=
0
;
i
<
iobj
->
size
;
i
+=
4
)
nv_wo32
(
iobj
,
i
,
iobj
->
suspend
[
i
/
4
]);
vfree
(
iobj
->
suspend
);
iobj
->
suspend
=
NULL
;
}
}
mutex_unlock
(
&
imem
->
base
.
mutex
);
return
0
;
}
int
_nouveau_instmem_fini
(
struct
nouveau_object
*
object
,
bool
suspend
)
nouveau_instmem_create_
(
struct
nouveau_object
*
parent
,
struct
nouveau_object
*
engine
,
struct
nouveau_oclass
*
oclass
,
int
length
,
void
**
pobject
)
{
struct
nouveau_instmem
*
imem
=
(
void
*
)
object
;
return
nouveau_instmem_fini
(
imem
,
suspend
);
struct
nouveau_instmem
*
imem
;
int
ret
;
ret
=
nouveau_subdev_create_
(
parent
,
engine
,
oclass
,
0
,
"INSTMEM"
,
"instmem"
,
length
,
pobject
);
imem
=
*
pobject
;
if
(
ret
)
return
ret
;
INIT_LIST_HEAD
(
&
imem
->
list
);
imem
->
alloc
=
nouveau_instmem_alloc
;
return
0
;
}
drivers/gpu/drm/nouveau/core/subdev/instmem/nv04.c
View file @
24a4ae86
...
...
@@ -22,8 +22,6 @@
* Authors: Ben Skeggs
*/
#include <subdev/fb.h>
#include "nv04.h"
static
int
...
...
@@ -76,7 +74,7 @@ nv04_instobj_wr32(struct nouveau_object *object, u64 addr, u32 data)
nv_wo32
(
object
->
engine
,
node
->
mem
->
offset
+
addr
,
data
);
}
st
atic
st
ruct
nouveau_oclass
struct
nouveau_oclass
nv04_instobj_oclass
=
{
.
ofuncs
=
&
(
struct
nouveau_ofuncs
)
{
.
ctor
=
nv04_instobj_ctor
,
...
...
@@ -88,19 +86,34 @@ nv04_instobj_oclass = {
},
};
int
nv04_instmem_alloc
(
struct
nouveau_instmem
*
imem
,
struct
nouveau_object
*
parent
,
u32
size
,
u32
align
,
struct
nouveau_object
**
pobject
)
/******************************************************************************
* instmem subdev implementation
*****************************************************************************/
static
u32
nv04_instmem_rd32
(
struct
nouveau_object
*
object
,
u64
addr
)
{
struct
nouveau_object
*
engine
=
nv_object
(
imem
);
int
ret
;
return
nv_rd32
(
object
,
0x700000
+
addr
);
}
ret
=
nouveau_object_ctor
(
parent
,
engine
,
&
nv04_instobj_oclass
,
(
void
*
)(
unsigned
long
)
align
,
size
,
pobject
);
if
(
ret
)
return
ret
;
static
void
nv04_instmem_wr32
(
struct
nouveau_object
*
object
,
u64
addr
,
u32
data
)
{
return
nv_wr32
(
object
,
0x700000
+
addr
,
data
);
}
return
0
;
void
nv04_instmem_dtor
(
struct
nouveau_object
*
object
)
{
struct
nv04_instmem_priv
*
priv
=
(
void
*
)
object
;
nouveau_gpuobj_ref
(
NULL
,
&
priv
->
ramfc
);
nouveau_gpuobj_ref
(
NULL
,
&
priv
->
ramro
);
nouveau_ramht_ref
(
NULL
,
&
priv
->
ramht
);
nouveau_gpuobj_ref
(
NULL
,
&
priv
->
vbios
);
nouveau_mm_fini
(
&
priv
->
heap
);
if
(
priv
->
iomem
)
iounmap
(
priv
->
iomem
);
nouveau_instmem_destroy
(
&
priv
->
base
);
}
static
int
...
...
@@ -118,7 +131,6 @@ nv04_instmem_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
/* PRAMIN aperture maps over the end of VRAM, reserve it */
priv
->
base
.
reserved
=
512
*
1024
;
priv
->
base
.
alloc
=
nv04_instmem_alloc
;
ret
=
nouveau_mm_init
(
&
priv
->
heap
,
0
,
priv
->
base
.
reserved
,
1
);
if
(
ret
)
...
...
@@ -150,36 +162,10 @@ nv04_instmem_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
return
0
;
}
void
nv04_instmem_dtor
(
struct
nouveau_object
*
object
)
{
struct
nv04_instmem_priv
*
priv
=
(
void
*
)
object
;
nouveau_gpuobj_ref
(
NULL
,
&
priv
->
ramfc
);
nouveau_gpuobj_ref
(
NULL
,
&
priv
->
ramro
);
nouveau_ramht_ref
(
NULL
,
&
priv
->
ramht
);
nouveau_gpuobj_ref
(
NULL
,
&
priv
->
vbios
);
nouveau_mm_fini
(
&
priv
->
heap
);
if
(
priv
->
iomem
)
iounmap
(
priv
->
iomem
);
nouveau_instmem_destroy
(
&
priv
->
base
);
}
static
u32
nv04_instmem_rd32
(
struct
nouveau_object
*
object
,
u64
addr
)
{
return
nv_rd32
(
object
,
0x700000
+
addr
);
}
static
void
nv04_instmem_wr32
(
struct
nouveau_object
*
object
,
u64
addr
,
u32
data
)
{
return
nv_wr32
(
object
,
0x700000
+
addr
,
data
);
}
struct
nouveau_oclass
nv04_instmem_oclass
=
{
.
handle
=
NV_SUBDEV
(
INSTMEM
,
0x04
),
.
ofuncs
=
&
(
struct
nouveau_ofuncs
)
{
struct
nouveau_oclass
*
nv04_instmem_oclass
=
&
(
struct
nouveau_instmem_impl
)
{
.
base
.
handle
=
NV_SUBDEV
(
INSTMEM
,
0x04
),
.
base
.
ofuncs
=
&
(
struct
nouveau_ofuncs
)
{
.
ctor
=
nv04_instmem_ctor
,
.
dtor
=
nv04_instmem_dtor
,
.
init
=
_nouveau_instmem_init
,
...
...
@@ -187,4 +173,5 @@ nv04_instmem_oclass = {
.
rd32
=
nv04_instmem_rd32
,
.
wr32
=
nv04_instmem_wr32
,
},
};
.
instobj
=
&
nv04_instobj_oclass
,
}.
base
;
drivers/gpu/drm/nouveau/core/subdev/instmem/nv04.h
View file @
24a4ae86
...
...
@@ -5,7 +5,9 @@
#include <core/ramht.h>
#include <core/mm.h>
#include <subdev/instmem.h>
#include "priv.h"
extern
struct
nouveau_oclass
nv04_instobj_oclass
;
struct
nv04_instmem_priv
{
struct
nouveau_instmem
base
;
...
...
drivers/gpu/drm/nouveau/core/subdev/instmem/nv40.c
View file @
24a4ae86
...
...
@@ -26,6 +26,24 @@
#include "nv04.h"
/******************************************************************************
* instmem subdev implementation
*****************************************************************************/
static
u32
nv40_instmem_rd32
(
struct
nouveau_object
*
object
,
u64
addr
)
{
struct
nv04_instmem_priv
*
priv
=
(
void
*
)
object
;
return
ioread32_native
(
priv
->
iomem
+
addr
);
}
static
void
nv40_instmem_wr32
(
struct
nouveau_object
*
object
,
u64
addr
,
u32
data
)
{
struct
nv04_instmem_priv
*
priv
=
(
void
*
)
object
;
iowrite32_native
(
data
,
priv
->
iomem
+
addr
);
}
static
int
nv40_instmem_ctor
(
struct
nouveau_object
*
parent
,
struct
nouveau_object
*
engine
,
struct
nouveau_oclass
*
oclass
,
void
*
data
,
u32
size
,
...
...
@@ -69,7 +87,6 @@ nv40_instmem_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
priv
->
base
.
reserved
+=
512
*
1024
;
/* object storage */
priv
->
base
.
reserved
=
round_up
(
priv
->
base
.
reserved
,
4096
);
priv
->
base
.
alloc
=
nv04_instmem_alloc
;
ret
=
nouveau_mm_init
(
&
priv
->
heap
,
0
,
priv
->
base
.
reserved
,
1
);
if
(
ret
)
...
...
@@ -106,24 +123,10 @@ nv40_instmem_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
return
0
;
}
static
u32
nv40_instmem_rd32
(
struct
nouveau_object
*
object
,
u64
addr
)
{
struct
nv04_instmem_priv
*
priv
=
(
void
*
)
object
;
return
ioread32_native
(
priv
->
iomem
+
addr
);
}
static
void
nv40_instmem_wr32
(
struct
nouveau_object
*
object
,
u64
addr
,
u32
data
)
{
struct
nv04_instmem_priv
*
priv
=
(
void
*
)
object
;
iowrite32_native
(
data
,
priv
->
iomem
+
addr
);
}
struct
nouveau_oclass
nv40_instmem_oclass
=
{
.
handle
=
NV_SUBDEV
(
INSTMEM
,
0x40
),
.
ofuncs
=
&
(
struct
nouveau_ofuncs
)
{
struct
nouveau_oclass
*
nv40_instmem_oclass
=
&
(
struct
nouveau_instmem_impl
)
{
.
base
.
handle
=
NV_SUBDEV
(
INSTMEM
,
0x40
),
.
base
.
ofuncs
=
&
(
struct
nouveau_ofuncs
)
{
.
ctor
=
nv40_instmem_ctor
,
.
dtor
=
nv04_instmem_dtor
,
.
init
=
_nouveau_instmem_init
,
...
...
@@ -131,4 +134,5 @@ nv40_instmem_oclass = {
.
rd32
=
nv40_instmem_rd32
,
.
wr32
=
nv40_instmem_wr32
,
},
};
.
instobj
=
&
nv04_instobj_oclass
,
}.
base
;
drivers/gpu/drm/nouveau/core/subdev/instmem/nv50.c
View file @
24a4ae86
...
...
@@ -22,11 +22,11 @@
* Authors: Ben Skeggs
*/
#include <subdev/instmem.h>
#include <subdev/fb.h>
#include <core/mm.h>
#include "priv.h"
struct
nv50_instmem_priv
{
struct
nouveau_instmem
base
;
spinlock_t
lock
;
...
...
@@ -125,13 +125,16 @@ nv50_instobj_oclass = {
},
};
/******************************************************************************
* instmem subdev implementation
*****************************************************************************/
static
int
nv50_instmem_alloc
(
struct
nouveau_instmem
*
imem
,
struct
nouveau_object
*
parent
,
u32
size
,
u32
align
,
struct
nouveau_object
**
pobject
)
nv50_instmem_fini
(
struct
nouveau_object
*
object
,
bool
suspend
)
{
struct
n
ouveau_object
*
engine
=
nv_object
(
imem
)
;
return
nouveau_object_ctor
(
parent
,
engine
,
&
nv50_instobj_oclass
,
(
void
*
)(
unsigned
long
)
align
,
size
,
pobject
);
struct
n
v50_instmem_priv
*
priv
=
(
void
*
)
object
;
priv
->
addr
=
~
0ULL
;
return
nouveau_instmem_fini
(
&
priv
->
base
,
suspend
);
}
static
int
...
...
@@ -148,25 +151,17 @@ nv50_instmem_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
return
ret
;
spin_lock_init
(
&
priv
->
lock
);
priv
->
base
.
alloc
=
nv50_instmem_alloc
;
return
0
;
}
static
int
nv50_instmem_fini
(
struct
nouveau_object
*
object
,
bool
suspend
)
{
struct
nv50_instmem_priv
*
priv
=
(
void
*
)
object
;
priv
->
addr
=
~
0ULL
;
return
nouveau_instmem_fini
(
&
priv
->
base
,
suspend
);
}
struct
nouveau_oclass
nv50_instmem_oclass
=
{
.
handle
=
NV_SUBDEV
(
INSTMEM
,
0x50
),
.
ofuncs
=
&
(
struct
nouveau_ofuncs
)
{
struct
nouveau_oclass
*
nv50_instmem_oclass
=
&
(
struct
nouveau_instmem_impl
)
{
.
base
.
handle
=
NV_SUBDEV
(
INSTMEM
,
0x50
),
.
base
.
ofuncs
=
&
(
struct
nouveau_ofuncs
)
{
.
ctor
=
nv50_instmem_ctor
,
.
dtor
=
_nouveau_instmem_dtor
,
.
init
=
_nouveau_instmem_init
,
.
fini
=
nv50_instmem_fini
,
},
};
.
instobj
=
&
nv50_instobj_oclass
,
}.
base
;
drivers/gpu/drm/nouveau/core/subdev/instmem/priv.h
0 → 100644
View file @
24a4ae86
#ifndef __NVKM_INSTMEM_PRIV_H__
#define __NVKM_INSTMEM_PRIV_H__
#include <subdev/instmem.h>
struct
nouveau_instmem_impl
{
struct
nouveau_oclass
base
;
struct
nouveau_oclass
*
instobj
;
};
#define nouveau_instmem_create(p,e,o,d) \
nouveau_instmem_create_((p), (e), (o), sizeof(**d), (void **)d)
#define nouveau_instmem_destroy(p) \
nouveau_subdev_destroy(&(p)->base)
#define nouveau_instmem_init(p) ({ \
struct nouveau_instmem *imem = (p); \
_nouveau_instmem_init(nv_object(imem)); \
})
#define nouveau_instmem_fini(p,s) ({ \
struct nouveau_instmem *imem = (p); \
_nouveau_instmem_fini(nv_object(imem), (s)); \
})
int
nouveau_instmem_create_
(
struct
nouveau_object
*
,
struct
nouveau_object
*
,
struct
nouveau_oclass
*
,
int
,
void
**
);
#define _nouveau_instmem_dtor _nouveau_subdev_dtor
int
_nouveau_instmem_init
(
struct
nouveau_object
*
);
int
_nouveau_instmem_fini
(
struct
nouveau_object
*
,
bool
);
#endif
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