Commit 302da0cd authored by Matt Roper's avatar Matt Roper

drm/i915: Use intel_ types more consistently for color management code (v2)

Try to be more consistent about intel_* types rather than drm_* types
for lower-level driver functions.  While we're at it, let's also be more
consistent with state variable naming (half of the platforms use the
name 'state' whereas the other half used 'crtc_state').

While we're touching these variables, let's also be more consistent
about always naming the intel_crtc_state's "crtc_state" rather than
"state" so that different platform types aren't using different naming
conventions.

v2:
 - s/state/crtc_state/ for consistency between platform types (Ville)
 - Drop the crtc parameter to intel_color_check(); we can just pull that
   out of the state object.
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181210215415.19854-2-matthew.d.roper@intel.com
parent cd1d3ee9
...@@ -320,8 +320,8 @@ struct drm_i915_display_funcs { ...@@ -320,8 +320,8 @@ struct drm_i915_display_funcs {
/* display clock increase/decrease */ /* display clock increase/decrease */
/* pll clock increase/decrease */ /* pll clock increase/decrease */
void (*load_csc_matrix)(struct drm_crtc_state *crtc_state); void (*load_csc_matrix)(struct intel_crtc_state *crtc_state);
void (*load_luts)(struct drm_crtc_state *crtc_state); void (*load_luts)(struct intel_crtc_state *crtc_state);
}; };
#define CSR_VERSION(major, minor) ((major) << 16 | (minor)) #define CSR_VERSION(major, minor) ((major) << 16 | (minor))
......
This diff is collapsed.
...@@ -5641,7 +5641,7 @@ static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config, ...@@ -5641,7 +5641,7 @@ static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config,
* On ILK+ LUT must be loaded before the pipe is running but with * On ILK+ LUT must be loaded before the pipe is running but with
* clocks enabled * clocks enabled
*/ */
intel_color_load_luts(&pipe_config->base); intel_color_load_luts(pipe_config);
if (dev_priv->display.initial_watermarks != NULL) if (dev_priv->display.initial_watermarks != NULL)
dev_priv->display.initial_watermarks(old_intel_state, pipe_config); dev_priv->display.initial_watermarks(old_intel_state, pipe_config);
...@@ -5752,7 +5752,7 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config, ...@@ -5752,7 +5752,7 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
haswell_set_pipemisc(pipe_config); haswell_set_pipemisc(pipe_config);
intel_color_set_csc(&pipe_config->base); intel_color_set_csc(pipe_config);
intel_crtc->active = true; intel_crtc->active = true;
...@@ -5771,7 +5771,7 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config, ...@@ -5771,7 +5771,7 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
* On ILK+ LUT must be loaded before the pipe is running but with * On ILK+ LUT must be loaded before the pipe is running but with
* clocks enabled * clocks enabled
*/ */
intel_color_load_luts(&pipe_config->base); intel_color_load_luts(pipe_config);
/* /*
* Display WA #1153: enable hardware to bypass the alpha math * Display WA #1153: enable hardware to bypass the alpha math
...@@ -6117,7 +6117,7 @@ static void valleyview_crtc_enable(struct intel_crtc_state *pipe_config, ...@@ -6117,7 +6117,7 @@ static void valleyview_crtc_enable(struct intel_crtc_state *pipe_config,
i9xx_set_pipeconf(pipe_config); i9xx_set_pipeconf(pipe_config);
intel_color_set_csc(&pipe_config->base); intel_color_set_csc(pipe_config);
intel_crtc->active = true; intel_crtc->active = true;
...@@ -6137,7 +6137,7 @@ static void valleyview_crtc_enable(struct intel_crtc_state *pipe_config, ...@@ -6137,7 +6137,7 @@ static void valleyview_crtc_enable(struct intel_crtc_state *pipe_config,
i9xx_pfit_enable(pipe_config); i9xx_pfit_enable(pipe_config);
intel_color_load_luts(&pipe_config->base); intel_color_load_luts(pipe_config);
dev_priv->display.initial_watermarks(old_intel_state, dev_priv->display.initial_watermarks(old_intel_state,
pipe_config); pipe_config);
...@@ -6193,7 +6193,7 @@ static void i9xx_crtc_enable(struct intel_crtc_state *pipe_config, ...@@ -6193,7 +6193,7 @@ static void i9xx_crtc_enable(struct intel_crtc_state *pipe_config,
i9xx_pfit_enable(pipe_config); i9xx_pfit_enable(pipe_config);
intel_color_load_luts(&pipe_config->base); intel_color_load_luts(pipe_config);
if (dev_priv->display.initial_watermarks != NULL) if (dev_priv->display.initial_watermarks != NULL)
dev_priv->display.initial_watermarks(old_intel_state, dev_priv->display.initial_watermarks(old_intel_state,
...@@ -10972,7 +10972,7 @@ static int intel_crtc_atomic_check(struct drm_crtc *crtc, ...@@ -10972,7 +10972,7 @@ static int intel_crtc_atomic_check(struct drm_crtc *crtc,
} }
if (crtc_state->color_mgmt_changed) { if (crtc_state->color_mgmt_changed) {
ret = intel_color_check(crtc, crtc_state); ret = intel_color_check(pipe_config);
if (ret) if (ret)
return ret; return ret;
...@@ -13547,8 +13547,8 @@ static void intel_begin_crtc_commit(struct drm_crtc *crtc, ...@@ -13547,8 +13547,8 @@ static void intel_begin_crtc_commit(struct drm_crtc *crtc,
if (!modeset && if (!modeset &&
(intel_cstate->base.color_mgmt_changed || (intel_cstate->base.color_mgmt_changed ||
intel_cstate->update_pipe)) { intel_cstate->update_pipe)) {
intel_color_set_csc(&intel_cstate->base); intel_color_set_csc(intel_cstate);
intel_color_load_luts(&intel_cstate->base); intel_color_load_luts(intel_cstate);
} }
/* Perform vblank evasion around commit operation */ /* Perform vblank evasion around commit operation */
...@@ -14121,7 +14121,7 @@ static int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe) ...@@ -14121,7 +14121,7 @@ static int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
drm_crtc_helper_add(&intel_crtc->base, &intel_helper_funcs); drm_crtc_helper_add(&intel_crtc->base, &intel_helper_funcs);
intel_color_init(&intel_crtc->base); intel_color_init(intel_crtc);
WARN_ON(drm_crtc_index(&intel_crtc->base) != intel_crtc->pipe); WARN_ON(drm_crtc_index(&intel_crtc->base) != intel_crtc->pipe);
......
...@@ -2327,10 +2327,10 @@ int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_ ...@@ -2327,10 +2327,10 @@ int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_
struct intel_plane_state *intel_state); struct intel_plane_state *intel_state);
/* intel_color.c */ /* intel_color.c */
void intel_color_init(struct drm_crtc *crtc); void intel_color_init(struct intel_crtc *crtc);
int intel_color_check(struct drm_crtc *crtc, struct drm_crtc_state *state); int intel_color_check(struct intel_crtc_state *crtc_state);
void intel_color_set_csc(struct drm_crtc_state *crtc_state); void intel_color_set_csc(struct intel_crtc_state *crtc_state);
void intel_color_load_luts(struct drm_crtc_state *crtc_state); void intel_color_load_luts(struct intel_crtc_state *crtc_state);
/* intel_lspcon.c */ /* intel_lspcon.c */
bool lspcon_init(struct intel_digital_port *intel_dig_port); bool lspcon_init(struct intel_digital_port *intel_dig_port);
......
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