Skip to content

L
linux
Commit 6365711d authored by Matthew Wilcox's avatar Matthew Wilcox Committed by Linus Torvalds
Browse files
Options

[PATCH] PA-RISC irq handling improvements 

 - Move the bits_wide parameter from txn_alloc_data to txn_alloc_irq.
   It's too late by the time it hits txn_alloc_data(), we can only panic.
   In txn_alloc_irq, we can fail the allocation and continue.
 - Also fix a bug where we'd only allow up to half the interrupts to be
   allocated.  Not a problem for iosapic machines, but might have sucked
   on a really big GSC-based machine.
 - Add missing irq_enter() / irq_exit()
 - Allow interrupt processing to be interrupted by the timer tick so we
   actually account hard interrupts.  Also speed up the handling of CPU
   interrupts by not masking with cpu_eiem again.
 - Remove sufficiently obsolete DEBUG_IRQ code
 - Remove limit on times around the loop.  If we exit the loop while
   interrupts are still pending, we'll only be re-interrupted as soon
   as we exit the function.
 - Remove unnecessary includes
Signed-off-by: default avatarMatthew Wilcox <willy@parisc-linux.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 16b81ecc
Hide whitespace changes
Inline Side-by-side
Showing with 44 additions and 74 deletions
arch/parisc/kernel/irq.c
View file @ 6365711d
......@@ -5,6 +5,7 @@
* Copyright (C) 1994, 1995, 1996, 1997, 1998 Ralf Baechle
* Copyright (C) 1999 SuSE GmbH (Philipp Rumpf, prumpf@tux.org)
* Copyright (C) 1999-2000 Grant Grundler
* Copyright (c) 2005 Matthew Wilcox
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
......@@ -22,38 +23,19 @@
*/
#include <linux/bitops.h>
#include <linux/config.h>
#include <linux/eisa.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/signal.h>
#include <linux/types.h>
#include <linux/ioport.h>
#include <linux/timex.h>
#include <linux/slab.h>
#include <linux/random.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
#include <linux/kernel_stat.h>
#include <linux/irq.h>
#include <linux/seq_file.h>
#include <linux/spinlock.h>
#include <linux/types.h>
#include <asm/cache.h>
#include <asm/pdc.h>
#undef DEBUG_IRQ
#undef PARISC_IRQ_CR16_COUNTS
extern irqreturn_t timer_interrupt(int, void *, struct pt_regs *);
extern irqreturn_t ipi_interrupt(int, void *, struct pt_regs *);
#ifdef DEBUG_IRQ
#define DBG_IRQ(irq, x) if ((irq) != TIMER_IRQ) printk x
#else /* DEBUG_IRQ */
#define DBG_IRQ(irq, x) do { } while (0)
#endif /* DEBUG_IRQ */
#define EIEM_MASK(irq) (1UL<<(CPU_IRQ_MAX - irq))
/* Bits in EIEM correlate with cpu_irq_action[].
......@@ -200,7 +182,25 @@ int txn_claim_irq(int irq)
return cpu_claim_irq(irq, NULL, NULL) ? -1 : irq;
}
int txn_alloc_irq(void)
/*
* The bits_wide parameter accommodates the limitations of the HW/SW which
* use these bits:
* Legacy PA I/O (GSC/NIO): 5 bits (architected EIM register)
* V-class (EPIC): 6 bits
* N/L/A-class (iosapic): 8 bits
* PCI 2.2 MSI: 16 bits
* Some PCI devices: 32 bits (Symbios SCSI/ATM/HyperFabric)
*
* On the service provider side:
* o PA 1.1 (and PA2.0 narrow mode) 5-bits (width of EIR register)
* o PA 2.0 wide mode 6-bits (per processor)
* o IA64 8-bits (0-256 total)
*
* So a Legacy PA I/O device on a PA 2.0 box can't use all the bits supported
* by the processor...and the N/L-class I/O subsystem supports more bits than
* PA2.0 has. The first case is the problem.
*/
int txn_alloc_irq(unsigned int bits_wide)
{
int irq;
......@@ -208,6 +208,8 @@ int txn_alloc_irq(void)
for (irq = CPU_IRQ_BASE + 1; irq <= CPU_IRQ_MAX; irq++) {
if (cpu_claim_irq(irq, NULL, NULL) < 0)
continue;
if ((irq - CPU_IRQ_BASE) >= (1 << bits_wide))
continue;
return irq;
}
......@@ -215,7 +217,7 @@ int txn_alloc_irq(void)
return -1;
}
unsigned long txn_alloc_addr(int virt_irq)
unsigned long txn_alloc_addr(unsigned int virt_irq)
{
static int next_cpu = -1;
......@@ -233,36 +235,8 @@ unsigned long txn_alloc_addr(int virt_irq)
}
/*
** The alloc process needs to accept a parameter to accommodate limitations
** of the HW/SW which use these bits:
** Legacy PA I/O (GSC/NIO): 5 bits (architected EIM register)
** V-class (EPIC): 6 bits
** N/L-class/A500: 8 bits (iosapic)
** PCI 2.2 MSI: 16 bits (I think)
** Existing PCI devices: 32-bits (all Symbios SCSI/ATM/HyperFabric)
**
** On the service provider side:
** o PA 1.1 (and PA2.0 narrow mode) 5-bits (width of EIR register)
** o PA 2.0 wide mode 6-bits (per processor)
** o IA64 8-bits (0-256 total)
**
** So a Legacy PA I/O device on a PA 2.0 box can't use all
** the bits supported by the processor...and the N/L-class
** I/O subsystem supports more bits than PA2.0 has. The first
** case is the problem.
*/
unsigned int txn_alloc_data(int virt_irq, unsigned int bits_wide)
unsigned int txn_alloc_data(unsigned int virt_irq)
{
/* XXX FIXME : bits_wide indicates how wide the transaction
** data is allowed to be...we may need a different virt_irq
** if this one won't work. Another reason to index virtual
** irq's into a table which can manage CPU/IRQ bit separately.
*/
if ((virt_irq - CPU_IRQ_BASE) > (1 << (bits_wide - 1))) {
panic("Sorry -- didn't allocate valid IRQ for this device\n");
}
return virt_irq - CPU_IRQ_BASE;
}
......@@ -270,42 +244,35 @@ unsigned int txn_alloc_data(int virt_irq, unsigned int bits_wide)
void do_cpu_irq_mask(struct pt_regs *regs)
{
unsigned long eirr_val;
unsigned int i=3; /* limit time in interrupt context */
irq_enter();
/*
* PSW_I or EIEM bits cannot be enabled until after the
* interrupts are processed.
* timer_interrupt() assumes it won't get interrupted when it
* holds the xtime_lock...an unmasked interrupt source could
* interrupt and deadlock by trying to grab xtime_lock too.
* Keeping PSW_I and EIEM disabled avoids this.
* Only allow interrupt processing to be interrupted by the
* timer tick
*/
set_eiem(0UL); /* disable all extr interrupt for now */
set_eiem(EIEM_MASK(TIMER_IRQ));
/* 1) only process IRQs that are enabled/unmasked (cpu_eiem)
* 2) We loop here on EIRR contents in order to avoid
* nested interrupts or having to take another interrupt
* when we could have just handled it right away.
* 3) Limit the number of times we loop to make sure other
* processing can occur.
*/
for (;;) {
unsigned long bit = (1UL << (BITS_PER_LONG - 1));
unsigned int irq;
eirr_val = mfctl(23) & cpu_eiem;
if (!eirr_val || !i--)
if (!eirr_val)
break;
mtctl(eirr_val, 23); /* reset bits we are going to process */
if (eirr_val & EIEM_MASK(TIMER_IRQ))
set_eiem(0);
#ifdef DEBUG_IRQ
if (eirr_val != (1UL << MAX_CPU_IRQ))
printk(KERN_DEBUG "do_cpu_irq_mask 0x%x & 0x%x\n", eirr_val, cpu_eiem);
#endif
mtctl(eirr_val, 23); /* reset bits we are going to process */
/* Work our way from MSb to LSb...same order we alloc EIRs */
for (irq = TIMER_IRQ; eirr_val && bit; bit>>=1, irq++) {
if (!(bit & eirr_val & cpu_eiem))
if (!(bit & eirr_val))
continue;
/* clear bit in mask - can exit loop sooner */
......@@ -315,6 +282,7 @@ void do_cpu_irq_mask(struct pt_regs *regs)
}
}
set_eiem(cpu_eiem);
irq_exit();
}
......
drivers/parisc/gsc.c
View file @ 6365711d
......@@ -38,14 +38,14 @@
int gsc_alloc_irq(struct gsc_irq *i)
{
int irq = txn_alloc_irq();
int irq = txn_alloc_irq(GSC_EIM_WIDTH);
if (irq < 0) {
printk("cannot get irq\n");
return irq;
}
i->txn_addr = txn_alloc_addr(irq);
i->txn_data = txn_alloc_data(irq, GSC_EIM_WIDTH);
i->txn_data = txn_alloc_data(irq);
i->irq = irq;
return irq;
......@@ -64,7 +64,7 @@ int gsc_claim_irq(struct gsc_irq *i, int irq)
}
i->txn_addr = txn_alloc_addr(irq);
i->txn_data = txn_alloc_data(irq, GSC_EIM_WIDTH);
i->txn_data = txn_alloc_data(irq);
i->irq = irq;
return irq;
......
include/asm-parisc/irq.h
View file @ 6365711d
......@@ -40,10 +40,12 @@ struct hw_interrupt_type;
void no_ack_irq(unsigned int irq);
void no_end_irq(unsigned int irq);
extern int txn_alloc_irq(void);
extern int txn_alloc_irq(unsigned int nbits);
extern int txn_claim_irq(int);
extern unsigned int txn_alloc_data(int, unsigned int);
extern unsigned long txn_alloc_addr(int);
extern unsigned int txn_alloc_data(unsigned int);
extern unsigned long txn_alloc_addr(unsigned int);
extern int cpu_claim_irq(unsigned int irq, struct hw_interrupt_type *, void *);
extern int cpu_claim_irq(unsigned int irq, struct hw_interrupt_type *, void *);
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment
GitLab Nexedi Edition | About GitLab | About Nexedi | 沪ICP备2021021310号-2 | 沪ICP备2021021310号-7