Commit 6989cc8f authored by Damien Riegel's avatar Damien Riegel Committed by Shawn Guo

ARM: dts: TS-4800: drop uart rts/cts pin reservations

These pins are actually not routed for UARTs, they should not be
reserved.
Signed-off-by: default avatarDamien Riegel <damien.riegel@savoirfairelinux.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 419e202b
...@@ -157,8 +157,6 @@ pinctrl_uart1: uart1grp { ...@@ -157,8 +157,6 @@ pinctrl_uart1: uart1grp {
fsl,pins = < fsl,pins = <
MX51_PAD_UART1_RXD__UART1_RXD 0x1c5 MX51_PAD_UART1_RXD__UART1_RXD 0x1c5
MX51_PAD_UART1_TXD__UART1_TXD 0x1c5 MX51_PAD_UART1_TXD__UART1_TXD 0x1c5
MX51_PAD_UART1_RTS__UART1_RTS 0x1c5
MX51_PAD_UART1_CTS__UART1_CTS 0x1c5
>; >;
}; };
...@@ -173,8 +171,6 @@ pinctrl_uart3: uart3grp { ...@@ -173,8 +171,6 @@ pinctrl_uart3: uart3grp {
fsl,pins = < fsl,pins = <
MX51_PAD_EIM_D25__UART3_RXD 0x1c5 MX51_PAD_EIM_D25__UART3_RXD 0x1c5
MX51_PAD_EIM_D26__UART3_TXD 0x1c5 MX51_PAD_EIM_D26__UART3_TXD 0x1c5
MX51_PAD_EIM_D27__UART3_RTS 0x1c5
MX51_PAD_EIM_D24__UART3_CTS 0x1c5
>; >;
}; };
}; };
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment