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Commit 7171a8da authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'arm-dt-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc 

Pull ARM devicetree updates from Arnd Bergmann:
 "Most of the changes fall into one of three categories: adding support
  for additional devices on existing machines, cleaning up issues found
  by the ongoing conversion to machine-readable bindings, and addressing
  minor mistakes in the existing DT data.

  Across SoC vendors, Qualcomm and Freescale stick out as getting the
  most updates, which corresponds to their dominance in the mobile phone
  and embedded industrial markets, respectively.

  There are 636 non-merge changeset in this branch, which is a little
  lower than most times, but more importantly we only add 36 machine
  files, which is about half of what we had the past few releases.

  Eight new SoCs are added, but all of them are variations of already
  supported SoC families, and most of them come with one reference board
  design from the SoC vendor:

   - Mediatek MT8186 is a Chromebook/Tablet type SoC, similar to the
     MT65xx series of phone SoCs, with two Cortex-A76 and six Cortex-A55
     cores.

   - TI AM62A is another member of the K3 family with Cortex-A53 cores,
     this one is targetted at Video/Vision processing for industrial and
     automotive applications.

   - NXP i.MX8DXL is another chip for this market in the ever-growing
     i.MX8 family, this one again with two Cortex-A35 cores.

   - Renesas R-Car H3Ne-1.7G (R8A779MB) and R-Car V3H2 (R8A77980A) are
     minor updates of R8A77951 and R8A77980, respectively.

   - Qualcomm IPQ8064-v2.0, IPQ8062 and IPQ8065 are all variants of the
     IPQ8064 chip, with minimally different features.

  The AMD Pensando Elba and Apple M1 Ultra SoC support was getting close
  this time, but in the end did not make the cut.

  The new machines based on existing SoC support are fairly uneventful:

   - Sony Xperia 1 IV is a fairly recent phone based on Qualcomm
     Snapdragon 8 Gen 1.

   - Three Samsung phones based on Snapdragon 410: Galaxy E5, E7 and
     Grand Max. These are added for both 32-bit and 64-bit kernels, as
     they originally shipped running 32-bit code.

   - Two new servers using AST2600 BMCs: AMD DaytonaX and Ampere Mt.
     Mitchell

   - Three new machines based on Rockchips RK3399 and RK3566: Anberic
     RG353P and RG503, Pine64 Pinephone Pro, Open AI Lab

   - Multiple NXP i.MX6/i.MX8 based boards: Kontron SL/BL i.MX8MM OSM-S,
     i.MX8MM Gateworks GW7904, MSC SM2S-IMX8PLUS SoM and carrier board

   - Two development boards in the Microchip AT91 family: SAMA5D3-EDS
     and lan966x-pcb8290.

   - Minor variants of existing boards using Amlogic, Broadcom, Marvell,
     Rockchips, Freescale Layerscape and Socionext Uniphier SoCs"

* tag 'arm-dt-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (617 commits)
  Revert "ARM: dts: BCM5301X: Add basic PCI controller properties"
  ARM: dts: s5pv210: correct double "pins" in pinmux node
  ARM: dts: exynos: fix polarity of VBUS GPIO of Origen
  arm64: dts: exynos: fix polarity of "enable" line of NFC chip in TM2
  arm64: dts: uniphier: Add L2 cache node
  arm64: dts: uniphier: Remove compatible "snps,dw-pcie" from pcie node
  arm64: dts: uniphier: Fix opp-table node name for LD20
  arm64: dts: uniphier: Add USB-device support for PXs3 reference board
  arm64: dts: uniphier: Add ahci controller nodes for PXs3
  arm64: dts: uniphier: Use GIC interrupt definitions
  arm64: dts: uniphier: Rename gpio-hog nodes
  arm64: dts: uniphier: Rename usb-glue node for USB3 to usb-controller
  arm64: dts: uniphier: Rename usb-phy node for USB2 to usb-controller
  arm64: dts: uniphier: Rename pvtctl node to thermal-sensor
  ARM: dts: uniphier: Remove compatible "snps,dw-pcie-ep" from pcie-ep node
  ARM: dts: uniphier: Move interrupt-parent property to each child node in uniphier-support-card
  ARM: dts: uniphier: Add ahci controller nodes for PXs2
  ARM: dts: uniphier: Add ahci controller nodes for Pro4
  ARM: dts: uniphier: Use GIC interrupt definitions
  ARM: dts: uniphier: Rename gpio-hog node
  ...
parents ff6862c2 114b9da7
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Showing with 27832 additions and 4574 deletions
Documentation/devicetree/bindings/arm/amlogic.yaml
View file @ 7171a8da
......@@ -120,6 +120,7 @@ properties:
- enum:
- amlogic,q200
- amlogic,q201
- azw,gt1-ultimate
- khadas,vim2
- kingnovel,r-box-pro
- libretech,aml-s912-pc
......@@ -136,6 +137,7 @@ properties:
- enum:
- amlogic,s400
- jethome,jethub-j100
- jethome,jethub-j110
- const: amlogic,a113d
- const: amlogic,meson-axg
......
Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml
View file @ 7171a8da
......@@ -29,6 +29,7 @@ properties:
- description: AST2500 based boards
items:
- enum:
- amd,daytonax-bmc
- amd,ethanolx-bmc
- ampere,mtjade-bmc
- aspeed,ast2500-evb
......@@ -69,6 +70,7 @@ properties:
- description: AST2600 based boards
items:
- enum:
- ampere,mtmitchell-bmc
- aspeed,ast2600-evb
- aspeed,ast2600-evb-a1
- facebook,bletchley-bmc
......
Documentation/devicetree/bindings/arm/atmel-at91.yaml
View file @ 7171a8da
......@@ -127,6 +127,13 @@ properties:
- const: atmel,sama5d3
- const: atmel,sama5
- description: Microchip SAMA5D3 Ethernet Development System Board
items:
- const: microchip,sama5d3-eds
- const: atmel,sama5d36
- const: atmel,sama5d3
- const: atmel,sama5
- description: CalAmp LMU5000 board
items:
- const: calamp,lmu5000
......
Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml deleted 100644 → 0
View file @ ff6862c2
# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/bcm/brcm,bcm4908.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Broadcom BCM4908 device tree bindings
description:
Broadcom BCM4906 / BCM4908 / BCM49408 Wi-Fi/network SoCs with Brahma CPUs.
maintainers:
- Rafał Miłecki <rafal@milecki.pl>
properties:
$nodename:
const: '/'
compatible:
oneOf:
- description: BCM4906 based boards
items:
- enum:
- netgear,r8000p
- tplink,archer-c2300-v1
- const: brcm,bcm4906
- const: brcm,bcm4908
- description: BCM4908 based boards
items:
- enum:
- asus,gt-ac5300
- netgear,raxe500
- const: brcm,bcm4908
- description: BCM49408 based boards
items:
- const: brcm,bcm49408
- const: brcm,bcm4908
additionalProperties: true
...
Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
View file @ 7171a8da
......@@ -15,6 +15,7 @@ maintainers:
- William Zhang <william.zhang@broadcom.com>
- Anand Gore <anand.gore@broadcom.com>
- Kursad Oney <kursad.oney@broadcom.com>
- Rafał Miłecki <rafal@milecki.pl>
properties:
$nodename:
......@@ -28,6 +29,30 @@ properties:
- const: brcm,bcm47622
- const: brcm,bcmbca
- description: BCM4906 based boards
items:
- enum:
- netgear,r8000p
- tplink,archer-c2300-v1
- const: brcm,bcm4906
- const: brcm,bcm4908
- const: brcm,bcmbca
- description: BCM4908 based boards
items:
- enum:
- asus,gt-ac5300
- brcm,bcm94908
- netgear,raxe500
- const: brcm,bcm4908
- const: brcm,bcmbca
- description: BCM49408 based boards
items:
- const: brcm,bcm49408
- const: brcm,bcm4908
- const: brcm,bcmbca
- description: BCM4912 based boards
items:
- enum:
......
Documentation/devicetree/bindings/arm/marvell/armada-37xx.txt
View file @ 7171a8da
Marvell Armada 37xx Platforms Device Tree Bindings
--------------------------------------------------
Boards using a SoC of the Marvell Armada 37xx family must carry the
following root node property:
- compatible: must contain "marvell,armada3710"
In addition, boards using the Marvell Armada 3720 SoC shall have the
following property before the previous one:
- compatible: must contain "marvell,armada3720"
Example:
compatible = "marvell,armada-3720-db", "marvell,armada3720", "marvell,armada3710";
Power management
----------------
......@@ -48,11 +30,3 @@ avs: avs@11500 {
compatible = "marvell,armada-3700-avs", "syscon";
reg = <0x11500 0x40>;
}
CZ.NIC's Turris Mox SOHO router Device Tree Bindings
----------------------------------------------------
Required root node property:
- compatible: must contain "cznic,turris-mox"
Documentation/devicetree/bindings/arm/marvell/armada-37xx.yaml 0 → 100644
View file @ 7171a8da
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/marvell/armada-37xx.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Marvell Armada 37xx Platforms
maintainers:
- Robert Marko <robert.marko@sartura.hr>
properties:
$nodename:
const: '/'
compatible:
oneOf:
- description: Armada 3720 SoC boards
items:
- enum:
- cznic,turris-mox
- globalscale,espressobin
- marvell,armada-3720-db
- methode,edpu
- methode,udpu
- const: marvell,armada3720
- const: marvell,armada3710
- description: Globalscale Espressobin boards
items:
- enum:
- globalscale,espressobin-emmc
- globalscale,espressobin-ultra
- globalscale,espressobin-v7
- const: globalscale,espressobin
- const: marvell,armada3720
- const: marvell,armada3710
- description: Globalscale Espressobin V7 boards
items:
- enum:
- globalscale,espressobin-v7-emmc
- const: globalscale,espressobin-v7
- const: globalscale,espressobin
- const: marvell,armada3720
- const: marvell,armada3710
additionalProperties: true
Documentation/devicetree/bindings/arm/qcom.yaml
View file @ 7171a8da
......@@ -176,6 +176,9 @@ properties:
- longcheer,l8910
- samsung,a3u-eur
- samsung,a5u-eur
- samsung,e5
- samsung,e7
- samsung,grandmax
- samsung,j5
- samsung,serranove
- wingtech,wt88047
......@@ -450,6 +453,7 @@ properties:
- description: Google Pazquel with LTE and Parade (newest rev)
items:
- const: google,pazquel-sku6
- const: google,pazquel-sku4
- const: qcom,sc7180
......@@ -550,6 +554,7 @@ properties:
- description: Qualcomm Technologies, Inc. sc7280 CRD platform (newest rev)
items:
- const: google,zoglin
- const: google,hoglin
- const: qcom,sc7280
......@@ -565,16 +570,31 @@ properties:
- const: google,piglin
- const: qcom,sc7280
- description: Google Evoker (newest rev)
items:
- const: google,evoker
- const: qcom,sc7280
- description: Google Herobrine (newest rev)
items:
- const: google,herobrine
- const: qcom,sc7280
- description: Google Villager (rev0)
items:
- const: google,villager-rev0
- const: qcom,sc7280
- description: Google Villager (newest rev)
items:
- const: google,villager
- const: qcom,sc7280
- description: Google Villager with LTE (newest rev)
items:
- const: google,villager-sku512
- const: qcom,sc7280
- items:
- enum:
- lenovo,flex-5g
......@@ -716,6 +736,7 @@ properties:
- enum:
- qcom,sm8450-hdk
- qcom,sm8450-qrd
- sony,pdx223
- const: qcom,sm8450
additionalProperties: true
......
Documentation/devicetree/bindings/arm/renesas.yaml
View file @ 7171a8da
......@@ -264,6 +264,7 @@ properties:
- renesas,r8a779m4
- renesas,r8a779m5
- renesas,r8a779m8
- renesas,r8a779mb
- enum:
- renesas,r8a7795
- renesas,r8a77961
......@@ -291,6 +292,13 @@ properties:
- renesas,v3hsk # V3HSK (Y-ASK-RCAR-V3H-WS10)
- const: renesas,r8a77980
- description: R-Car V3H2 (R8A77980A)
items:
- enum:
- renesas,condor-i # Condor-I (RTP0RC77980SEBS012SA01)
- const: renesas,r8a77980a
- const: renesas,r8a77980
- description: R-Car E3 (R8A77990)
items:
- enum:
......@@ -409,6 +417,14 @@ properties:
- const: renesas,r8a779m8
- const: renesas,r8a7795
- description: R-Car H3Ne-1.7G (R8A779MB)
items:
- enum:
- renesas,h3ulcb # H3ULCB (R-Car Starter Kit Premier)
- renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version)
- const: renesas,r8a779mb
- const: renesas,r8a7795
- description: RZ/N1D (R9A06G032)
items:
- enum:
......
Documentation/devicetree/bindings/arm/rockchip.yaml
View file @ 7171a8da
......@@ -30,6 +30,16 @@ properties:
- const: amarula,vyasa-rk3288
- const: rockchip,rk3288
- description: Anbernic RG353P
items:
- const: anbernic,rg353p
- const: rockchip,rk3566
- description: Anbernic RG503
items:
- const: anbernic,rg503
- const: rockchip,rk3566
- description: Asus Tinker board
items:
- const: asus,rk3288-tinker
......@@ -151,6 +161,7 @@ properties:
- friendlyarm,nanopi-m4b
- friendlyarm,nanopi-neo4
- friendlyarm,nanopi-r4s
- friendlyarm,nanopi-r4s-enterprise
- const: rockchip,rk3399
- description: GeekBuying GeekBox
......@@ -363,30 +374,55 @@ properties:
- const: google,gru
- const: rockchip,rk3399
- description: Google Scarlet - Innolux display (Acer Chromebook Tab 10)
- description: |
Google Scarlet - Innolux display (Acer Chromebook Tab 10 and more)
items:
- const: google,scarlet-rev15-sku2
- const: google,scarlet-rev15-sku4
- const: google,scarlet-rev15-sku6
- const: google,scarlet-rev15
- const: google,scarlet-rev14-sku2
- const: google,scarlet-rev14-sku4
- const: google,scarlet-rev14-sku6
- const: google,scarlet-rev14
- const: google,scarlet-rev13-sku2
- const: google,scarlet-rev13-sku4
- const: google,scarlet-rev13-sku6
- const: google,scarlet-rev13
- const: google,scarlet-rev12-sku2
- const: google,scarlet-rev12-sku4
- const: google,scarlet-rev12-sku6
- const: google,scarlet-rev12
- const: google,scarlet-rev11-sku2
- const: google,scarlet-rev11-sku4
- const: google,scarlet-rev11-sku6
- const: google,scarlet-rev11
- const: google,scarlet-rev10-sku2
- const: google,scarlet-rev10-sku4
- const: google,scarlet-rev10-sku6
- const: google,scarlet-rev10
- const: google,scarlet-rev9-sku2
- const: google,scarlet-rev9-sku4
- const: google,scarlet-rev9-sku6
- const: google,scarlet-rev9
- const: google,scarlet-rev8-sku2
- const: google,scarlet-rev8-sku4
- const: google,scarlet-rev8-sku6
- const: google,scarlet-rev8
- const: google,scarlet-rev7-sku2
- const: google,scarlet-rev7-sku4
- const: google,scarlet-rev7-sku6
- const: google,scarlet-rev7
- const: google,scarlet-rev6-sku2
- const: google,scarlet-rev6-sku4
- const: google,scarlet-rev6-sku6
- const: google,scarlet-rev6
- const: google,scarlet-rev5-sku2
- const: google,scarlet-rev5-sku4
- const: google,scarlet-rev5-sku6
- const: google,scarlet-rev5
- const: google,scarlet-rev4-sku2
- const: google,scarlet-rev4-sku4
- const: google,scarlet-rev4-sku6
- const: google,scarlet-rev4
- const: google,scarlet
......@@ -470,6 +506,11 @@ properties:
- const: netxeon,r89
- const: rockchip,rk3288
- description: OPEN AI LAB EAIDK-610
items:
- const: openailab,eaidk-610
- const: rockchip,rk3399
- description: Orange Pi RK3399 board
items:
- const: rockchip,rk3399-orangepi
......@@ -494,6 +535,11 @@ properties:
- const: pine64,pinenote
- const: rockchip,rk3566
- description: Pine64 PinePhonePro
items:
- const: pine64,pinephone-pro
- const: rockchip,rk3399
- description: Pine64 Rock64
items:
- const: pine64,rock64
......@@ -537,6 +583,11 @@ properties:
- const: radxa,rockpi4
- const: rockchip,rk3399
- description: Radxa ROCK 4C+
items:
- const: radxa,rock-4c-plus
- const: rockchip,rk3399
- description: Radxa ROCK Pi E
items:
- const: radxa,rockpi-e
......
Documentation/devicetree/bindings/arm/ti/k3.yaml
View file @ 7171a8da
......@@ -19,32 +19,11 @@ properties:
compatible:
oneOf:
- description: K3 AM654 SoC
- description: K3 AM62A7 SoC
items:
- enum:
- ti,am654-evm
- siemens,iot2050-basic
- siemens,iot2050-basic-pg2
- siemens,iot2050-advanced
- siemens,iot2050-advanced-pg2
- const: ti,am654
- description: K3 J721E SoC
oneOf:
- const: ti,j721e
- items:
- enum:
- ti,j721e-evm
- ti,j721e-sk
- const: ti,j721e
- description: K3 J7200 SoC
oneOf:
- const: ti,j7200
- items:
- enum:
- ti,j7200-evm
- const: ti,j7200
- ti,am62a7-sk
- const: ti,am62a7
- description: K3 AM625 SoC
items:
......@@ -59,6 +38,33 @@ properties:
- ti,am642-sk
- const: ti,am642
- description: K3 AM654 SoC
items:
- enum:
- siemens,iot2050-advanced
- siemens,iot2050-advanced-pg2
- siemens,iot2050-basic
- siemens,iot2050-basic-pg2
- ti,am654-evm
- const: ti,am654
- description: K3 J7200 SoC
oneOf:
- const: ti,j7200
- items:
- enum:
- ti,j7200-evm
- const: ti,j7200
- description: K3 J721E SoC
oneOf:
- const: ti,j721e
- items:
- enum:
- ti,j721e-evm
- ti,j721e-sk
- const: ti,j721e
- description: K3 J721s2 SoC
items:
- enum:
......
Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml
View file @ 7171a8da
......@@ -36,13 +36,11 @@ properties:
items:
- description: LPASS qdsp6ss register
- description: LPASS top-cc register
- description: LPASS cc register
reg-names:
items:
- const: qdsp6ss
- const: top_cc
- const: cc
required:
- compatible
......@@ -59,8 +57,8 @@ examples:
#include <dt-bindings/clock/qcom,lpass-sc7280.h>
clock-controller@3000000 {
compatible = "qcom,sc7280-lpasscc";
reg = <0x03000000 0x40>, <0x03c04000 0x4>, <0x03389000 0x24>;
reg-names = "qdsp6ss", "top_cc", "cc";
reg = <0x03000000 0x40>, <0x03c04000 0x4>;
reg-names = "qdsp6ss", "top_cc";
clocks = <&gcc GCC_CFG_NOC_LPASS_CLK>;
clock-names = "iface";
#clock-cells = <1>;
......
Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml
View file @ 7171a8da
......@@ -22,6 +22,8 @@ properties:
clock-names: true
reg: true
compatible:
enum:
- qcom,sc7280-lpassaoncc
......@@ -38,8 +40,14 @@ properties:
'#power-domain-cells':
const: 1
reg:
maxItems: 1
'#reset-cells':
const: 1
qcom,adsp-pil-mode:
description:
Indicates if the LPASS would be brought out of reset using
peripheral loader.
type: boolean
required:
- compatible
......@@ -69,6 +77,11 @@ allOf:
items:
- const: bi_tcxo
- const: lpass_aon_cc_main_rcg_clk_src
reg:
items:
- description: lpass core cc register
- description: lpass audio csr register
- if:
properties:
compatible:
......@@ -90,6 +103,8 @@ allOf:
- const: bi_tcxo_ao
- const: iface
reg:
maxItems: 1
- if:
properties:
compatible:
......@@ -108,6 +123,8 @@ allOf:
items:
- const: bi_tcxo
reg:
maxItems: 1
examples:
- |
#include <dt-bindings/clock/qcom,rpmh.h>
......@@ -116,13 +133,15 @@ examples:
#include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
lpass_audiocc: clock-controller@3300000 {
compatible = "qcom,sc7280-lpassaudiocc";
reg = <0x3300000 0x30000>;
reg = <0x3300000 0x30000>,
<0x32a9000 0x1000>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&lpass_aon LPASS_AON_CC_MAIN_RCG_CLK_SRC>;
clock-names = "bi_tcxo", "lpass_aon_cc_main_rcg_clk_src";
power-domains = <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
#clock-cells = <1>;
#power-domain-cells = <1>;
#reset-cells = <1>;
};
- |
......@@ -165,6 +184,7 @@ examples:
clocks = <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>,
<&lpasscore LPASS_CORE_CC_CORE_CLK>;
clock-names = "bi_tcxo", "bi_tcxo_ao","iface";
qcom,adsp-pil-mode;
#clock-cells = <1>;
#power-domain-cells = <1>;
};
......
Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml
View file @ 7171a8da
......@@ -33,10 +33,13 @@ properties:
enum:
- samsung,exynos850-cmu-top
- samsung,exynos850-cmu-apm
- samsung,exynos850-cmu-aud
- samsung,exynos850-cmu-cmgp
- samsung,exynos850-cmu-core
- samsung,exynos850-cmu-dpu
- samsung,exynos850-cmu-hsi
- samsung,exynos850-cmu-is
- samsung,exynos850-cmu-mfcmscl
- samsung,exynos850-cmu-peri
clocks:
......@@ -88,6 +91,24 @@ allOf:
- const: oscclk
- const: dout_clkcmu_apm_bus
- if:
properties:
compatible:
contains:
const: samsung,exynos850-cmu-aud
then:
properties:
clocks:
items:
- description: External reference clock (26 MHz)
- description: AUD clock (from CMU_TOP)
clock-names:
items:
- const: oscclk
- const: dout_aud
- if:
properties:
compatible:
......@@ -172,6 +193,54 @@ allOf:
- const: dout_hsi_mmc_card
- const: dout_hsi_usb20drd
- if:
properties:
compatible:
contains:
const: samsung,exynos850-cmu-is
then:
properties:
clocks:
items:
- description: External reference clock (26 MHz)
- description: CMU_IS bus clock (from CMU_TOP)
- description: Image Texture Processing core clock (from CMU_TOP)
- description: Visual Recognition Accelerator clock (from CMU_TOP)
- description: Geometric Distortion Correction clock (from CMU_TOP)
clock-names:
items:
- const: oscclk
- const: dout_is_bus
- const: dout_is_itp
- const: dout_is_vra
- const: dout_is_gdc
- if:
properties:
compatible:
contains:
const: samsung,exynos850-cmu-mfcmscl
then:
properties:
clocks:
items:
- description: External reference clock (26 MHz)
- description: Multi-Format Codec clock (from CMU_TOP)
- description: Memory to Memory Scaler clock (from CMU_TOP)
- description: Multi-Channel Scaler clock (from CMU_TOP)
- description: JPEG codec clock (from CMU_TOP)
clock-names:
items:
- const: oscclk
- const: dout_mfcmscl_mfc
- const: dout_mfcmscl_m2m
- const: dout_mfcmscl_mcsc
- const: dout_mfcmscl_jpeg
- if:
properties:
compatible:
......
Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml
View file @ 7171a8da
......@@ -35,6 +35,8 @@ properties:
- samsung,exynosautov9-cmu-top
- samsung,exynosautov9-cmu-busmc
- samsung,exynosautov9-cmu-core
- samsung,exynosautov9-cmu-fsys0
- samsung,exynosautov9-cmu-fsys1
- samsung,exynosautov9-cmu-fsys2
- samsung,exynosautov9-cmu-peric0
- samsung,exynosautov9-cmu-peric1
......@@ -107,6 +109,48 @@ allOf:
- const: oscclk
- const: dout_clkcmu_core_bus
- if:
properties:
compatible:
contains:
const: samsung,exynosautov9-cmu-fsys0
then:
properties:
clocks:
items:
- description: External reference clock (26 MHz)
- description: CMU_FSYS0 bus clock (from CMU_TOP)
- description: CMU_FSYS0 pcie clock (from CMU_TOP)
clock-names:
items:
- const: oscclk
- const: dout_clkcmu_fsys0_bus
- const: dout_clkcmu_fsys0_pcie
- if:
properties:
compatible:
contains:
const: samsung,exynosautov9-cmu-fsys1
then:
properties:
clocks:
items:
- description: External reference clock (26 MHz)
- description: CMU_FSYS1 bus clock (from CMU_TOP)
- description: CMU_FSYS1 mmc card clock (from CMU_TOP)
- description: CMU_FSYS1 usb clock (from CMU_TOP)
clock-names:
items:
- const: oscclk
- const: dout_clkcmu_fsys1_bus
- const: dout_clkcmu_fsys1_mmc_card
- const: dout_clkcmu_fsys1_usbdrd
- if:
properties:
compatible:
......
Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml
View file @ 7171a8da
......@@ -18,6 +18,13 @@ properties:
oneOf:
- items:
- enum:
- qcom,msm8998-tcsr
- qcom,qcs404-tcsr
- qcom,sc7180-tcsr
- qcom,sc7280-tcsr
- qcom,sdm630-tcsr
- qcom,sdm845-tcsr
- qcom,sm8150-tcsr
- qcom,tcsr-apq8064
- qcom,tcsr-apq8084
- qcom,tcsr-ipq8064
......@@ -27,6 +34,7 @@ properties:
- qcom,tcsr-msm8953
- qcom,tcsr-msm8960
- qcom,tcsr-msm8974
- qcom,tcsr-msm8996
- const: syscon
- items:
- const: qcom,tcsr-ipq6018
......
Documentation/devicetree/bindings/net/nvidia,tegra234-mgbe.yaml 0 → 100644
View file @ 7171a8da
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/nvidia,tegra234-mgbe.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Tegra234 MGBE Multi-Gigabit Ethernet Controller
maintainers:
- Thierry Reding <treding@nvidia.com>
- Jon Hunter <jonathanh@nvidia.com>
properties:
compatible:
const: nvidia,tegra234-mgbe
reg:
maxItems: 3
reg-names:
items:
- const: hypervisor
- const: mac
- const: xpcs
interrupts:
minItems: 1
maxItems: 3
interrupt-names:
minItems: 1
items:
- const: common
- const: macsec-ns
- const: macsec
clocks:
maxItems: 12
clock-names:
items:
- const: mgbe
- const: mac
- const: mac-divider
- const: ptp-ref
- const: rx-input-m
- const: rx-input
- const: tx
- const: eee-pcs
- const: rx-pcs-input
- const: rx-pcs-m
- const: rx-pcs
- const: tx-pcs
resets:
maxItems: 2
reset-names:
items:
- const: mac
- const: pcs
interconnects:
items:
- description: memory read client
- description: memory write client
interconnect-names:
items:
- const: dma-mem
- const: write
iommus:
maxItems: 1
power-domains:
maxItems: 1
phy-handle: true
phy-mode:
contains:
enum:
- usxgmii
- 10gbase-kr
mdio:
$ref: mdio.yaml#
unevaluatedProperties: false
description:
Optional node for embedded MDIO controller.
required:
- compatible
- reg
- interrupts
- interrupt-names
- clocks
- clock-names
- resets
- reset-names
- power-domains
- phy-handle
- phy-mode
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/tegra234-clock.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/memory/tegra234-mc.h>
#include <dt-bindings/power/tegra234-powergate.h>
#include <dt-bindings/reset/tegra234-reset.h>
ethernet@6800000 {
compatible = "nvidia,tegra234-mgbe";
reg = <0x06800000 0x10000>,
<0x06810000 0x10000>,
<0x068a0000 0x10000>;
reg-names = "hypervisor", "mac", "xpcs";
interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "common";
clocks = <&bpmp TEGRA234_CLK_MGBE0_APP>,
<&bpmp TEGRA234_CLK_MGBE0_MAC>,
<&bpmp TEGRA234_CLK_MGBE0_MAC_DIVIDER>,
<&bpmp TEGRA234_CLK_MGBE0_PTP_REF>,
<&bpmp TEGRA234_CLK_MGBE0_RX_INPUT_M>,
<&bpmp TEGRA234_CLK_MGBE0_RX_INPUT>,
<&bpmp TEGRA234_CLK_MGBE0_TX>,
<&bpmp TEGRA234_CLK_MGBE0_EEE_PCS>,
<&bpmp TEGRA234_CLK_MGBE0_RX_PCS_INPUT>,
<&bpmp TEGRA234_CLK_MGBE0_RX_PCS_M>,
<&bpmp TEGRA234_CLK_MGBE0_RX_PCS>,
<&bpmp TEGRA234_CLK_MGBE0_TX_PCS>;
clock-names = "mgbe", "mac", "mac-divider", "ptp-ref", "rx-input-m",
"rx-input", "tx", "eee-pcs", "rx-pcs-input", "rx-pcs-m",
"rx-pcs", "tx-pcs";
resets = <&bpmp TEGRA234_RESET_MGBE0_MAC>,
<&bpmp TEGRA234_RESET_MGBE0_PCS>;
reset-names = "mac", "pcs";
interconnects = <&mc TEGRA234_MEMORY_CLIENT_MGBEARD &emc>,
<&mc TEGRA234_MEMORY_CLIENT_MGBEAWR &emc>;
interconnect-names = "dma-mem", "write";
iommus = <&smmu_niso0 TEGRA234_SID_MGBE>;
power-domains = <&bpmp TEGRA234_POWER_DOMAIN_MGBEA>;
phy-handle = <&mgbe0_phy>;
phy-mode = "usxgmii";
mdio {
#address-cells = <1>;
#size-cells = <0>;
mgbe0_phy: phy@0 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0x0>;
#phy-cells = <0>;
};
};
};
Documentation/devicetree/bindings/pci/qcom,pcie.yaml
View file @ 7171a8da
......@@ -54,11 +54,11 @@ properties:
# Platform constraints are described later.
clocks:
minItems: 3
maxItems: 12
maxItems: 13
clock-names:
minItems: 3
maxItems: 12
maxItems: 13
resets:
minItems: 1
......@@ -424,8 +424,8 @@ allOf:
then:
properties:
clocks:
minItems: 11
maxItems: 11
minItems: 13
maxItems: 13
clock-names:
items:
- const: pipe # PIPE clock
......@@ -439,6 +439,8 @@ allOf:
- const: slave_q2a # Slave Q2A clock
- const: tbu # PCIe TBU clock
- const: ddrss_sf_tbu # PCIe SF TBU clock
- const: aggre0 # Aggre NoC PCIe CENTER SF AXI clock
- const: aggre1 # Aggre NoC PCIe1 AXI clock
resets:
maxItems: 1
reset-names:
......
Documentation/devicetree/bindings/serial/samsung_uart.yaml
View file @ 7171a8da
......@@ -17,7 +17,10 @@ description: |+
properties:
compatible:
items:
oneOf:
- items:
- const: samsung,exynosautov9-uart
- const: samsung,exynos850-uart
- enum:
- apple,s5l-uart
- axis,artpec8-uart
......
Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml
View file @ 7171a8da
......@@ -20,7 +20,7 @@ description:
properties:
compatible:
enum:
- renesas,r9a07g043-sysc # RZ/G2UL
- renesas,r9a07g043-sysc # RZ/G2UL and RZ/Five
- renesas,r9a07g044-sysc # RZ/G2{L,LC}
- renesas,r9a07g054-sysc # RZ/V2L
......@@ -44,8 +44,6 @@ properties:
required:
- compatible
- reg
- interrupts
- interrupt-names
additionalProperties: false
......
Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml
View file @ 7171a8da
......@@ -34,6 +34,16 @@ properties:
clocks:
maxItems: 1
dmas:
items:
- description: TX DMA Channel
- description: RX DMA Channel
dma-names:
items:
- const: tx
- const: rx
atmel,fifo-size:
$ref: /schemas/types.yaml#/definitions/uint32
description: |
......
Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml
View file @ 7171a8da
......@@ -24,32 +24,31 @@ properties:
compatible:
oneOf:
- const: allwinner,sun4i-a10-sram-controller
- enum:
- allwinner,sun4i-a10-sram-controller
- allwinner,sun50i-a64-sram-controller
deprecated: true
- const: allwinner,sun4i-a10-system-control
- const: allwinner,sun5i-a13-system-control
- enum:
- allwinner,sun4i-a10-system-control
- allwinner,sun5i-a13-system-control
- allwinner,sun8i-a23-system-control
- allwinner,sun8i-h3-system-control
- allwinner,sun20i-d1-system-control
- allwinner,sun50i-a64-system-control
- allwinner,sun50i-h5-system-control
- allwinner,sun50i-h616-system-control
- items:
- const: allwinner,sun7i-a20-system-control
- enum:
- allwinner,suniv-f1c100s-system-control
- allwinner,sun7i-a20-system-control
- allwinner,sun8i-r40-system-control
- const: allwinner,sun4i-a10-system-control
- const: allwinner,sun8i-a23-system-control
- const: allwinner,sun8i-h3-system-control
- items:
- const: allwinner,sun8i-v3s-system-control
- const: allwinner,sun8i-h3-system-control
- items:
- const: allwinner,sun8i-r40-system-control
- const: allwinner,sun4i-a10-system-control
- const: allwinner,sun50i-a64-sram-controller
deprecated: true
- const: allwinner,sun50i-a64-system-control
- const: allwinner,sun50i-h5-system-control
- items:
- const: allwinner,sun50i-h6-system-control
- const: allwinner,sun50i-a64-system-control
- items:
- const: allwinner,suniv-f1c100s-system-control
- const: allwinner,sun4i-a10-system-control
- const: allwinner,sun50i-h616-system-control
reg:
maxItems: 1
......@@ -76,43 +75,26 @@ patternProperties:
- const: allwinner,sun4i-a10-sram-d
- const: allwinner,sun50i-a64-sram-c
- items:
- const: allwinner,sun5i-a13-sram-a3-a4
- const: allwinner,sun4i-a10-sram-a3-a4
- items:
- const: allwinner,sun7i-a20-sram-a3-a4
- enum:
- allwinner,sun5i-a13-sram-a3-a4
- allwinner,sun7i-a20-sram-a3-a4
- const: allwinner,sun4i-a10-sram-a3-a4
- items:
- const: allwinner,sun5i-a13-sram-c1
- const: allwinner,sun4i-a10-sram-c1
- items:
- const: allwinner,sun7i-a20-sram-c1
- const: allwinner,sun4i-a10-sram-c1
- items:
- const: allwinner,sun8i-a23-sram-c1
- const: allwinner,sun4i-a10-sram-c1
- items:
- const: allwinner,sun8i-h3-sram-c1
- enum:
- allwinner,sun5i-a13-sram-c1
- allwinner,sun7i-a20-sram-c1
- allwinner,sun8i-a23-sram-c1
- allwinner,sun8i-h3-sram-c1
- allwinner,sun8i-r40-sram-c1
- allwinner,sun50i-a64-sram-c1
- allwinner,sun50i-h5-sram-c1
- allwinner,sun50i-h6-sram-c1
- const: allwinner,sun4i-a10-sram-c1
- items:
- const: allwinner,sun8i-r40-sram-c1
- const: allwinner,sun4i-a10-sram-c1
- items:
- const: allwinner,sun50i-a64-sram-c1
- const: allwinner,sun4i-a10-sram-c1
- items:
- const: allwinner,sun50i-h5-sram-c1
- const: allwinner,sun4i-a10-sram-c1
- items:
- const: allwinner,sun50i-h6-sram-c1
- const: allwinner,sun4i-a10-sram-c1
- items:
- const: allwinner,sun5i-a13-sram-d
- const: allwinner,sun4i-a10-sram-d
- items:
- const: allwinner,sun7i-a20-sram-d
- const: allwinner,sun4i-a10-sram-d
- items:
- const: allwinner,suniv-f1c100s-sram-d
- enum:
- allwinner,suniv-f1c100s-sram-d
- allwinner,sun5i-a13-sram-d
- allwinner,sun7i-a20-sram-d
- const: allwinner,sun4i-a10-sram-d
- items:
- const: allwinner,sun50i-h6-sram-c
......
Documentation/devicetree/bindings/vendor-prefixes.yaml
View file @ 7171a8da
......@@ -105,6 +105,8 @@ patternProperties:
description: AMS-Taos Inc.
"^analogix,.*":
description: Analogix Semiconductor, Inc.
"^anbernic,.*":
description: Anbernic
"^andestech,.*":
description: Andes Technology Corporation
"^anvo,.*":
......@@ -787,6 +789,8 @@ patternProperties:
description: Cisco Meraki, LLC
"^merrii,.*":
description: Merrii Technology Co., Ltd.
"^methode,.*":
description: Methode Electronics, Inc.
"^micrel,.*":
description: Micrel Inc.
"^microchip,.*":
......@@ -927,6 +931,8 @@ patternProperties:
description: On Tat Industrial Company
"^opalkelly,.*":
description: Opal Kelly Incorporated
"^openailab,.*":
description: openailab.com
"^opencores,.*":
description: OpenCores.org
"^openembed,.*":
......
MAINTAINERS
View file @ 7171a8da
......@@ -2689,7 +2689,7 @@ F: arch/arm/boot/dts/rtd*
F: arch/arm/mach-realtek/
F: arch/arm64/boot/dts/realtek/
ARM/RENESAS ARM64 ARCHITECTURE
ARM/RENESAS ARCHITECTURE
M: Geert Uytterhoeven <geert+renesas@glider.be>
M: Magnus Damm <magnus.damm@gmail.com>
L: linux-renesas-soc@vger.kernel.org
......@@ -2700,6 +2700,16 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git nex
F: Documentation/devicetree/bindings/arm/renesas.yaml
F: Documentation/devicetree/bindings/hwinfo/renesas,prr.yaml
F: Documentation/devicetree/bindings/soc/renesas/
F: arch/arm/boot/dts/emev2*
F: arch/arm/boot/dts/gr-peach*
F: arch/arm/boot/dts/iwg20d-q7*
F: arch/arm/boot/dts/r7s*
F: arch/arm/boot/dts/r8a*
F: arch/arm/boot/dts/r9a*
F: arch/arm/boot/dts/sh*
F: arch/arm/configs/shmobile_defconfig
F: arch/arm/include/debug/renesas-scif.S
F: arch/arm/mach-shmobile/
F: arch/arm64/boot/dts/renesas/
F: drivers/soc/renesas/
F: include/linux/soc/renesas/
......@@ -2810,29 +2820,6 @@ L: linux-media@vger.kernel.org
S: Maintained
F: drivers/media/platform/samsung/s5p-mfc/
ARM/SHMOBILE ARM ARCHITECTURE
M: Geert Uytterhoeven <geert+renesas@glider.be>
M: Magnus Damm <magnus.damm@gmail.com>
L: linux-renesas-soc@vger.kernel.org
S: Supported
Q: http://patchwork.kernel.org/project/linux-renesas-soc/list/
C: irc://irc.libera.chat/renesas-soc
T: git git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git next
F: Documentation/devicetree/bindings/arm/renesas.yaml
F: Documentation/devicetree/bindings/soc/renesas/
F: arch/arm/boot/dts/emev2*
F: arch/arm/boot/dts/gr-peach*
F: arch/arm/boot/dts/iwg20d-q7*
F: arch/arm/boot/dts/r7s*
F: arch/arm/boot/dts/r8a*
F: arch/arm/boot/dts/r9a*
F: arch/arm/boot/dts/sh*
F: arch/arm/configs/shmobile_defconfig
F: arch/arm/include/debug/renesas-scif.S
F: arch/arm/mach-shmobile/
F: drivers/soc/renesas/
F: include/linux/soc/renesas/
ARM/SOCFPGA ARCHITECTURE
M: Dinh Nguyen <dinguyen@kernel.org>
S: Maintained
......
arch/arm/boot/dts/Makefile
View file @ 7171a8da
......@@ -61,6 +61,7 @@ dtb-$(CONFIG_SOC_SAM_V7) += \
at91-sama5d2_icp.dtb \
at91-sama5d2_ptc_ek.dtb \
at91-sama5d2_xplained.dtb \
at91-sama5d3_eds.dtb \
at91-sama5d3_ksz9477_evb.dtb \
at91-sama5d3_xplained.dtb \
at91-dvk_som60.dtb \
......@@ -706,8 +707,8 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
imx6ul-geam.dtb \
imx6ul-isiot-emmc.dtb \
imx6ul-isiot-nand.dtb \
imx6ul-kontron-n6310-s.dtb \
imx6ul-kontron-n6310-s-43.dtb \
imx6ul-kontron-bl.dtb \
imx6ul-kontron-bl-43.dtb \
imx6ul-liteboard.dtb \
imx6ul-tqma6ul1-mba6ulx.dtb \
imx6ul-tqma6ul2-mba6ulx.dtb \
......@@ -736,6 +737,7 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
imx6ull-colibri-wifi-iris.dtb \
imx6ull-colibri-wifi-iris-v2.dtb \
imx6ull-jozacp.dtb \
imx6ull-kontron-bl.dtb \
imx6ull-myir-mys-6ulx-eval.dtb \
imx6ull-opos6uldev.dtb \
imx6ull-phytec-segin-ff-rdk-nand.dtb \
......@@ -788,6 +790,7 @@ dtb-$(CONFIG_SOC_IMXRT) += \
dtb-$(CONFIG_SOC_LAN966) += \
lan966x-kontron-kswitch-d10-mmt-6g-2gs.dtb \
lan966x-kontron-kswitch-d10-mmt-8g.dtb \
lan966x-pcb8290.dtb \
lan966x-pcb8291.dtb \
lan966x-pcb8309.dtb
dtb-$(CONFIG_SOC_LS1021A) += \
......@@ -1047,6 +1050,9 @@ dtb-$(CONFIG_ARCH_QCOM) += \
qcom-ipq8064-rb3011.dtb \
qcom-msm8226-samsung-s3ve3g.dtb \
qcom-msm8660-surf.dtb \
qcom-msm8916-samsung-e5.dtb \
qcom-msm8916-samsung-e7.dtb \
qcom-msm8916-samsung-grandmax.dtb \
qcom-msm8916-samsung-serranove.dtb \
qcom-msm8960-cdp.dtb \
qcom-msm8974-lge-nexus5-hammerhead.dtb \
......@@ -1574,8 +1580,10 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-ast2500-evb.dtb \
aspeed-ast2600-evb-a1.dtb \
aspeed-ast2600-evb.dtb \
aspeed-bmc-amd-daytonax.dtb \
aspeed-bmc-amd-ethanolx.dtb \
aspeed-bmc-ampere-mtjade.dtb \
aspeed-bmc-ampere-mtmitchell.dtb \
aspeed-bmc-arm-stardragon4800-rep2.dtb \
aspeed-bmc-asrock-e3c246d4i.dtb \
aspeed-bmc-asrock-romed8hm3.dtb \
......
arch/arm/boot/dts/am335x-baltos-ir2110.dts
View file @ 7171a8da
......@@ -81,3 +81,147 @@ &mmc1 {
pinctrl-0 = <&mmc1_pins>;
cd-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
};
&gpio0 {
gpio-line-names =
"MDIO",
"MDC",
"NC",
"NC",
"I2C1_SDA",
"I2C1_SCL",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"UART1_CTSN",
"UART1_RTSN",
"UART1_RX",
"UART1_TX",
"onrisc:blue:wlan",
"onrisc:green:app",
"USB0_DRVVBUS",
"ETH2_INT",
"NC",
"RMII1_TXD1",
"MMC1_DAT0",
"MMC1_DAT1",
"NC",
"NC",
"MMC1_DAT2",
"MMC1_DAT3",
"RMII1_TXD0",
"NC",
"GPMC_WAIT0",
"GPMC_WP_N";
};
&gpio1 {
gpio-line-names =
"GPMC_AD0",
"GPMC_AD1",
"GPMC_AD2",
"GPMC_AD3",
"GPMC_AD4",
"GPMC_AD5",
"GPMC_AD6",
"GPMC_AD7",
"NC",
"NC",
"CONSOLE_RX",
"CONSOLE_TX",
"NC",
"NC",
"NC",
"SD_CD",
"RGMII2_TCTL",
"RGMII2_RCTL",
"RGMII2_TD3",
"RGMII2_TD2",
"RGMII2_TD1",
"RGMII2_TD0",
"RGMII2_TCLK",
"RGMII2_RCLK",
"RGMII2_RD3",
"RGMII2_RD2",
"RGMII2_RD1",
"RGMII2_RD0",
"PMIC_INT1",
"GPMC_CSN0_Flash",
"MMC1_CLK",
"MMC1_CMD";
};
&gpio2 {
gpio-line-names =
"GPMC_CSN3_BUS",
"GPMC_CLK",
"GPMC_ADVN_ALE",
"GPMC_OEN_RE_N",
"GPMC_WE_N",
"GPMC_BEN0_CLE",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"SW2_0",
"SW2_1",
"RMII1_RXD1",
"RMII1_RXD0",
"UART1_DTR",
"UART1_DSR",
"UART1_DCD",
"UART1_RI",
"MMC0_DAT3",
"MMC0_DAT2",
"MMC0_DAT1",
"MMC0_DAT0",
"MMC0_CLK",
"MMC0_CMD";
};
&gpio3 {
gpio-line-names =
"onrisc:red:power",
"RMII1_CRS_DV",
"RMII1_RXER",
"RMII1_TXEN",
"NC",
"NC",
"NC",
"WLAN_IRQ",
"WLAN_EN",
"SW2_2",
"SW2_3",
"NC",
"NC",
"NC",
"ModeA0",
"ModeA1",
"ModeA2",
"ModeA3",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC";
};
arch/arm/boot/dts/am335x-baltos-ir3220.dts
View file @ 7171a8da
......@@ -91,6 +91,10 @@ tca6416: gpio@20 {
interrupts = <20 IRQ_TYPE_EDGE_RISING>;
pinctrl-names = "default";
pinctrl-0 = <&tca6416_pins>;
gpio-line-names = "GP_IN0", "GP_IN1", "GP_IN2", "GP_IN3",
"GP_OUT0", "GP_OUT1", "GP_OUT2", "GP_OUT3",
"ModeA0", "ModeA1", "ModeA2", "ModeA3",
"ModeB0", "ModeB1", "ModeB2", "ModeB3";
};
};
......@@ -123,3 +127,147 @@ &mmc1 {
pinctrl-0 = <&mmc1_pins>;
cd-gpios = <&gpio2 18 GPIO_ACTIVE_LOW>;
};
&gpio0 {
gpio-line-names =
"MDIO",
"MDC",
"UART2_RX",
"UART2_TX",
"I2C1_SDA",
"I2C1_SCL",
"WLAN_BTN",
"W_DISABLE",
"NC",
"NC",
"NC",
"NC",
"UART1_CTSN",
"UART1_RTSN",
"UART1_RX",
"UART1_TX",
"onrisc:blue:wlan",
"onrisc:green:app",
"USB0_DRVVBUS",
"ETH2_INT",
"TCA6416_INT",
"RMII1_TXD1",
"MMC1_DAT0",
"MMC1_DAT1",
"NC",
"NC",
"MMC1_DAT2",
"MMC1_DAT3",
"RMII1_TXD0",
"NC",
"GPMC_WAIT0",
"GPMC_WP_N";
};
&gpio1 {
gpio-line-names =
"GPMC_AD0",
"GPMC_AD1",
"GPMC_AD2",
"GPMC_AD3",
"GPMC_AD4",
"GPMC_AD5",
"GPMC_AD6",
"GPMC_AD7",
"NC",
"NC",
"CONSOLE_RX",
"CONSOLE_TX",
"UART2_DTR",
"UART2_DSR",
"UART2_DCD",
"UART2_RI",
"RGMII2_TCTL",
"RGMII2_RCTL",
"RGMII2_TD3",
"RGMII2_TD2",
"RGMII2_TD1",
"RGMII2_TD0",
"RGMII2_TCLK",
"RGMII2_RCLK",
"RGMII2_RD3",
"RGMII2_RD2",
"RGMII2_RD1",
"RGMII2_RD0",
"PMIC_INT1",
"GPMC_CSN0_Flash",
"MMC1_CLK",
"MMC1_CMD";
};
&gpio2 {
gpio-line-names =
"GPMC_CSN3_BUS",
"GPMC_CLK",
"GPMC_ADVN_ALE",
"GPMC_OEN_RE_N",
"GPMC_WE_N",
"GPMC_BEN0_CLE",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"SD_CD",
"SD_WP",
"RMII1_RXD1",
"RMII1_RXD0",
"UART1_DTR",
"UART1_DSR",
"UART1_DCD",
"UART1_RI",
"MMC0_DAT3",
"MMC0_DAT2",
"MMC0_DAT1",
"MMC0_DAT0",
"MMC0_CLK",
"MMC0_CMD";
};
&gpio3 {
gpio-line-names =
"onrisc:red:power",
"RMII1_CRS_DV",
"RMII1_RXER",
"RMII1_TXEN",
"3G_PWR_EN",
"UART2_CTSN",
"UART2_RTSN",
"WLAN_IRQ",
"WLAN_EN",
"NC",
"NC",
"NC",
"NC",
"USB1_DRVVBUS",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC";
};
arch/arm/boot/dts/am335x-baltos-ir5221.dts
View file @ 7171a8da
......@@ -99,6 +99,10 @@ tca6416: gpio@20 {
interrupts = <20 IRQ_TYPE_EDGE_RISING>;
pinctrl-names = "default";
pinctrl-0 = <&tca6416_pins>;
gpio-line-names = "GP_IN0", "GP_IN1", "GP_IN2", "GP_IN3",
"GP_OUT0", "GP_OUT1", "GP_OUT2", "GP_OUT3",
"ModeA0", "ModeA1", "ModeA2", "ModeA3",
"ModeB0", "ModeB1", "ModeB2", "ModeB3";
};
};
......@@ -147,3 +151,147 @@ &mmc1 {
pinctrl-0 = <&mmc1_pins>;
cd-gpios = <&gpio2 18 GPIO_ACTIVE_LOW>;
};
&gpio0 {
gpio-line-names =
"MDIO",
"MDC",
"UART2_RX",
"UART2_TX",
"I2C1_SDA",
"I2C1_SCL",
"WLAN_BTN",
"W_DISABLE",
"NC",
"NC",
"NC",
"NC",
"UART1_CTSN",
"UART1_RTSN",
"UART1_RX",
"UART1_TX",
"onrisc:blue:wlan",
"onrisc:green:app",
"USB0_DRVVBUS",
"ETH2_INT",
"TCA6416_INT",
"RMII1_TXD1",
"MMC1_DAT0",
"MMC1_DAT1",
"NC",
"NC",
"MMC1_DAT2",
"MMC1_DAT3",
"RMII1_TXD0",
"NC",
"GPMC_WAIT0",
"GPMC_WP_N";
};
&gpio1 {
gpio-line-names =
"GPMC_AD0",
"GPMC_AD1",
"GPMC_AD2",
"GPMC_AD3",
"GPMC_AD4",
"GPMC_AD5",
"GPMC_AD6",
"GPMC_AD7",
"DCAN1_TX",
"DCAN1_RX",
"CONSOLE_RX",
"CONSOLE_TX",
"UART2_DTR",
"UART2_DSR",
"UART2_DCD",
"UART2_RI",
"RGMII2_TCTL",
"RGMII2_RCTL",
"RGMII2_TD3",
"RGMII2_TD2",
"RGMII2_TD1",
"RGMII2_TD0",
"RGMII2_TCLK",
"RGMII2_RCLK",
"RGMII2_RD3",
"RGMII2_RD2",
"RGMII2_RD1",
"RGMII2_RD0",
"PMIC_INT1",
"GPMC_CSN0_Flash",
"MMC1_CLK",
"MMC1_CMD";
};
&gpio2 {
gpio-line-names =
"GPMC_CSN3_BUS",
"GPMC_CLK",
"GPMC_ADVN_ALE",
"GPMC_OEN_RE_N",
"GPMC_WE_N",
"GPMC_BEN0_CLE",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"SD_CD",
"SD_WP",
"RMII1_RXD1",
"RMII1_RXD0",
"UART1_DTR",
"UART1_DSR",
"UART1_DCD",
"UART1_RI",
"MMC0_DAT3",
"MMC0_DAT2",
"MMC0_DAT1",
"MMC0_DAT0",
"MMC0_CLK",
"MMC0_CMD";
};
&gpio3 {
gpio-line-names =
"onrisc:red:power",
"RMII1_CRS_DV",
"RMII1_RXER",
"RMII1_TXEN",
"3G_PWR_EN",
"UART2_CTSN",
"UART2_RTSN",
"WLAN_IRQ",
"WLAN_EN",
"NC",
"NC",
"NC",
"NC",
"USB1_DRVVBUS",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC";
};
arch/arm/boot/dts/am335x-baltos.dtsi
View file @ 7171a8da
......@@ -197,7 +197,7 @@ nand@0,0 {
rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
nand-bus-width = <8>;
ti,nand-ecc-opt = "bch8";
ti,nand-xfer-type = "polled";
ti,nand-xfer-type = "prefetch-dma";
gpmc,device-nand = "true";
gpmc,device-width = <1>;
......
arch/arm/boot/dts/am335x-netcan-plus-1xx.dts
View file @ 7171a8da
......@@ -85,3 +85,147 @@ &dcan1 {
status = "okay";
};
&gpio0 {
gpio-line-names =
"MDIO",
"MDC",
"NC",
"NC",
"I2C1_SDA",
"I2C1_SCL",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"can_data",
"can_error",
"onrisc:blue:wlan",
"onrisc:green:app",
"USB0_DRVVBUS",
"ETH2_INT",
"NC",
"NC",
"MMC1_DAT0",
"MMC1_DAT1",
"NC",
"NC",
"MMC1_DAT2",
"MMC1_DAT3",
"NC",
"NC",
"GPMC_WAIT0",
"GPMC_WP_N";
};
&gpio1 {
gpio-line-names =
"GPMC_AD0",
"GPMC_AD1",
"GPMC_AD2",
"GPMC_AD3",
"GPMC_AD4",
"GPMC_AD5",
"GPMC_AD6",
"GPMC_AD7",
"DCAN1_TX",
"DCAN1_RX",
"CONSOLE_RX",
"CONSOLE_TX",
"NC",
"NC",
"NC",
"NC",
"RGMII2_TCTL",
"RGMII2_RCTL",
"RGMII2_TD3",
"RGMII2_TD2",
"RGMII2_TD1",
"RGMII2_TD0",
"RGMII2_TCLK",
"RGMII2_RCLK",
"RGMII2_RD3",
"RGMII2_RD2",
"RGMII2_RD1",
"RGMII2_RD0",
"PMIC_INT1",
"GPMC_CSN0_Flash",
"MMC1_CLK",
"MMC1_CMD";
};
&gpio2 {
gpio-line-names =
"GPMC_CSN3_BUS",
"GPMC_CLK",
"GPMC_ADVN_ALE",
"GPMC_OEN_RE_N",
"GPMC_WE_N",
"GPMC_BEN0_CLE",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"SW2_0",
"SW2_1",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"MMC0_DAT3",
"MMC0_DAT2",
"MMC0_DAT1",
"MMC0_DAT0",
"MMC0_CLK",
"MMC0_CMD";
};
&gpio3 {
gpio-line-names =
"onrisc:red:power",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"WLAN_IRQ",
"WLAN_EN",
"SW2_2",
"SW2_3",
"NC",
"NC",
"NC",
"ModeA0",
"ModeA1",
"ModeA2",
"ModeA3",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC";
};
arch/arm/boot/dts/am335x-netcom-plus-2xx.dts
View file @ 7171a8da
......@@ -93,3 +93,147 @@ &cpsw_port2 {
ti,dual-emac-pvid = <2>;
phy-handle = <&phy1>;
};
&gpio0 {
gpio-line-names =
"MDIO",
"MDC",
"UART2_RX",
"UART2_TX",
"I2C1_SDA",
"I2C1_SCL",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"UART1_CTSN",
"UART1_RTSN",
"UART1_RX",
"UART1_TX",
"onrisc:blue:wlan",
"onrisc:green:app",
"USB0_DRVVBUS",
"ETH2_INT",
"NC",
"NC",
"MMC1_DAT0",
"MMC1_DAT1",
"NC",
"NC",
"MMC1_DAT2",
"MMC1_DAT3",
"NC",
"NC",
"GPMC_WAIT0",
"GPMC_WP_N";
};
&gpio1 {
gpio-line-names =
"GPMC_AD0",
"GPMC_AD1",
"GPMC_AD2",
"GPMC_AD3",
"GPMC_AD4",
"GPMC_AD5",
"GPMC_AD6",
"GPMC_AD7",
"NC",
"NC",
"CONSOLE_RX",
"CONSOLE_TX",
"UART2_DTR",
"UART2_DSR",
"UART2_DCD",
"UART2_RI",
"RGMII2_TCTL",
"RGMII2_RCTL",
"RGMII2_TD3",
"RGMII2_TD2",
"RGMII2_TD1",
"RGMII2_TD0",
"RGMII2_TCLK",
"RGMII2_RCLK",
"RGMII2_RD3",
"RGMII2_RD2",
"RGMII2_RD1",
"RGMII2_RD0",
"PMIC_INT1",
"GPMC_CSN0_Flash",
"MMC1_CLK",
"MMC1_CMD";
};
&gpio2 {
gpio-line-names =
"GPMC_CSN3_BUS",
"GPMC_CLK",
"GPMC_ADVN_ALE",
"GPMC_OEN_RE_N",
"GPMC_WE_N",
"GPMC_BEN0_CLE",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"SW2_0",
"SW2_1",
"NC",
"NC",
"UART1_DTR",
"UART1_DSR",
"UART1_DCD",
"UART1_RI",
"MMC0_DAT3",
"MMC0_DAT2",
"MMC0_DAT1",
"MMC0_DAT0",
"MMC0_CLK",
"MMC0_CMD";
};
&gpio3 {
gpio-line-names =
"onrisc:red:power",
"NC",
"NC",
"NC",
"NC",
"UART2_CTSN",
"UART2_RTSN",
"WLAN_IRQ",
"WLAN_EN",
"SW2_2",
"SW2_3",
"NC",
"NC",
"NC",
"ModeA0",
"ModeA1",
"ModeA2",
"ModeA3",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC";
};
arch/arm/boot/dts/am335x-netcom-plus-8xx.dts
View file @ 7171a8da
......@@ -71,6 +71,10 @@ tca6416a: gpio@20 {
interrupts = <20 IRQ_TYPE_EDGE_RISING>;
pinctrl-names = "default";
pinctrl-0 = <&tca6416_pins>;
gpio-line-names = "GP_IN0", "GP_IN1", "GP_IN2", "GP_IN3",
"GP_IN4", "GP_IN5", "GP_IN6", "GP_IN7",
"GP_OUT0", "GP_OUT1", "GP_OUT2", "GP_OUT3",
"GP_OUT4", "GP_OUT5", "GP_OUT6", "GP_OUT7";
};
};
......@@ -86,6 +90,10 @@ tca6416b: gpio@20 {
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names = "CH1_M0", "CH1_M1", "CH1_M2", "CH1_M3",
"CH2_M0", "CH2_M1", "CH2_M2", "CH2_M3",
"CH3_M0", "CH3_M1", "CH3_M2", "CH3_M3",
"CH4_M0", "CH4_M1", "CH4_M2", "CH4_M3";
};
tca6416c: gpio@21 {
......@@ -93,6 +101,10 @@ tca6416c: gpio@21 {
reg = <0x21>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names = "CH5_M0", "CH5_M1", "CH5_M2", "CH5_M3",
"CH6_M0", "CH6_M1", "CH6_M2", "CH6_M3",
"CH7_M0", "CH7_M1", "CH7_M2", "CH7_M3",
"CH8_M0", "CH8_M1", "CH8_M2", "CH8_M3";
};
};
......@@ -113,3 +125,147 @@ &cpsw_port2 {
ti,dual-emac-pvid = <2>;
phy-handle = <&phy1>;
};
&gpio0 {
gpio-line-names =
"MDIO",
"MDC",
"NC",
"NC",
"I2C1_SDA",
"I2C1_SCL",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"I2C2_SDA",
"I2C2_SCL",
"NC",
"NC",
"onrisc:blue:wlan",
"onrisc:green:app",
"USB0_DRVVBUS",
"ETH2_INT",
"NC",
"NC",
"MMC1_DAT0",
"MMC1_DAT1",
"NC",
"NC",
"MMC1_DAT2",
"MMC1_DAT3",
"NC",
"NC",
"GPMC_WAIT0",
"GPMC_WP_N";
};
&gpio1 {
gpio-line-names =
"GPMC_AD0",
"GPMC_AD1",
"GPMC_AD2",
"GPMC_AD3",
"GPMC_AD4",
"GPMC_AD5",
"GPMC_AD6",
"GPMC_AD7",
"NC",
"NC",
"CONSOLE_RX",
"CONSOLE_TX",
"SW2_0_alt",
"SW2_1_alt",
"SW2_2_alt",
"SW2_3_alt",
"RGMII2_TCTL",
"RGMII2_RCTL",
"RGMII2_TD3",
"RGMII2_TD2",
"RGMII2_TD1",
"RGMII2_TD0",
"RGMII2_TCLK",
"RGMII2_RCLK",
"RGMII2_RD3",
"RGMII2_RD2",
"RGMII2_RD1",
"RGMII2_RD0",
"PMIC_INT1",
"GPMC_CSN0_Flash",
"MMC1_CLK",
"MMC1_CMD";
};
&gpio2 {
gpio-line-names =
"GPMC_CSN3_BUS",
"GPMC_CLK",
"GPMC_ADVN_ALE",
"GPMC_OEN_RE_N",
"GPMC_WE_N",
"GPMC_BEN0_CLE",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"SW2_0",
"SW2_1",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"MMC0_DAT3",
"MMC0_DAT2",
"MMC0_DAT1",
"MMC0_DAT0",
"MMC0_CLK",
"MMC0_CMD";
};
&gpio3 {
gpio-line-names =
"onrisc:red:power",
"NC",
"NC",
"NC",
"3G_PWR_EN",
"NC",
"NC",
"WLAN_IRQ",
"WLAN_EN",
"SW2_2",
"SW2_3",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC";
};
arch/arm/boot/dts/armada-370.dtsi
View file @ 7171a8da
......@@ -60,16 +60,26 @@ pcie0: pcie@1,0 {
reg = <0x0800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 58>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &mpic 58>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie0_intc 0>,
<0 0 0 2 &pcie0_intc 1>,
<0 0 0 3 &pcie0_intc 2>,
<0 0 0 4 &pcie0_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 5>;
status = "disabled";
pcie0_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
pcie2: pcie@2,0 {
......@@ -78,16 +88,26 @@ pcie2: pcie@2,0 {
reg = <0x1000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 62>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
0x81000000 0 0 0x81000000 0x2 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &mpic 62>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie2_intc 0>,
<0 0 0 2 &pcie2_intc 1>,
<0 0 0 3 &pcie2_intc 2>,
<0 0 0 4 &pcie2_intc 3>;
marvell,pcie-port = <1>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 9>;
status = "disabled";
pcie2_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
};
......
arch/arm/boot/dts/armada-375.dtsi
View file @ 7171a8da
......@@ -568,16 +568,26 @@ pcie0: pcie@1,0 {
reg = <0x0800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie0_intc 0>,
<0 0 0 2 &pcie0_intc 1>,
<0 0 0 3 &pcie0_intc 2>,
<0 0 0 4 &pcie0_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 5>;
status = "disabled";
pcie0_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
pcie1: pcie@2,0 {
......@@ -586,16 +596,26 @@ pcie1: pcie@2,0 {
reg = <0x1000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
0x81000000 0 0 0x81000000 0x2 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie1_intc 0>,
<0 0 0 2 &pcie1_intc 1>,
<0 0 0 3 &pcie1_intc 2>,
<0 0 0 4 &pcie1_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <1>;
clocks = <&gateclk 6>;
status = "disabled";
pcie1_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
};
......
arch/arm/boot/dts/armada-380.dtsi
View file @ 7171a8da
......@@ -64,16 +64,26 @@ pcie@1,0 {
reg = <0x0800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie1_intc 0>,
<0 0 0 2 &pcie1_intc 1>,
<0 0 0 3 &pcie1_intc 2>,
<0 0 0 4 &pcie1_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 8>;
status = "disabled";
pcie1_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
/* x1 port */
......@@ -83,16 +93,26 @@ pcie@2,0 {
reg = <0x1000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
0x81000000 0 0 0x81000000 0x2 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie2_intc 0>,
<0 0 0 2 &pcie2_intc 1>,
<0 0 0 3 &pcie2_intc 2>,
<0 0 0 4 &pcie2_intc 3>;
marvell,pcie-port = <1>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 5>;
status = "disabled";
pcie2_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
/* x1 port */
......@@ -102,16 +122,26 @@ pcie@3,0 {
reg = <0x1800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
0x81000000 0 0 0x81000000 0x3 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie3_intc 0>,
<0 0 0 2 &pcie3_intc 1>,
<0 0 0 3 &pcie3_intc 2>,
<0 0 0 4 &pcie3_intc 3>;
marvell,pcie-port = <2>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 6>;
status = "disabled";
pcie3_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
};
};
......
arch/arm/boot/dts/armada-385-turris-omnia.dts
View file @ 7171a8da
......@@ -105,6 +105,33 @@ sfp: sfp {
*/
status = "disabled";
};
sound {
compatible = "simple-audio-card";
simple-audio-card,name = "SPDIF";
simple-audio-card,format = "i2s";
simple-audio-card,cpu {
sound-dai = <&audio_controller 1>;
};
simple-audio-card,codec {
sound-dai = <&spdif_out>;
};
};
spdif_out: spdif-out {
#sound-dai-cells = <0>;
compatible = "linux,spdif-dit";
};
};
&audio_controller {
/* Pin header U16, GPIO51 in SPDIFO mode */
pinctrl-0 = <&spdif_pins>;
pinctrl-names = "default";
spdif-mode;
status = "okay";
};
&bm {
......@@ -166,6 +193,7 @@ &eth2 {
buffer-manager = <&bm>;
bm,pool-long = <2>;
bm,pool-short = <3>;
label = "wan";
};
&i2c0 {
......@@ -476,7 +504,7 @@ spi0cs0_pins: spi0cs0-pins {
marvell,function = "spi0";
};
spi0cs1_pins: spi0cs1-pins {
spi0cs2_pins: spi0cs2-pins {
marvell,pins = "mpp26";
marvell,function = "spi0";
};
......@@ -511,7 +539,7 @@ partition@100000 {
};
};
/* MISO, MOSI, SCLK and CS1 are routed to pin header CN11 */
/* MISO, MOSI, SCLK and CS2 are routed to pin header CN11 */
};
&uart0 {
......
arch/arm/boot/dts/armada-388-db.dts
View file @ 7171a8da
......@@ -36,6 +36,11 @@ internal-regs {
i2c@11000 {
status = "okay";
clock-frequency = <100000>;
audio_codec: audio-codec@4a {
#sound-dai-cells = <0>;
compatible = "cirrus,cs42l51";
reg = <0x4a>;
};
};
i2c@11100 {
......@@ -99,6 +104,12 @@ sdhci@d8000 {
no-1-8-v;
};
audio-controller@e8000 {
pinctrl-0 = <&i2s_pins>;
pinctrl-names = "default";
status = "disabled";
};
usb3@f0000 {
status = "okay";
};
......@@ -128,6 +139,64 @@ pcie@2,0 {
};
};
};
sound {
compatible = "simple-audio-card";
simple-audio-card,name = "Armada 385 DB Audio";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,widgets =
"Headphone", "Out Jack",
"Line", "In Jack";
simple-audio-card,routing =
"Out Jack", "HPL",
"Out Jack", "HPR",
"AIN1L", "In Jack",
"AIN1R", "In Jack";
status = "disabled";
simple-audio-card,dai-link@0 {
format = "i2s";
cpu {
sound-dai = <&audio_controller 0>;
};
codec {
sound-dai = <&audio_codec>;
};
};
simple-audio-card,dai-link@1 {
format = "i2s";
cpu {
sound-dai = <&audio_controller 1>;
};
codec {
sound-dai = <&spdif_out>;
};
};
simple-audio-card,dai-link@2 {
format = "i2s";
cpu {
sound-dai = <&audio_controller 1>;
};
codec {
sound-dai = <&spdif_in>;
};
};
};
spdif_out: spdif-out {
#sound-dai-cells = <0>;
compatible = "linux,spdif-dit";
};
spdif_in: spdif-in {
#sound-dai-cells = <0>;
compatible = "linux,spdif-dir";
};
};
&spi0 {
......
arch/arm/boot/dts/armada-38x.dtsi
View file @ 7171a8da
......@@ -289,6 +289,18 @@ sata3_pins: sata-pins-3 {
marvell,pins = "mpp44";
marvell,function = "sata3";
};
i2s_pins: i2s-pins {
marvell,pins = "mpp48", "mpp49",
"mpp50", "mpp51",
"mpp52", "mpp53";
marvell,function = "audio";
};
spdif_pins: spdif-pins {
marvell,pins = "mpp51";
marvell,function = "audio";
};
};
gpio0: gpio@18100 {
......@@ -298,6 +310,7 @@ gpio0: gpio@18100 {
reg-names = "gpio", "pwm";
ngpios = <32>;
gpio-controller;
gpio-ranges = <&pinctrl 0 0 32>;
#gpio-cells = <2>;
#pwm-cells = <2>;
interrupt-controller;
......@@ -316,6 +329,7 @@ gpio1: gpio@18140 {
reg-names = "gpio", "pwm";
ngpios = <28>;
gpio-controller;
gpio-ranges = <&pinctrl 0 32 28>;
#gpio-cells = <2>;
#pwm-cells = <2>;
interrupt-controller;
......@@ -618,6 +632,18 @@ sdhci: sdhci@d8000 {
status = "disabled";
};
audio_controller: audio-controller@e8000 {
#sound-dai-cells = <1>;
compatible = "marvell,armada-380-audio";
reg = <0xe8000 0x4000>, <0x18410 0xc>,
<0x18204 0x4>;
reg-names = "i2s_regs", "pll_regs", "soc_ctrl";
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gateclk 0>;
clock-names = "internal";
status = "disabled";
};
usb3_0: usb3@f0000 {
compatible = "marvell,armada-380-xhci";
reg = <0xf0000 0x4000>,<0xf4000 0x4000>;
......
arch/arm/boot/dts/armada-39x.dtsi
View file @ 7171a8da
......@@ -438,16 +438,26 @@ pcie@1,0 {
reg = <0x0800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie1_intc 0>,
<0 0 0 2 &pcie1_intc 1>,
<0 0 0 3 &pcie1_intc 2>,
<0 0 0 4 &pcie1_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 8>;
status = "disabled";
pcie1_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
/* x1 port */
......@@ -457,16 +467,26 @@ pcie@2,0 {
reg = <0x1000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
0x81000000 0 0 0x81000000 0x2 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie2_intc 0>,
<0 0 0 2 &pcie2_intc 1>,
<0 0 0 3 &pcie2_intc 2>,
<0 0 0 4 &pcie2_intc 3>;
marvell,pcie-port = <1>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 5>;
status = "disabled";
pcie2_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
/* x1 port */
......@@ -476,16 +496,26 @@ pcie@3,0 {
reg = <0x1800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
0x81000000 0 0 0x81000000 0x3 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie3_intc 0>,
<0 0 0 2 &pcie3_intc 1>,
<0 0 0 3 &pcie3_intc 2>,
<0 0 0 4 &pcie3_intc 3>;
marvell,pcie-port = <2>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 6>;
status = "disabled";
pcie3_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
/*
......@@ -498,16 +528,26 @@ pcie@4,0 {
reg = <0x2000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0
0x81000000 0 0 0x81000000 0x4 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie4_intc 0>,
<0 0 0 2 &pcie4_intc 1>,
<0 0 0 3 &pcie4_intc 2>,
<0 0 0 4 &pcie4_intc 3>;
marvell,pcie-port = <3>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 7>;
status = "disabled";
pcie4_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
};
......
arch/arm/boot/dts/armada-xp-98dx3236.dtsi
View file @ 7171a8da
......@@ -76,16 +76,26 @@ pcie1: pcie@1,0 {
reg = <0x0800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 58>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &mpic 58>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie1_intc 0>,
<0 0 0 2 &pcie1_intc 1>,
<0 0 0 3 &pcie1_intc 2>,
<0 0 0 4 &pcie1_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 5>;
status = "disabled";
pcie1_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
};
......
arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
View file @ 7171a8da
......@@ -164,7 +164,7 @@ scroll-button {
};
};
spi3 {
spi-3 {
compatible = "spi-gpio";
status = "okay";
gpio-sck = <&gpio0 25 GPIO_ACTIVE_LOW>;
......
arch/arm/boot/dts/armada-xp-mv78230.dtsi
View file @ 7171a8da
......@@ -83,16 +83,26 @@ pcie1: pcie@1,0 {
reg = <0x0800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 58>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &mpic 58>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie1_intc 0>,
<0 0 0 2 &pcie1_intc 1>,
<0 0 0 3 &pcie1_intc 2>,
<0 0 0 4 &pcie1_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 5>;
status = "disabled";
pcie1_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
pcie2: pcie@2,0 {
......@@ -101,16 +111,26 @@ pcie2: pcie@2,0 {
reg = <0x1000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 59>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
0x81000000 0 0 0x81000000 0x2 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &mpic 59>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie2_intc 0>,
<0 0 0 2 &pcie2_intc 1>,
<0 0 0 3 &pcie2_intc 2>,
<0 0 0 4 &pcie2_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <1>;
clocks = <&gateclk 6>;
status = "disabled";
pcie2_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
pcie3: pcie@3,0 {
......@@ -119,16 +139,26 @@ pcie3: pcie@3,0 {
reg = <0x1800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 60>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
0x81000000 0 0 0x81000000 0x3 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &mpic 60>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie3_intc 0>,
<0 0 0 2 &pcie3_intc 1>,
<0 0 0 3 &pcie3_intc 2>,
<0 0 0 4 &pcie3_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <2>;
clocks = <&gateclk 7>;
status = "disabled";
pcie3_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
pcie4: pcie@4,0 {
......@@ -137,16 +167,26 @@ pcie4: pcie@4,0 {
reg = <0x2000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 61>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0
0x81000000 0 0 0x81000000 0x4 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &mpic 61>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie4_intc 0>,
<0 0 0 2 &pcie4_intc 1>,
<0 0 0 3 &pcie4_intc 2>,
<0 0 0 4 &pcie4_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <3>;
clocks = <&gateclk 8>;
status = "disabled";
pcie4_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
pcie5: pcie@5,0 {
......@@ -155,16 +195,26 @@ pcie5: pcie@5,0 {
reg = <0x2800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 62>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0
0x81000000 0 0 0x81000000 0x5 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &mpic 62>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie5_intc 0>,
<0 0 0 2 &pcie5_intc 1>,
<0 0 0 3 &pcie5_intc 2>,
<0 0 0 4 &pcie5_intc 3>;
marvell,pcie-port = <1>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 9>;
status = "disabled";
pcie5_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
};
......
arch/arm/boot/dts/armada-xp-mv78260.dtsi
View file @ 7171a8da
......@@ -98,16 +98,26 @@ pcie1: pcie@1,0 {
reg = <0x0800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 58>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &mpic 58>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie1_intc 0>,
<0 0 0 2 &pcie1_intc 1>,
<0 0 0 3 &pcie1_intc 2>,
<0 0 0 4 &pcie1_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 5>;
status = "disabled";
pcie1_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
pcie2: pcie@2,0 {
......@@ -116,16 +126,26 @@ pcie2: pcie@2,0 {
reg = <0x1000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 59>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
0x81000000 0 0 0x81000000 0x2 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &mpic 59>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie2_intc 0>,
<0 0 0 2 &pcie2_intc 1>,
<0 0 0 3 &pcie2_intc 2>,
<0 0 0 4 &pcie2_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <1>;
clocks = <&gateclk 6>;
status = "disabled";
pcie2_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
pcie3: pcie@3,0 {
......@@ -134,16 +154,26 @@ pcie3: pcie@3,0 {
reg = <0x1800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 60>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
0x81000000 0 0 0x81000000 0x3 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &mpic 60>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie3_intc 0>,
<0 0 0 2 &pcie3_intc 1>,
<0 0 0 3 &pcie3_intc 2>,
<0 0 0 4 &pcie3_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <2>;
clocks = <&gateclk 7>;
status = "disabled";
pcie3_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
pcie4: pcie@4,0 {
......@@ -152,16 +182,26 @@ pcie4: pcie@4,0 {
reg = <0x2000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 61>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0
0x81000000 0 0 0x81000000 0x4 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &mpic 61>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie4_intc 0>,
<0 0 0 2 &pcie4_intc 1>,
<0 0 0 3 &pcie4_intc 2>,
<0 0 0 4 &pcie4_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <3>;
clocks = <&gateclk 8>;
status = "disabled";
pcie4_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
pcie5: pcie@5,0 {
......@@ -170,16 +210,26 @@ pcie5: pcie@5,0 {
reg = <0x2800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 62>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0
0x81000000 0 0 0x81000000 0x5 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &mpic 62>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie5_intc 0>,
<0 0 0 2 &pcie5_intc 1>,
<0 0 0 3 &pcie5_intc 2>,
<0 0 0 4 &pcie5_intc 3>;
marvell,pcie-port = <1>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 9>;
status = "disabled";
pcie5_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
pcie6: pcie@6,0 {
......@@ -188,16 +238,26 @@ pcie6: pcie@6,0 {
reg = <0x3000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 63>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x6 0 1 0
0x81000000 0 0 0x81000000 0x6 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &mpic 63>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie6_intc 0>,
<0 0 0 2 &pcie6_intc 1>,
<0 0 0 3 &pcie6_intc 2>,
<0 0 0 4 &pcie6_intc 3>;
marvell,pcie-port = <1>;
marvell,pcie-lane = <1>;
clocks = <&gateclk 10>;
status = "disabled";
pcie6_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
pcie7: pcie@7,0 {
......@@ -206,16 +266,26 @@ pcie7: pcie@7,0 {
reg = <0x3800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 64>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x7 0 1 0
0x81000000 0 0 0x81000000 0x7 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &mpic 64>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie7_intc 0>,
<0 0 0 2 &pcie7_intc 1>,
<0 0 0 3 &pcie7_intc 2>,
<0 0 0 4 &pcie7_intc 3>;
marvell,pcie-port = <1>;
marvell,pcie-lane = <2>;
clocks = <&gateclk 11>;
status = "disabled";
pcie7_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
pcie8: pcie@8,0 {
......@@ -224,16 +294,26 @@ pcie8: pcie@8,0 {
reg = <0x4000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 65>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x8 0 1 0
0x81000000 0 0 0x81000000 0x8 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &mpic 65>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie8_intc 0>,
<0 0 0 2 &pcie8_intc 1>,
<0 0 0 3 &pcie8_intc 2>,
<0 0 0 4 &pcie8_intc 3>;
marvell,pcie-port = <1>;
marvell,pcie-lane = <3>;
clocks = <&gateclk 12>;
status = "disabled";
pcie8_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
pcie9: pcie@9,0 {
......@@ -242,16 +322,26 @@ pcie9: pcie@9,0 {
reg = <0x4800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 99>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0
0x81000000 0 0 0x81000000 0x9 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &mpic 99>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie9_intc 0>,
<0 0 0 2 &pcie9_intc 1>,
<0 0 0 3 &pcie9_intc 2>,
<0 0 0 4 &pcie9_intc 3>;
marvell,pcie-port = <2>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 26>;
status = "disabled";
pcie9_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
};
......
arch/arm/boot/dts/armada-xp-mv78460.dtsi
View file @ 7171a8da
......@@ -119,16 +119,26 @@ pcie1: pcie@1,0 {
reg = <0x0800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 58>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &mpic 58>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie1_intc 0>,
<0 0 0 2 &pcie1_intc 1>,
<0 0 0 3 &pcie1_intc 2>,
<0 0 0 4 &pcie1_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 5>;
status = "disabled";
pcie1_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
pcie2: pcie@2,0 {
......@@ -137,16 +147,26 @@ pcie2: pcie@2,0 {
reg = <0x1000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 59>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
0x81000000 0 0 0x81000000 0x2 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &mpic 59>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie2_intc 0>,
<0 0 0 2 &pcie2_intc 1>,
<0 0 0 3 &pcie2_intc 2>,
<0 0 0 4 &pcie2_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <1>;
clocks = <&gateclk 6>;
status = "disabled";
pcie2_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
pcie3: pcie@3,0 {
......@@ -155,16 +175,26 @@ pcie3: pcie@3,0 {
reg = <0x1800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 60>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
0x81000000 0 0 0x81000000 0x3 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &mpic 60>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie3_intc 0>,
<0 0 0 2 &pcie3_intc 1>,
<0 0 0 3 &pcie3_intc 2>,
<0 0 0 4 &pcie3_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <2>;
clocks = <&gateclk 7>;
status = "disabled";
pcie3_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
pcie4: pcie@4,0 {
......@@ -173,16 +203,26 @@ pcie4: pcie@4,0 {
reg = <0x2000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 61>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0
0x81000000 0 0 0x81000000 0x4 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &mpic 61>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie4_intc 0>,
<0 0 0 2 &pcie4_intc 1>,
<0 0 0 3 &pcie4_intc 2>,
<0 0 0 4 &pcie4_intc 3>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <3>;
clocks = <&gateclk 8>;
status = "disabled";
pcie4_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
pcie5: pcie@5,0 {
......@@ -191,16 +231,26 @@ pcie5: pcie@5,0 {
reg = <0x2800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 62>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0
0x81000000 0 0 0x81000000 0x5 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &mpic 62>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie5_intc 0>,
<0 0 0 2 &pcie5_intc 1>,
<0 0 0 3 &pcie5_intc 2>,
<0 0 0 4 &pcie5_intc 3>;
marvell,pcie-port = <1>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 9>;
status = "disabled";
pcie5_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
pcie6: pcie@6,0 {
......@@ -209,16 +259,26 @@ pcie6: pcie@6,0 {
reg = <0x3000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 63>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x6 0 1 0
0x81000000 0 0 0x81000000 0x6 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &mpic 63>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie6_intc 0>,
<0 0 0 2 &pcie6_intc 1>,
<0 0 0 3 &pcie6_intc 2>,
<0 0 0 4 &pcie6_intc 3>;
marvell,pcie-port = <1>;
marvell,pcie-lane = <1>;
clocks = <&gateclk 10>;
status = "disabled";
pcie6_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
pcie7: pcie@7,0 {
......@@ -227,16 +287,26 @@ pcie7: pcie@7,0 {
reg = <0x3800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 64>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x7 0 1 0
0x81000000 0 0 0x81000000 0x7 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &mpic 64>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie7_intc 0>,
<0 0 0 2 &pcie7_intc 1>,
<0 0 0 3 &pcie7_intc 2>,
<0 0 0 4 &pcie7_intc 3>;
marvell,pcie-port = <1>;
marvell,pcie-lane = <2>;
clocks = <&gateclk 11>;
status = "disabled";
pcie7_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
pcie8: pcie@8,0 {
......@@ -245,16 +315,26 @@ pcie8: pcie@8,0 {
reg = <0x4000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 65>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x8 0 1 0
0x81000000 0 0 0x81000000 0x8 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &mpic 65>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie8_intc 0>,
<0 0 0 2 &pcie8_intc 1>,
<0 0 0 3 &pcie8_intc 2>,
<0 0 0 4 &pcie8_intc 3>;
marvell,pcie-port = <1>;
marvell,pcie-lane = <3>;
clocks = <&gateclk 12>;
status = "disabled";
pcie8_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
pcie9: pcie@9,0 {
......@@ -263,16 +343,26 @@ pcie9: pcie@9,0 {
reg = <0x4800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 99>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0
0x81000000 0 0 0x81000000 0x9 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &mpic 99>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie9_intc 0>,
<0 0 0 2 &pcie9_intc 1>,
<0 0 0 3 &pcie9_intc 2>,
<0 0 0 4 &pcie9_intc 3>;
marvell,pcie-port = <2>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 26>;
status = "disabled";
pcie9_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
pcie10: pcie@a,0 {
......@@ -281,16 +371,26 @@ pcie10: pcie@a,0 {
reg = <0x5000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 103>;
#interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0xa 0 1 0
0x81000000 0 0 0x81000000 0xa 0 1 0>;
bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &mpic 103>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie10_intc 0>,
<0 0 0 2 &pcie10_intc 1>,
<0 0 0 3 &pcie10_intc 2>,
<0 0 0 4 &pcie10_intc 3>;
marvell,pcie-port = <3>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 27>;
status = "disabled";
pcie10_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
};
};
......
arch/arm/boot/dts/aspeed-ast2600-evb-a1.dts
View file @ 7171a8da
......@@ -5,7 +5,7 @@
/ {
model = "AST2600 A1 EVB";
compatible = "aspeed,ast2600-evb-a1", "aspeed,ast2600";
compatible = "aspeed,ast2600-evb-a1", "aspeed,ast2600-evb", "aspeed,ast2600";
/delete-node/regulator-vcc-sdhci0;
/delete-node/regulator-vcc-sdhci1;
......
arch/arm/boot/dts/aspeed-ast2600-evb.dts
View file @ 7171a8da
......@@ -8,7 +8,7 @@
/ {
model = "AST2600 EVB";
compatible = "aspeed,ast2600-evb-a1", "aspeed,ast2600";
compatible = "aspeed,ast2600-evb", "aspeed,ast2600";
aliases {
serial4 = &uart5;
......@@ -182,6 +182,7 @@ flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
spi-rx-bus-width = <4>;
spi-max-frequency = <50000000>;
#include "openbmc-flash-layout-64.dtsi"
};
......@@ -196,6 +197,7 @@ flash@0 {
status = "okay";
m25p,fast-read;
label = "pnor";
spi-rx-bus-width = <4>;
spi-max-frequency = <100000000>;
};
};
......@@ -207,11 +209,6 @@ &uart5 {
&i2c0 {
status = "okay";
temp@2e {
compatible = "adi,adt7490";
reg = <0x2e>;
};
};
&i2c1 {
......@@ -240,10 +237,26 @@ &i2c6 {
&i2c7 {
status = "okay";
temp@2e {
compatible = "adi,adt7490";
reg = <0x2e>;
};
eeprom@50 {
compatible = "atmel,24c08";
reg = <0x50>;
pagesize = <16>;
};
};
&i2c8 {
status = "okay";
lm75@4d {
compatible = "national,lm75";
reg = <0x4d>;
};
};
&i2c9 {
......
arch/arm/boot/dts/aspeed-bmc-amd-daytonax.dts 0 → 100644
View file @ 7171a8da
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "AMD DaytonaX BMC";
compatible = "amd,daytonax-bmc", "aspeed,ast2500";
memory@80000000 {
reg = <0x80000000 0x20000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
video_engine_memory: jpegbuffer {
size = <0x02000000>; /* 32M */
alignment = <0x01000000>;
compatible = "shared-dma-pool";
reusable;
};
};
aliases {
serial0 = &uart1;
serial4 = &uart5;
};
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS4,115200";
};
leds {
compatible = "gpio-leds";
led-fault {
gpios = <&gpio ASPEED_GPIO(A, 2) GPIO_ACTIVE_LOW>;
};
led-identify {
gpios = <&gpio ASPEED_GPIO(A, 3) GPIO_ACTIVE_LOW>;
};
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>,
<&adc 5>, <&adc 6>, <&adc 7>, <&adc 8>, <&adc 9>,
<&adc 10>, <&adc 11>, <&adc 12>, <&adc 13>, <&adc 14>,
<&adc 15>;
};
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
#include "openbmc-flash-layout.dtsi"
};
};
&mac0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>;
};
&uart1 {
//Host Console
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd1_default
&pinctrl_rxd1_default
&pinctrl_nrts1_default
&pinctrl_ndtr1_default
&pinctrl_ndsr1_default
&pinctrl_ncts1_default
&pinctrl_ndcd1_default
&pinctrl_nri1_default>;
};
&uart5 {
//BMC Console
status = "okay";
};
&vuart {
status = "okay";
aspeed,lpc-io-reg = <0x3f8>;
aspeed,lpc-interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
};
&adc {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adc0_default
&pinctrl_adc1_default
&pinctrl_adc2_default
&pinctrl_adc3_default
&pinctrl_adc4_default
&pinctrl_adc5_default
&pinctrl_adc6_default
&pinctrl_adc7_default
&pinctrl_adc8_default
&pinctrl_adc9_default
&pinctrl_adc10_default
&pinctrl_adc11_default
&pinctrl_adc12_default
&pinctrl_adc13_default
&pinctrl_adc14_default
&pinctrl_adc15_default>;
};
&gpio {
status = "okay";
gpio-line-names =
/*A0-A7*/ "","","led-fault","led-identify","","","","",
/*B0-B7*/ "","","","","","","","",
/*C0-C7*/ "id-button","","","","","","","",
/*D0-D7*/ "","","ASSERT_BMC_READY","","","","","",
/*E0-E7*/ "reset-button","reset-control","power-button","power-control","",
"power-good","power-ok","",
/*F0-F7*/ "","","","","","","BATTERY_DETECT","",
/*G0-G7*/ "","","","","","","","",
/*H0-H7*/ "","","","","","","","",
/*I0-I7*/ "","","","","","","","",
/*J0-J7*/ "","","","","","","","",
/*K0-K7*/ "","","","","","","","",
/*L0-L7*/ "","","","","","","","",
/*M0-M7*/ "","","","","","","","",
/*N0-N7*/ "","","","","","","","",
/*O0-O7*/ "","","","","","","","",
/*P0-P7*/ "","","","","","","","",
/*Q0-Q7*/ "","","","","","","","",
/*R0-R7*/ "","","","","","","","",
/*S0-S7*/ "","","","","","","","",
/*T0-T7*/ "","","","","","","","",
/*U0-U7*/ "","","","","","","","",
/*V0-V7*/ "","","","","","","","",
/*W0-W7*/ "","","","","","","","",
/*X0-X7*/ "","","","","","","","",
/*Y0-Y7*/ "","","","","","","","",
/*Z0-Z7*/ "","","","","","","","",
/*AA0-AA7*/ "","","","","","","","",
/*AB0-AB7*/ "FM_BMC_READ_SPD_TEMP","","","","","","","",
/*AC0-AC7*/ "","","","","","","","";
};
&i2c0 {
status = "okay";
};
&i2c1 {
status = "okay";
};
&i2c2 {
status = "okay";
};
&i2c3 {
status = "okay";
};
&i2c4 {
status = "okay";
};
&i2c5 {
status = "okay";
};
&i2c6 {
status = "okay";
};
&i2c7 {
status = "okay";
};
&i2c8 {
status = "okay";
};
&i2c10 {
status = "okay";
};
&i2c11 {
status = "okay";
};
&i2c12 {
status = "okay";
};
&kcs3 {
status = "okay";
aspeed,lpc-io-reg = <0xca2>;
};
&lpc_snoop {
status = "okay";
snoop-ports = <0x80>, <0x81>;
};
&lpc_ctrl {
status = "okay";
};
&pwm_tacho {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_default
&pinctrl_pwm1_default
&pinctrl_pwm2_default
&pinctrl_pwm3_default
&pinctrl_pwm4_default
&pinctrl_pwm5_default
&pinctrl_pwm6_default
&pinctrl_pwm7_default>;
fan@0 {
reg = <0x00>;
aspeed,fan-tach-ch = /bits/ 8 <0x00>;
};
fan@1 {
reg = <0x00>;
aspeed,fan-tach-ch = /bits/ 8 <0x01>;
};
fan@2 {
reg = <0x01>;
aspeed,fan-tach-ch = /bits/ 8 <0x02>;
};
fan@3 {
reg = <0x01>;
aspeed,fan-tach-ch = /bits/ 8 <0x03>;
};
fan@4 {
reg = <0x02>;
aspeed,fan-tach-ch = /bits/ 8 <0x04>;
};
fan@5 {
reg = <0x02>;
aspeed,fan-tach-ch = /bits/ 8 <0x05>;
};
fan@6 {
reg = <0x03>;
aspeed,fan-tach-ch = /bits/ 8 <0x06>;
};
fan@7 {
reg = <0x03>;
aspeed,fan-tach-ch = /bits/ 8 <0x07>;
};
fan@8 {
reg = <0x04>;
aspeed,fan-tach-ch = /bits/ 8 <0x08>;
};
fan@9 {
reg = <0x04>;
aspeed,fan-tach-ch = /bits/ 8 <0x09>;
};
fan@10 {
reg = <0x05>;
aspeed,fan-tach-ch = /bits/ 8 <0x0a>;
};
fan@11 {
reg = <0x05>;
aspeed,fan-tach-ch = /bits/ 8 <0x0b>;
};
fan@12 {
reg = <0x06>;
aspeed,fan-tach-ch = /bits/ 8 <0x0c>;
};
fan@13 {
reg = <0x06>;
aspeed,fan-tach-ch = /bits/ 8 <0x0d>;
};
fan@14 {
reg = <0x07>;
aspeed,fan-tach-ch = /bits/ 8 <0x0e>;
};
fan@15 {
reg = <0x07>;
aspeed,fan-tach-ch = /bits/ 8 <0x0f>;
};
};
&video {
status = "okay";
memory-region = <&video_engine_memory>;
};
&vhub {
status = "okay";
};
arch/arm/boot/dts/aspeed-bmc-ampere-mtjade.dts
View file @ 7171a8da
......@@ -97,101 +97,6 @@ identify {
};
};
gpio-keys {
compatible = "gpio-keys";
event-shutdown-ack {
label = "SHUTDOWN_ACK";
gpios = <&gpio ASPEED_GPIO(G, 2) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(G, 2)>;
};
event-reboot-ack {
label = "REBOOT_ACK";
gpios = <&gpio ASPEED_GPIO(J, 3) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(J, 3)>;
};
event-s0-overtemp {
label = "S0_OVERTEMP";
gpios = <&gpio ASPEED_GPIO(G, 3) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(G, 3)>;
};
event-s0-hightemp {
label = "S0_HIGHTEMP";
gpios = <&gpio ASPEED_GPIO(J, 0) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(J, 0)>;
};
event-s0-cpu-fault {
label = "S0_CPU_FAULT";
gpios = <&gpio ASPEED_GPIO(J, 1) GPIO_ACTIVE_HIGH>;
linux,code = <ASPEED_GPIO(J, 1)>;
};
event-s0-scp-auth-fail {
label = "S0_SCP_AUTH_FAIL";
gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(J, 2)>;
};
event-s1-scp-auth-fail {
label = "S1_SCP_AUTH_FAIL";
gpios = <&gpio ASPEED_GPIO(Z, 5) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(Z, 5)>;
};
event-s1-overtemp {
label = "S1_OVERTEMP";
gpios = <&gpio ASPEED_GPIO(Z, 6) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(Z, 6)>;
};
event-s1-hightemp {
label = "S1_HIGHTEMP";
gpios = <&gpio ASPEED_GPIO(AB, 0) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(AB, 0)>;
};
event-s1-cpu-fault {
label = "S1_CPU_FAULT";
gpios = <&gpio ASPEED_GPIO(Z, 1) GPIO_ACTIVE_HIGH>;
linux,code = <ASPEED_GPIO(Z, 1)>;
};
event-id {
label = "ID_BUTTON";
gpios = <&gpio ASPEED_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(Q, 5)>;
};
event-psu1-vin-good {
label = "PSU1_VIN_GOOD";
gpios = <&gpio ASPEED_GPIO(H, 4) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(H, 4)>;
};
event-psu2-vin-good {
label = "PSU2_VIN_GOOD";
gpios = <&gpio ASPEED_GPIO(H, 5) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(H, 5)>;
};
event-psu1-present {
label = "PSU1_PRESENT";
gpios = <&gpio ASPEED_GPIO(I, 0) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(I, 0)>;
};
event-psu2-present {
label = "PSU2_PRESENT";
gpios = <&gpio ASPEED_GPIO(I, 1) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(I, 1)>;
};
};
gpioA0mux: mux-controller {
compatible = "gpio-mux";
#mux-control-cells = <0>;
......
arch/arm/boot/dts/aspeed-bmc-ampere-mtmitchell.dts 0 → 100644
View file @ 7171a8da
This diff is collapsed.
arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts
View file @ 7171a8da
......@@ -7,6 +7,7 @@
#include <dt-bindings/usb/pd.h>
#include <dt-bindings/leds/leds-pca955x.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/i2c/i2c.h>
/ {
model = "Facebook Bletchley BMC";
......@@ -792,11 +793,6 @@ tmp421@4f {
reg = <0x4f>;
};
hdc1080@40 {
compatible = "ti,hdc1080";
reg = <0x40>;
};
front_leds: pca9552@67 {
compatible = "nxp,pca9552";
reg = <0x67>;
......@@ -857,6 +853,13 @@ &i2c13 {
multi-master;
aspeed,hw-timeout-ms = <1000>;
status = "okay";
//USB Debug Connector
ipmb13@10 {
compatible = "ipmb-dev";
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
i2c-protocol;
};
};
&gpio0 {
......
arch/arm/boot/dts/aspeed-bmc-facebook-yosemitev2.dts
View file @ 7171a8da
......@@ -207,11 +207,16 @@ tmp421@1f {
&i2c12 {
status = "okay";
//MEZZ_FRU
eeprom@51 {
compatible = "atmel,24c64";
reg = <0x51>;
pagesize = <32>;
};
&i2c13 {
status = "okay";
// Debug Card
multi-master;
ipmb13@10 {
compatible = "ipmb-dev";
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
i2c-protocol;
};
};
......
arch/arm/boot/dts/aspeed-g6.dtsi
View file @ 7171a8da
......@@ -756,6 +756,62 @@ uart4: serial@1e78f000 {
status = "disabled";
};
uart6: serial@1e790000 {
compatible = "ns16550a";
reg = <0x1e790000 0x20>;
reg-shift = <2>;
reg-io-width = <4>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon ASPEED_CLK_GATE_UART6CLK>;
no-loopback-test;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart6_default>;
status = "disabled";
};
uart7: serial@1e790100 {
compatible = "ns16550a";
reg = <0x1e790100 0x20>;
reg-shift = <2>;
reg-io-width = <4>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon ASPEED_CLK_GATE_UART7CLK>;
no-loopback-test;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart7_default>;
status = "disabled";
};
uart8: serial@1e790200 {
compatible = "ns16550a";
reg = <0x1e790200 0x20>;
reg-shift = <2>;
reg-io-width = <4>;
interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon ASPEED_CLK_GATE_UART8CLK>;
no-loopback-test;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart8_default>;
status = "disabled";
};
uart9: serial@1e790300 {
compatible = "ns16550a";
reg = <0x1e790300 0x20>;
reg-shift = <2>;
reg-io-width = <4>;
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon ASPEED_CLK_GATE_UART9CLK>;
no-loopback-test;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart9_default>;
status = "disabled";
};
i2c: bus@1e78a000 {
compatible = "simple-bus";
#address-cells = <1>;
......
arch/arm/boot/dts/at91-sam9x60ek.dts
View file @ 7171a8da
......@@ -34,48 +34,6 @@ main_xtal {
};
};
regulators: regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
vdd_1v8: fixed-regulator-vdd_1v8@0 {
compatible = "regulator-fixed";
regulator-name = "VDD_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
status = "okay";
};
vdd_1v15: fixed-regulator-vdd_1v15@1 {
compatible = "regulator-fixed";
regulator-name = "VDD_1V15";
regulator-min-microvolt = <1150000>;
regulator-max-microvolt = <1150000>;
regulator-always-on;
status = "okay";
};
vdd1_3v3: fixed-regulator-vdd1_3v3@2 {
compatible = "regulator-fixed";
regulator-name = "VDD1_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
status = "okay";
};
vdd2_3v3: regulator-fixed-vdd2_3v3@3 {
compatible = "regulator-fixed";
regulator-name = "VDD2_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
status = "okay";
};
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
......@@ -111,6 +69,42 @@ blue {
linux,default-trigger = "heartbeat";
};
};
vdd_1v8: fixed-regulator-vdd_1v8 {
compatible = "regulator-fixed";
regulator-name = "VDD_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
status = "okay";
};
vdd_1v15: fixed-regulator-vdd_1v15 {
compatible = "regulator-fixed";
regulator-name = "VDD_1V15";
regulator-min-microvolt = <1150000>;
regulator-max-microvolt = <1150000>;
regulator-always-on;
status = "okay";
};
vdd1_3v3: fixed-regulator-vdd1_3v3 {
compatible = "regulator-fixed";
regulator-name = "VDD1_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
status = "okay";
};
vdd2_3v3: regulator-fixed-vdd2_3v3 {
compatible = "regulator-fixed";
regulator-name = "VDD2_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
status = "okay";
};
};
&adc {
......@@ -264,8 +258,9 @@ &flx5 {
status = "okay";
uart1: serial@200 {
compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
reg = <0x200 0x200>;
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>;
dmas = <&dma0
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
......
arch/arm/boot/dts/at91-sama5d3_eds.dts 0 → 100644
View file @ 7171a8da
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* at91-sama5d3_eds.dts - Device Tree file for the SAMA5D3 Ethernet
* Development System board.
*
* Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries
*
* Author: Jerry Ray <jerry.ray@microchip.com>
*/
/dts-v1/;
#include "sama5d36.dtsi"
/ {
model = "SAMA5D3 Ethernet Development System";
compatible = "microchip,sama5d3-eds", "atmel,sama5d36",
"atmel,sama5d3", "atmel,sama5";
chosen {
stdout-path = "serial0:115200n8";
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_key_gpio>;
button-3 {
label = "PB_USER";
gpios = <&pioE 29 GPIO_ACTIVE_LOW>;
linux,code = <0x104>;
wakeup-source;
};
};
memory@20000000 {
reg = <0x20000000 0x10000000>;
};
vcc_3v3_reg: regulator-1 {
compatible = "regulator-fixed";
regulator-name = "VCC_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vcc_2v5_reg: regulator-2 {
compatible = "regulator-fixed";
regulator-name = "VCC_2V5";
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
regulator-always-on;
vin-supply = <&vcc_3v3_reg>;
};
vcc_1v8_reg: regulator-3 {
compatible = "regulator-fixed";
regulator-name = "VCC_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
vin-supply = <&vcc_3v3_reg>;
};
vcc_1v2_reg: regulator-4 {
compatible = "regulator-fixed";
regulator-name = "VCC_1V2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
};
vcc_mmc0_reg: regulator-5 {
compatible = "regulator-fixed";
regulator-name = "mmc0-card-supply";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_vcc_mmc0_reg_gpio>;
gpio = <&pioE 2 GPIO_ACTIVE_LOW>;
};
};
&can0 {
status = "okay";
};
&dbgu {
status = "okay";
};
&ebi {
pinctrl-0 = <&pinctrl_ebi_nand_addr>;
pinctrl-names = "default";
status = "okay";
nand_controller: nand-controller {
status = "okay";
nand@3 {
reg = <0x3 0x0 0x2>;
atmel,rb = <0>;
nand-bus-width = <8>;
nand-ecc-mode = "hw";
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
nand-on-flash-bbt;
label = "atmel_nand";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
at91bootstrap@0 {
label = "at91bootstrap";
reg = <0x0 0x40000>;
};
bootloader@40000 {
label = "bootloader";
reg = <0x40000 0xc0000>;
};
bootloaderenvred@100000 {
label = "bootloader env redundant";
reg = <0x100000 0x40000>;
};
bootloaderenv@140000 {
label = "bootloader env";
reg = <0x140000 0x40000>;
};
dtb@180000 {
label = "device tree";
reg = <0x180000 0x80000>;
};
kernel@200000 {
label = "kernel";
reg = <0x200000 0x600000>;
};
rootfs@800000 {
label = "rootfs";
reg = <0x800000 0x0f800000>;
};
};
};
};
};
&i2c0 {
pinctrl-0 = <&pinctrl_i2c0_pu>;
status = "okay";
};
&i2c1 {
status = "okay";
};
&i2c2 {
pinctrl-0 = <&pinctrl_i2c2_pu>;
status = "okay";
};
&main_xtal {
clock-frequency = <12000000>;
};
&mmc0 {
pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3
&pinctrl_mmc0_dat4_7 &pinctrl_mmc0_cd>;
vmmc-supply = <&vcc_mmc0_reg>;
vqmmc-supply = <&vcc_3v3_reg>;
status = "okay";
slot@0 {
reg = <0>;
bus-width = <8>;
cd-gpios = <&pioE 0 GPIO_ACTIVE_LOW>;
};
};
&pinctrl {
board {
pinctrl_i2c0_pu: i2c0-pu {
atmel,pins =
<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
<AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
};
pinctrl_i2c2_pu: i2c2-pu {
atmel,pins =
<AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
<AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
};
pinctrl_key_gpio: key-gpio-0 {
atmel,pins =
<AT91_PIOE 29 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
};
pinctrl_mmc0_cd: mmc0-cd {
atmel,pins =
<AT91_PIOE 0 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
};
/* Reserved for reset signal to the RGMII connector. */
pinctrl_rgmii_rstn: rgmii-rstn {
atmel,pins =
<AT91_PIOD 18 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
};
/* Reserved for an interrupt line from the RMII and RGMII connectors. */
pinctrl_spi_irqn: spi-irqn {
atmel,pins =
<AT91_PIOB 28 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
};
pinctrl_spi0_cs: spi0-cs-default {
atmel,pins =
<AT91_PIOD 13 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
AT91_PIOD 16 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
};
pinctrl_spi1_cs: spi1-cs-default {
atmel,pins = <AT91_PIOC 25 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
AT91_PIOC 28 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
};
pinctrl_usba_vbus: usba-vbus {
atmel,pins =
<AT91_PIOE 9 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
};
pinctrl_usb_default: usb-default {
atmel,pins =
<AT91_PIOE 3 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
AT91_PIOE 4 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
};
/* Reserved for VBUS fault interrupt. */
pinctrl_vbusfault_irqn: vbusfault-irqn {
atmel,pins =
<AT91_PIOE 5 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
};
pinctrl_vcc_mmc0_reg_gpio: vcc-mmc0-reg-gpio-default {
atmel,pins = <AT91_PIOE 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
};
};
};
&slow_xtal {
clock-frequency = <32768>;
};
&spi0 {
pinctrl-names = "default", "cs";
pinctrl-1 = <&pinctrl_spi0_cs>;
cs-gpios = <&pioD 13 0>, <0>, <0>, <&pioD 16 0>;
status = "okay";
};
&spi1 {
pinctrl-names = "default", "cs";
pinctrl-1 = <&pinctrl_spi1_cs>;
cs-gpios = <&pioC 25 0>, <0>, <0>, <&pioC 28 0>;
status = "okay";
};
&tcb0 {
timer0: timer@0 {
compatible = "atmel,tcb-timer";
reg = <0>;
};
timer1: timer@1 {
compatible = "atmel,tcb-timer";
reg = <1>;
};
};
&usb0 { /* USB Device port with VBUS detection. */
atmel,vbus-gpio = <&pioE 9 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usba_vbus>;
status = "okay";
};
&usb1 { /* 3-port Host. First port is unused. */
atmel,vbus-gpio = <0
&pioE 3 GPIO_ACTIVE_HIGH
&pioE 4 GPIO_ACTIVE_HIGH
>;
num-ports = <3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb_default>;
status = "okay";
};
&usb2 {
status = "okay";
};
arch/arm/boot/dts/at91rm9200.dtsi
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......@@ -13,6 +13,7 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/at91.h>
#include <dt-bindings/mfd/at91-usart.h>
/ {
#address-cells = <1>;
......@@ -596,6 +597,7 @@ pioD: gpio@fffffa00 {
dbgu: serial@fffff200 {
compatible = "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart";
reg = <0xfffff200 0x200>;
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dbgu>;
......@@ -607,6 +609,7 @@ dbgu: serial@fffff200 {
usart0: serial@fffc0000 {
compatible = "atmel,at91rm9200-usart";
reg = <0xfffc0000 0x200>;
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
......@@ -620,6 +623,7 @@ usart0: serial@fffc0000 {
usart1: serial@fffc4000 {
compatible = "atmel,at91rm9200-usart";
reg = <0xfffc4000 0x200>;
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
......@@ -633,6 +637,7 @@ usart1: serial@fffc4000 {
usart2: serial@fffc8000 {
compatible = "atmel,at91rm9200-usart";
reg = <0xfffc8000 0x200>;
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
......@@ -646,6 +651,7 @@ usart2: serial@fffc8000 {
usart3: serial@fffcc000 {
compatible = "atmel,at91rm9200-usart";
reg = <0xfffcc000 0x200>;
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
......
arch/arm/boot/dts/at91sam9260.dtsi
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arch/arm/boot/dts/at91sam9261.dtsi
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......@@ -9,6 +9,7 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/at91.h>
#include <dt-bindings/mfd/at91-usart.h>
/ {
#address-cells = <1>;
......@@ -179,6 +180,7 @@ i2c0: i2c@fffac000 {
usart0: serial@fffb0000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffb0000 0x200>;
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
......@@ -192,6 +194,7 @@ usart0: serial@fffb0000 {
usart1: serial@fffb4000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffb4000 0x200>;
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
......@@ -205,6 +208,7 @@ usart1: serial@fffb4000 {
usart2: serial@fffb8000{
compatible = "atmel,at91sam9260-usart";
reg = <0xfffb8000 0x200>;
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
......@@ -301,6 +305,7 @@ aic: interrupt-controller@fffff000 {
dbgu: serial@fffff200 {
compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
reg = <0xfffff200 0x200>;
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dbgu>;
......
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......@@ -586,7 +586,7 @@ image-sensor@10 {
clocks = <&camera 1>;
clock-names = "extclk";
samsung,camclk-out = <1>;
gpios = <&gpm1 6 GPIO_ACTIVE_HIGH>;
gpios = <&gpm1 6 GPIO_ACTIVE_LOW>;
port {
is_s5k6a3_ep: endpoint {
......
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