Commit 83932276 authored by Nishanth Aravamudan's avatar Nishanth Aravamudan Committed by Jeff Garzik

[PATCH] net/s2io: replace schedule_timeout() with msleep()

Use msleep() instead of schedule_timeout() to guarantee the task delays
as expected. This makes the code independent of HZ values (particularly
important when HZ changes or is dynamic). Compile- and boot-tested.
Signed-off-by: default avatarNishanth Aravamudan <nacc@us.ibm.com>
Acked-by: default avatarRavinandan Arakali <ravinandan.arakali@neterion.com>
Signed-off-by: default avatarJeff Garzik <jgarzik@pobox.com>
parent 735a58f4
......@@ -698,8 +698,7 @@ static int init_nic(struct s2io_nic *nic)
val64 = 0;
writeq(val64, &bar0->sw_reset);
val64 = readq(&bar0->sw_reset);
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout(HZ / 2);
msleep(500);
/* Enable Receiving broadcasts */
add = &bar0->mac_cfg;
......@@ -952,8 +951,7 @@ static int init_nic(struct s2io_nic *nic)
dev->name);
return -1;
}
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout(HZ / 20);
msleep(50);
time++;
}
......@@ -991,8 +989,7 @@ static int init_nic(struct s2io_nic *nic)
return -1;
}
time++;
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout(HZ / 20);
msleep(50);
}
/*
......@@ -1421,8 +1418,7 @@ static int start_nic(struct s2io_nic *nic)
SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_mrs, UF);
val64 = readq(&bar0->mc_rldram_mrs);
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout(HZ / 10); /* Delay by around 100 ms. */
msleep(100); /* Delay by around 100 ms. */
/* Enabling ECC Protection. */
val64 = readq(&bar0->adapter_control);
......@@ -2437,8 +2433,7 @@ int wait_for_cmd_complete(nic_t * sp)
ret = SUCCESS;
break;
}
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout(HZ / 20);
msleep(50);
if (cnt++ > 10)
break;
}
......@@ -2477,15 +2472,13 @@ void s2io_reset(nic_t * sp)
* As of now I'am just giving a 250ms delay and hoping that the
* PCI write to sw_reset register is done by this time.
*/
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout(HZ / 4);
msleep(250);
/* Restore the PCI state saved during initializarion. */
pci_restore_state(sp->pdev);
s2io_init_pci(sp);
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout(HZ / 4);
msleep(250);
/* SXE-002: Configure link and activity LED to turn it off */
subid = sp->pdev->subsystem_device;
......@@ -3298,11 +3291,10 @@ static int s2io_ethtool_idnic(struct net_device *dev, u32 data)
sp->id_timer.data = (unsigned long) sp;
}
mod_timer(&sp->id_timer, jiffies);
set_current_state(TASK_INTERRUPTIBLE);
if (data)
schedule_timeout(data * HZ);
msleep(data * 1000);
else
schedule_timeout(MAX_SCHEDULE_TIMEOUT);
msleep(0xFFFFFFFF);
del_timer_sync(&sp->id_timer);
if (CARDS_WITH_FAULTY_LINK_INDICATORS(subid)) {
......@@ -3405,8 +3397,7 @@ static int read_eeprom(nic_t * sp, int off, u32 * data)
ret = 0;
break;
}
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout(HZ / 20);
msleep(50);
exit_cnt++;
}
......@@ -3446,8 +3437,7 @@ static int write_eeprom(nic_t * sp, int off, u32 data, int cnt)
ret = 0;
break;
}
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout(HZ / 20);
msleep(50);
exit_cnt++;
}
......@@ -3703,8 +3693,7 @@ static int s2io_bist_test(nic_t * sp, uint64_t * data)
ret = 0;
break;
}
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout(HZ / 10);
msleep(100);
cnt++;
}
......@@ -3805,8 +3794,7 @@ static int s2io_rldram_test(nic_t * sp, uint64_t * data)
val64 = readq(&bar0->mc_rldram_test_ctrl);
if (val64 & MC_RLDRAM_TEST_DONE)
break;
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout(HZ / 5);
msleep(200);
}
if (cnt == 5)
......@@ -3822,8 +3810,7 @@ static int s2io_rldram_test(nic_t * sp, uint64_t * data)
val64 = readq(&bar0->mc_rldram_test_ctrl);
if (val64 & MC_RLDRAM_TEST_DONE)
break;
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout(HZ / 2);
msleep(500);
}
if (cnt == 5)
......@@ -4183,8 +4170,7 @@ static void s2io_set_link(unsigned long data)
* Allow a small delay for the NICs self initiated
* cleanup to complete.
*/
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout(HZ / 10);
msleep(100);
val64 = readq(&bar0->adapter_status);
if (verify_xena_quiescence(val64, nic->device_enabled_once)) {
......@@ -4238,10 +4224,8 @@ static void s2io_card_down(nic_t * sp)
register u64 val64 = 0;
/* If s2io_set_link task is executing, wait till it completes. */
while (test_and_set_bit(0, &(sp->link_state))) {
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout(HZ / 20);
}
while (test_and_set_bit(0, &(sp->link_state)))
msleep(50);
atomic_set(&sp->card_state, CARD_DOWN);
/* disable Tx and Rx traffic on the NIC */
......@@ -4257,8 +4241,7 @@ static void s2io_card_down(nic_t * sp)
break;
}
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout(HZ / 20);
msleep(50);
cnt++;
if (cnt == 10) {
DBG_PRINT(ERR_DBG,
......
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