Commit 8881ec52 authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'omap-for-v4.20/dt-signed-v2' of...

Merge tag 'omap-for-v4.20/dt-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt

Devicetree changes for omap variants

This branch contains a series of improvments for omap3-gta04 phone,
and a series of clean-up for am335x to remove the deprecated phy_id
property.

The rest is to configure am57xx-idk boards for leds, load trigger,
and smps, am3517-evm audio configuration, beaglebone hdmi cec support,
coresight binding update, and fixes for i2c and spi warnings.

* tag 'omap-for-v4.20/dt-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (70 commits)
  ARM: dts: add omap3-gta04a5one to Makefile
  ARM: dts: omap3-gta04: add pulldown/up settings for twl4030 gpio
  ARM: dts: am335x-boneblack: add cec support
  ARM: dts: am3517-evm: Add support for UI board and Audio
  ARM: dts: gta04: add serial console wakeup irq
  ARM: dts: am57xx-idk-common: Hook smps12 regulator as cpu vdd-supply
  ARM: dts: omap: Update coresight bindings for hardware ports
  ARM: dts: ti: Fix SPI and I2C bus warnings
  ARM: dts: dra62x-j5eco-evm: get rid of phy_id property
  ARM: dts: dm8148-t410: get rid of phy_id property
  ARM: dts: dm8148-evm: get rid of phy_id property
  ARM: dts: am57xx-cl-som-am57x: get rid of phy_id property
  ARM: dts: am57xx-idk-common: get rid of phy_id property
  ARM: dts: dra7-evm: get rid of phy_id property
  ARM: dts: dra71-evm: get rid of phy_id property
  ARM: dts: dra72-evm-revc: get rid of phy_id property
  ARM: dts: dra72-evm: get rid of phy_id property
  ARM: dts: dra76-evm: get rid of phy_id property
  ARM: dts: am437x-cm-t43: get rid of phy_id property
  ARM: dts: am437x-gp-evm: get rid of phy_id property
  ...
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents e9a4dd99 20bcd4a4
...@@ -653,6 +653,7 @@ dtb-$(CONFIG_ARCH_OMAP3) += \ ...@@ -653,6 +653,7 @@ dtb-$(CONFIG_ARCH_OMAP3) += \
omap3-gta04a3.dtb \ omap3-gta04a3.dtb \
omap3-gta04a4.dtb \ omap3-gta04a4.dtb \
omap3-gta04a5.dtb \ omap3-gta04a5.dtb \
omap3-gta04a5one.dtb \
omap3-ha.dtb \ omap3-ha.dtb \
omap3-ha-lcd.dtb \ omap3-ha-lcd.dtb \
omap3-igep0020.dtb \ omap3-igep0020.dtb \
......
...@@ -379,7 +379,7 @@ ldo4_reg: regulator@6 { ...@@ -379,7 +379,7 @@ ldo4_reg: regulator@6 {
}; };
&cpsw_emac0 { &cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>; phy-handle = <&ethphy0>;
phy-mode = "mii"; phy-mode = "mii";
}; };
...@@ -396,6 +396,10 @@ &davinci_mdio { ...@@ -396,6 +396,10 @@ &davinci_mdio {
pinctrl-0 = <&davinci_mdio_default>; pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>; pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay"; status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
};
}; };
&mmc1 { &mmc1 {
......
...@@ -7,6 +7,7 @@ ...@@ -7,6 +7,7 @@
*/ */
#include <dt-bindings/display/tda998x.h> #include <dt-bindings/display/tda998x.h>
#include <dt-bindings/interrupt-controller/irq.h>
&ldo3_reg { &ldo3_reg {
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
...@@ -88,9 +89,11 @@ lcdc_0: endpoint@0 { ...@@ -88,9 +89,11 @@ lcdc_0: endpoint@0 {
}; };
&i2c0 { &i2c0 {
tda19988: tda19988 { tda19988: tda19988@70 {
compatible = "nxp,tda998x"; compatible = "nxp,tda998x";
reg = <0x70>; reg = <0x70>;
nxp,calib-gpios = <&gpio1 25 0>;
interrupts-extended = <&gpio1 25 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default", "off"; pinctrl-names = "default", "off";
pinctrl-0 = <&nxp_hdmi_bonelt_pins>; pinctrl-0 = <&nxp_hdmi_bonelt_pins>;
......
...@@ -140,10 +140,14 @@ &davinci_mdio { ...@@ -140,10 +140,14 @@ &davinci_mdio {
pinctrl-0 = <&davinci_mdio_default>; pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>; pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay"; status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
};
}; };
&cpsw_emac0 { &cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>; phy-handle = <&ethphy0>;
phy-mode = "rmii"; phy-mode = "rmii";
}; };
......
...@@ -486,10 +486,14 @@ &davinci_mdio { ...@@ -486,10 +486,14 @@ &davinci_mdio {
pinctrl-0 = <&davinci_mdio_default>; pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>; pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay"; status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
};
}; };
&cpsw_emac0 { &cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>; phy-handle = <&ethphy0>;
phy-mode = "rgmii-txid"; phy-mode = "rgmii-txid";
}; };
......
...@@ -713,6 +713,7 @@ &mac { ...@@ -713,6 +713,7 @@ &mac {
pinctrl-0 = <&cpsw_default>; pinctrl-0 = <&cpsw_default>;
pinctrl-1 = <&cpsw_sleep>; pinctrl-1 = <&cpsw_sleep>;
status = "okay"; status = "okay";
slaves = <1>;
}; };
&davinci_mdio { &davinci_mdio {
...@@ -720,15 +721,14 @@ &davinci_mdio { ...@@ -720,15 +721,14 @@ &davinci_mdio {
pinctrl-0 = <&davinci_mdio_default>; pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>; pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay"; status = "okay";
};
&cpsw_emac0 { ethphy0: ethernet-phy@0 {
phy_id = <&davinci_mdio>, <0>; reg = <0>;
phy-mode = "rgmii-txid"; };
}; };
&cpsw_emac1 { &cpsw_emac0 {
phy_id = <&davinci_mdio>, <1>; phy-handle = <&ethphy0>;
phy-mode = "rgmii-txid"; phy-mode = "rgmii-txid";
}; };
......
...@@ -639,16 +639,24 @@ &davinci_mdio { ...@@ -639,16 +639,24 @@ &davinci_mdio {
pinctrl-0 = <&davinci_mdio_default>; pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>; pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay"; status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
};
ethphy1: ethernet-phy@1 {
reg = <1>;
};
}; };
&cpsw_emac0 { &cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>; phy-handle = <&ethphy0>;
phy-mode = "rgmii-txid"; phy-mode = "rgmii-txid";
dual_emac_res_vlan = <1>; dual_emac_res_vlan = <1>;
}; };
&cpsw_emac1 { &cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>; phy-handle = <&ethphy1>;
phy-mode = "rgmii-txid"; phy-mode = "rgmii-txid";
dual_emac_res_vlan = <2>; dual_emac_res_vlan = <2>;
}; };
......
...@@ -102,15 +102,24 @@ &mac { ...@@ -102,15 +102,24 @@ &mac {
&davinci_mdio { &davinci_mdio {
status = "okay"; status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
};
ethphy1: ethernet-phy@1 {
reg = <1>;
};
}; };
&cpsw_emac0 { &cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>; phy-handle = <&ethphy0>;
phy-mode = "rmii"; phy-mode = "rmii";
}; };
&cpsw_emac1 { &cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>; phy-handle = <&ethphy1>;
phy-mode = "rmii"; phy-mode = "rmii";
}; };
......
...@@ -317,13 +317,13 @@ &cppi41dma { ...@@ -317,13 +317,13 @@ &cppi41dma {
}; };
&cpsw_emac0 { &cpsw_emac0 {
phy_id = <&davinci_mdio>, <5>; phy-handle = <&ethphy0>;
phy-mode = "rmii"; phy-mode = "rmii";
dual_emac_res_vlan = <2>; dual_emac_res_vlan = <2>;
}; };
&cpsw_emac1 { &cpsw_emac1 {
phy_id = <&davinci_mdio>, <4>; phy-handle = <&ethphy1>;
phy-mode = "rmii"; phy-mode = "rmii";
dual_emac_res_vlan = <3>; dual_emac_res_vlan = <3>;
}; };
...@@ -345,6 +345,14 @@ &davinci_mdio { ...@@ -345,6 +345,14 @@ &davinci_mdio {
pinctrl-0 = <&davinci_mdio_default>; pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>; pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay"; status = "okay";
ethphy0: ethernet-phy@5 {
reg = <5>;
};
ethphy1: ethernet-phy@4 {
reg = <4>;
};
}; };
&mmc1 { &mmc1 {
......
...@@ -422,18 +422,26 @@ &davinci_mdio { ...@@ -422,18 +422,26 @@ &davinci_mdio {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&davinci_mdio_default>; pinctrl-0 = <&davinci_mdio_default>;
status = "okay"; status = "okay";
ethphy0: ethernet-phy@4 {
reg = <4>;
};
ethphy1: ethernet-phy@5 {
reg = <5>;
};
}; };
&cpsw_emac0 { &cpsw_emac0 {
status = "okay"; status = "okay";
phy_id = <&davinci_mdio>, <4>; phy-handle = <&ethphy0>;
phy-mode = "rmii"; phy-mode = "rmii";
dual_emac_res_vlan = <1>; dual_emac_res_vlan = <1>;
}; };
&cpsw_emac1 { &cpsw_emac1 {
status = "okay"; status = "okay";
phy_id = <&davinci_mdio>, <5>; phy-handle = <&ethphy1>;
phy-mode = "rmii"; phy-mode = "rmii";
dual_emac_res_vlan = <2>; dual_emac_res_vlan = <2>;
}; };
......
...@@ -380,16 +380,24 @@ &mac { ...@@ -380,16 +380,24 @@ &mac {
&davinci_mdio { &davinci_mdio {
status = "okay"; status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
};
ethphy1: ethernet-phy@1 {
reg = <1>;
};
}; };
&cpsw_emac0 { &cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>; phy-handle = <&ethphy0>;
phy-mode = "mii"; phy-mode = "mii";
dual_emac_res_vlan = <1>; dual_emac_res_vlan = <1>;
}; };
&cpsw_emac1 { &cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>; phy-handle = <&ethphy1>;
phy-mode = "mii"; phy-mode = "mii";
dual_emac_res_vlan = <2>; dual_emac_res_vlan = <2>;
}; };
......
...@@ -161,7 +161,7 @@ ax8975@c { ...@@ -161,7 +161,7 @@ ax8975@c {
invensense,key = [4e cc 7e eb f6 1e 35 22 00 34 0d 65 32 e9 94 89];*/ invensense,key = [4e cc 7e eb f6 1e 35 22 00 34 0d 65 32 e9 94 89];*/
}; };
bmp280: pressure@78 { bmp280: pressure@76 {
compatible = "bosch,bmp280"; compatible = "bosch,bmp280";
reg = <0x76>; reg = <0x76>;
}; };
......
...@@ -373,7 +373,7 @@ &spi1 { ...@@ -373,7 +373,7 @@ &spi1 {
ti,pindir-d0-out-d1-in; ti,pindir-d0-out-d1-in;
status = "okay"; status = "okay";
cfaf240320a032t { display-controller@0 {
compatible = "orisetech,otm3225a"; compatible = "orisetech,otm3225a";
reg = <0>; reg = <0>;
spi-max-frequency = <1000000>; spi-max-frequency = <1000000>;
...@@ -533,16 +533,24 @@ &davinci_mdio { ...@@ -533,16 +533,24 @@ &davinci_mdio {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&davinci_mdio_default>; pinctrl-0 = <&davinci_mdio_default>;
status = "okay"; status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
};
ethphy1: ethernet-phy@1 {
reg = <1>;
};
}; };
&cpsw_emac0 { &cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>; phy-handle = <&ethphy0>;
phy-mode = "mii"; phy-mode = "mii";
dual_emac_res_vlan = <1>; dual_emac_res_vlan = <1>;
}; };
&cpsw_emac1 { &cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>; phy-handle = <&ethphy1>;
phy-mode = "mii"; phy-mode = "mii";
dual_emac_res_vlan = <2>; dual_emac_res_vlan = <2>;
}; };
......
...@@ -265,13 +265,13 @@ AM33XX_IOPAD(0x86c, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a11.gpio1_27 */ ...@@ -265,13 +265,13 @@ AM33XX_IOPAD(0x86c, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a11.gpio1_27 */
/* Ethernet */ /* Ethernet */
&cpsw_emac0 { &cpsw_emac0 {
status = "okay"; status = "okay";
phy_id = <&davinci_mdio>, <0>; phy-handle = <&ethphy0>;
phy-mode = "rgmii"; phy-mode = "rgmii";
}; };
&cpsw_emac1 { &cpsw_emac1 {
status = "okay"; status = "okay";
phy_id = <&davinci_mdio>, <1>; phy-handle = <&ethphy1>;
phy-mode = "rgmii"; phy-mode = "rgmii";
}; };
...@@ -279,6 +279,14 @@ &davinci_mdio { ...@@ -279,6 +279,14 @@ &davinci_mdio {
status = "okay"; status = "okay";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&mdio_pins>; pinctrl-0 = <&mdio_pins>;
ethphy0: ethernet-phy@0 {
reg = <0>;
};
ethphy1: ethernet-phy@1 {
reg = <1>;
};
}; };
&mac { &mac {
......
...@@ -206,7 +206,6 @@ &mac { ...@@ -206,7 +206,6 @@ &mac {
status = "okay"; status = "okay";
slaves = <1>; slaves = <1>;
cpsw_emac0: slave@4a100200 { cpsw_emac0: slave@4a100200 {
phy_id = <&davinci_mdio>, <0>;
phy-mode = "mii"; phy-mode = "mii";
phy-handle = <&ethernetphy0>; phy-handle = <&ethernetphy0>;
}; };
......
/*
* Copyright (C) 2018 Logic PD, Inc - http://www.logicpd.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <dt-bindings/input/input.h>
/ {
codec1 {
compatible = "simple-audio-card";
simple-audio-card,name = "tlv320aic23-hifi";
simple-audio-card,widgets =
"Microphone", "Mic In",
"Line", "Line In",
"Line", "Line Out";
simple-audio-card,routing =
"Line Out", "LOUT",
"Line Out", "ROUT",
"LLINEIN", "Line In",
"RLINEIN", "Line In",
"MICIN", "Mic In";
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&sound_master>;
simple-audio-card,frame-master = <&sound_master>;
simple-audio-card,cpu {
sound-dai = <&mcbsp1>;
};
sound_master: simple-audio-card,codec {
sound-dai = <&tlv320aic23_1>;
system-clock-frequency = <12000000>;
};
};
codec2 {
compatible = "simple-audio-card";
simple-audio-card,name = "tlv320aic23-hifi";
simple-audio-card,widgets =
"Microphone", "Mic In",
"Line", "Line In",
"Line", "Line Out";
simple-audio-card,routing =
"Line Out", "LOUT",
"Line Out", "ROUT",
"LLINEIN", "Line In",
"RLINEIN", "Line In",
"MICIN", "Mic In";
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&sound_master2>;
simple-audio-card,frame-master = <&sound_master2>;
simple-audio-card,cpu {
sound-dai = <&mcbsp2>;
};
sound_master2: simple-audio-card,codec {
sound-dai = <&tlv320aic23_2>;
system-clock-frequency = <12000000>;
};
};
expander-keys {
compatible = "gpio-keys-polled";
poll-interval = <100>;
record {
label = "Record";
/* linux,code = <BTN_0>; */
gpios = <&tca6416_2 15 GPIO_ACTIVE_LOW>;
};
play {
label = "Play";
linux,code = <KEY_PLAY>;
gpios = <&tca6416_2 14 GPIO_ACTIVE_LOW>;
};
Stop {
label = "Stop";
linux,code = <KEY_STOP>;
gpios = <&tca6416_2 13 GPIO_ACTIVE_LOW>;
};
fwd {
label = "FWD";
linux,code = <KEY_FASTFORWARD>;
gpios = <&tca6416_2 12 GPIO_ACTIVE_LOW>;
};
rwd {
label = "RWD";
linux,code = <KEY_REWIND>;
gpios = <&tca6416_2 11 GPIO_ACTIVE_LOW>;
};
shift {
label = "Shift";
linux,code = <KEY_LEFTSHIFT>;
gpios = <&tca6416_2 10 GPIO_ACTIVE_LOW>;
};
Mode {
label = "Mode";
linux,code = <BTN_MODE>;
gpios = <&tca6416_2 9 GPIO_ACTIVE_LOW>;
};
Menu {
label = "Menu";
linux,code = <KEY_MENU>;
gpios = <&tca6416_2 8 GPIO_ACTIVE_LOW>;
};
Up {
label = "Up";
linux,code = <KEY_UP>;
gpios = <&tca6416_2 7 GPIO_ACTIVE_LOW>;
};
Down {
label = "Down";
linux,code = <KEY_DOWN>;
gpios = <&tca6416_2 6 GPIO_ACTIVE_LOW>;
};
};
};
&i2c2 {
/* Audio codecs */
tlv320aic23_1: codec@1a {
compatible = "ti,tlv320aic23";
reg = <0x1a>;
#sound-dai-cells= <0>;
status = "okay";
};
tlv320aic23_2: codec@1b {
compatible = "ti,tlv320aic23";
reg = <0x1b>;
#sound-dai-cells= <0>;
status = "okay";
};
};
&i2c3 {
/* Audio codecs */
tlv320aic23_3: codec@1a {
compatible = "ti,tlv320aic23";
reg = <0x1a>;
#sound-dai-cells= <0>;
status = "okay";
};
/* GPIO Expanders */
tca6416_2: gpio@20 {
compatible = "ti,tca6416";
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
vcc-supply = <&vdd_io_reg>;
};
tca6416_3: gpio@21 {
compatible = "ti,tca6416";
reg = <0x21>;
gpio-controller;
#gpio-cells = <2>;
vcc-supply = <&vdd_io_reg>;
};
/* TVP5146 Analog Video decoder input */
tvp5146@5c {
compatible = "ti,tvp5146m2";
reg = <0x5c>;
};
};
&mcbsp1 {
status = "ok";
#sound-dai-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&mcbsp1_pins>;
};
&mcbsp2 {
status = "ok";
#sound-dai-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&mcbsp2_pins>;
};
&omap3_pmx_core {
mcbsp1_pins: pinmux_mcbsp1_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2190, PIN_OUTPUT | MUX_MODE0) /* mcbsp1_dx.mcbsp1_dx */
OMAP3_CORE1_IOPAD(0x2192, PIN_INPUT | MUX_MODE0) /* mcbsp1_dx.mcbsp1_dr */
OMAP3_CORE1_IOPAD(0x2196, PIN_INPUT | MUX_MODE0) /* mcbsp_clks.mcbsp1_fsx */
OMAP3_CORE1_IOPAD(0x2198, PIN_INPUT | MUX_MODE0) /* mcbsp1_clkx.mcbsp1_clkx */
>;
};
mcbsp2_pins: pinmux_mcbsp2_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_fsx */
OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx.mcbsp2_clkx */
OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr.mcbsp2.dr */
OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx.mcbsp2_dx */
>;
};
};
...@@ -9,6 +9,7 @@ ...@@ -9,6 +9,7 @@
#include "am3517.dtsi" #include "am3517.dtsi"
#include "am3517-som.dtsi" #include "am3517-som.dtsi"
#include "am3517-evm-ui.dtsi"
#include <dt-bindings/input/input.h> #include <dt-bindings/input/input.h>
/ { / {
......
...@@ -1101,7 +1101,7 @@ usb2: usb@483d0000 { ...@@ -1101,7 +1101,7 @@ usb2: usb@483d0000 {
}; };
}; };
qspi: qspi@47900000 { qspi: spi@47900000 {
compatible = "ti,am4372-qspi"; compatible = "ti,am4372-qspi";
reg = <0x47900000 0x100>, reg = <0x47900000 0x100>,
<0x30000000 0x4000000>; <0x30000000 0x4000000>;
......
...@@ -339,16 +339,24 @@ &davinci_mdio { ...@@ -339,16 +339,24 @@ &davinci_mdio {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&davinci_mdio_default>; pinctrl-0 = <&davinci_mdio_default>;
status = "okay"; status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
};
ethphy1: ethernet-phy@1 {
reg = <1>;
};
}; };
&cpsw_emac0 { &cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>; phy-handle = <&ethphy0>;
phy-mode = "rgmii-txid"; phy-mode = "rgmii-txid";
dual_emac_res_vlan = <1>; dual_emac_res_vlan = <1>;
}; };
&cpsw_emac1 { &cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>; phy-handle = <&ethphy1>;
phy-mode = "rgmii-txid"; phy-mode = "rgmii-txid";
dual_emac_res_vlan = <2>; dual_emac_res_vlan = <2>;
}; };
......
...@@ -831,10 +831,14 @@ &davinci_mdio { ...@@ -831,10 +831,14 @@ &davinci_mdio {
pinctrl-0 = <&davinci_mdio_default>; pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>; pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay"; status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
};
}; };
&cpsw_emac0 { &cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>; phy-handle = <&ethphy0>;
phy-mode = "rgmii"; phy-mode = "rgmii";
}; };
......
...@@ -499,10 +499,14 @@ &davinci_mdio { ...@@ -499,10 +499,14 @@ &davinci_mdio {
pinctrl-0 = <&davinci_mdio_default>; pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>; pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay"; status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
};
}; };
&cpsw_emac0 { &cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>; phy-handle = <&ethphy0>;
phy-mode = "rgmii"; phy-mode = "rgmii";
}; };
......
...@@ -799,16 +799,24 @@ &davinci_mdio { ...@@ -799,16 +799,24 @@ &davinci_mdio {
pinctrl-0 = <&davinci_mdio_default>; pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>; pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay"; status = "okay";
ethphy0: ethernet-phy@4 {
reg = <4>;
};
ethphy1: ethernet-phy@5 {
reg = <5>;
};
}; };
&cpsw_emac0 { &cpsw_emac0 {
phy_id = <&davinci_mdio>, <4>; phy-handle = <&ethphy0>;
phy-mode = "rgmii"; phy-mode = "rgmii";
dual_emac_res_vlan = <1>; dual_emac_res_vlan = <1>;
}; };
&cpsw_emac1 { &cpsw_emac1 {
phy_id = <&davinci_mdio>, <5>; phy-handle = <&ethphy1>;
phy-mode = "rgmii"; phy-mode = "rgmii";
dual_emac_res_vlan = <2>; dual_emac_res_vlan = <2>;
}; };
......
...@@ -575,10 +575,14 @@ &davinci_mdio { ...@@ -575,10 +575,14 @@ &davinci_mdio {
pinctrl-0 = <&davinci_mdio_default>; pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>; pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay"; status = "okay";
ethphy0: ethernet-phy@16 {
reg = <16>;
};
}; };
&cpsw_emac0 { &cpsw_emac0 {
phy_id = <&davinci_mdio>, <16>; phy-handle = <&ethphy0>;
phy-mode = "rmii"; phy-mode = "rmii";
}; };
......
...@@ -64,6 +64,82 @@ mmc0-led { ...@@ -64,6 +64,82 @@ mmc0-led {
linux,default-trigger = "mmc0"; linux,default-trigger = "mmc0";
}; };
}; };
idk-leds {
status = "disabled";
compatible = "gpio-leds";
red0-led {
label = "idk:red0";
gpios = <&gpio6 19 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
green0-led {
label = "idk:green0";
gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
blue0-led {
label = "idk:blue0";
gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
red1-led {
label = "idk:red1";
gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
green1-led {
label = "idk:green1";
gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
blue1-led {
label = "idk:blue1";
gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
red2-led {
label = "idk:red2";
gpios = <&gpio7 9 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
green2-led {
label = "idk:green2";
gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
blue2-led {
label = "idk:blue2";
gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
red3-led {
label = "idk:red3";
gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
green3-led {
label = "idk:green3";
gpios = <&gpio7 25 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
blue3-led {
label = "idk:blue3";
gpios = <&gpio7 24 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
}; };
&extcon_usb2 { &extcon_usb2 {
...@@ -71,6 +147,10 @@ &extcon_usb2 { ...@@ -71,6 +147,10 @@ &extcon_usb2 {
vbus-gpio = <&gpio7 22 GPIO_ACTIVE_HIGH>; vbus-gpio = <&gpio7 22 GPIO_ACTIVE_HIGH>;
}; };
&sn65hvs882 {
load-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
};
&mailbox5 { &mailbox5 {
status = "okay"; status = "okay";
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x { mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
...@@ -114,7 +194,3 @@ &mmc2 { ...@@ -114,7 +194,3 @@ &mmc2 {
pinctrl-1 = <&mmc2_pins_hs>; pinctrl-1 = <&mmc2_pins_hs>;
pinctrl-2 = <&mmc2_pins_ddr_rev20 &mmc2_iodelay_ddr_conf>; pinctrl-2 = <&mmc2_pins_ddr_rev20 &mmc2_iodelay_ddr_conf>;
}; };
&cpu0 {
vdd-supply = <&smps12_reg>;
};
...@@ -55,6 +55,82 @@ mmc0-led { ...@@ -55,6 +55,82 @@ mmc0-led {
linux,default-trigger = "mmc0"; linux,default-trigger = "mmc0";
}; };
}; };
idk-leds {
status = "disabled";
compatible = "gpio-leds";
red0-led {
label = "idk:red0";
gpios = <&gpio6 19 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
green0-led {
label = "idk:green0";
gpios = <&gpio3 9 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
blue0-led {
label = "idk:blue0";
gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
red1-led {
label = "idk:red1";
gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
green1-led {
label = "idk:green1";
gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
blue1-led {
label = "idk:blue1";
gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
red2-led {
label = "idk:red2";
gpios = <&gpio7 9 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
green2-led {
label = "idk:green2";
gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
blue2-led {
label = "idk:blue2";
gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
red3-led {
label = "idk:red3";
gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
green3-led {
label = "idk:green3";
gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
blue3-led {
label = "idk:blue3";
gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
}; };
&extcon_usb2 { &extcon_usb2 {
......
...@@ -36,7 +36,3 @@ &mmc2 { ...@@ -36,7 +36,3 @@ &mmc2 {
pinctrl-1 = <&mmc2_pins_hs>; pinctrl-1 = <&mmc2_pins_hs>;
pinctrl-2 = <&mmc2_pins_ddr_rev20>; pinctrl-2 = <&mmc2_pins_ddr_rev20>;
}; };
&cpu0 {
vdd-supply = <&smps12_reg>;
};
...@@ -518,7 +518,7 @@ partition@100000 { ...@@ -518,7 +518,7 @@ partition@100000 {
}; };
/* touch controller */ /* touch controller */
ads7846@0 { touchscreen@1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&ads7846_pins>; pinctrl-0 = <&ads7846_pins>;
...@@ -558,13 +558,13 @@ &mac { ...@@ -558,13 +558,13 @@ &mac {
}; };
&cpsw_emac0 { &cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>; phy-handle = <&ethphy0>;
phy-mode = "rgmii-txid"; phy-mode = "rgmii-txid";
dual_emac_res_vlan = <0>; dual_emac_res_vlan = <0>;
}; };
&cpsw_emac1 { &cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>; phy-handle = <&ethphy1>;
phy-mode = "rgmii-txid"; phy-mode = "rgmii-txid";
dual_emac_res_vlan = <1>; dual_emac_res_vlan = <1>;
}; };
...@@ -573,6 +573,14 @@ &davinci_mdio { ...@@ -573,6 +573,14 @@ &davinci_mdio {
pinctrl-names = "default", "sleep"; pinctrl-names = "default", "sleep";
pinctrl-0 = <&davinci_mdio_pins_default>; pinctrl-0 = <&davinci_mdio_pins_default>;
pinctrl-1 = <&davinci_mdio_pins_sleep>; pinctrl-1 = <&davinci_mdio_pins_sleep>;
ethphy0: ethernet-phy@0 {
reg = <0>;
};
ethphy1: ethernet-phy@1 {
reg = <1>;
};
}; };
&usb2_phy1 { &usb2_phy1 {
......
...@@ -372,17 +372,27 @@ &mac { ...@@ -372,17 +372,27 @@ &mac {
}; };
&cpsw_emac0 { &cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>; phy-handle = <&ethphy0>;
phy-mode = "rgmii"; phy-mode = "rgmii";
dual_emac_res_vlan = <1>; dual_emac_res_vlan = <1>;
}; };
&cpsw_emac1 { &cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>; phy-handle = <&ethphy1>;
phy-mode = "rgmii"; phy-mode = "rgmii";
dual_emac_res_vlan = <2>; dual_emac_res_vlan = <2>;
}; };
&davinci_mdio {
ethphy0: ethernet-phy@0 {
reg = <0>;
};
ethphy1: ethernet-phy@1 {
reg = <1>;
};
};
&usb2_phy1 { &usb2_phy1 {
phy-supply = <&ldousb_reg>; phy-supply = <&ldousb_reg>;
}; };
...@@ -478,3 +488,7 @@ partition@6 { ...@@ -478,3 +488,7 @@ partition@6 {
}; };
}; };
}; };
&cpu0 {
vdd-supply = <&smps12_reg>;
};
...@@ -27,15 +27,25 @@ vmmcsd_fixed: fixedregulator0 { ...@@ -27,15 +27,25 @@ vmmcsd_fixed: fixedregulator0 {
}; };
&cpsw_emac0 { &cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>; phy-handle = <&ethphy0>;
phy-mode = "rgmii"; phy-mode = "rgmii";
}; };
&cpsw_emac1 { &cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>; phy-handle = <&ethphy1>;
phy-mode = "rgmii"; phy-mode = "rgmii";
}; };
&davinci_mdio {
ethphy0: ethernet-phy@0 {
reg = <0>;
};
ethphy1: ethernet-phy@1 {
reg = <1>;
};
};
&gpmc { &gpmc {
ranges = <0 0 0x04000000 0x01000000>; /* CS0: 16MB for NAND */ ranges = <0 0 0x04000000 0x01000000>; /* CS0: 16MB for NAND */
......
...@@ -36,15 +36,25 @@ vmmcsd_fixed: fixedregulator0 { ...@@ -36,15 +36,25 @@ vmmcsd_fixed: fixedregulator0 {
}; };
&cpsw_emac0 { &cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>; phy-handle = <&ethphy0>;
phy-mode = "rgmii"; phy-mode = "rgmii";
}; };
&cpsw_emac1 { &cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>; phy-handle = <&ethphy1>;
phy-mode = "rgmii"; phy-mode = "rgmii";
}; };
&davinci_mdio {
ethphy0: ethernet-phy@0 {
reg = <0>;
};
ethphy1: ethernet-phy@1 {
reg = <1>;
};
};
&mmc1 { &mmc1 {
status = "disabled"; status = "disabled";
}; };
......
...@@ -27,15 +27,25 @@ vmmcsd_fixed: fixedregulator0 { ...@@ -27,15 +27,25 @@ vmmcsd_fixed: fixedregulator0 {
}; };
&cpsw_emac0 { &cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>; phy-handle = <&ethphy0>;
phy-mode = "rgmii"; phy-mode = "rgmii";
}; };
&cpsw_emac1 { &cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>; phy-handle = <&ethphy1>;
phy-mode = "rgmii"; phy-mode = "rgmii";
}; };
&davinci_mdio {
ethphy0: ethernet-phy@0 {
reg = <0>;
};
ethphy1: ethernet-phy@1 {
reg = <1>;
};
};
&gpmc { &gpmc {
ranges = <0 0 0x04000000 0x01000000>; /* CS0: 16MB for NAND */ ranges = <0 0 0x04000000 0x01000000>; /* CS0: 16MB for NAND */
......
...@@ -512,17 +512,27 @@ &mac { ...@@ -512,17 +512,27 @@ &mac {
}; };
&cpsw_emac0 { &cpsw_emac0 {
phy_id = <&davinci_mdio>, <2>; phy-handle = <&ethphy0>;
phy-mode = "rgmii"; phy-mode = "rgmii";
dual_emac_res_vlan = <1>; dual_emac_res_vlan = <1>;
}; };
&cpsw_emac1 { &cpsw_emac1 {
phy_id = <&davinci_mdio>, <3>; phy-handle = <&ethphy1>;
phy-mode = "rgmii"; phy-mode = "rgmii";
dual_emac_res_vlan = <2>; dual_emac_res_vlan = <2>;
}; };
&davinci_mdio {
ethphy0: ethernet-phy@2 {
reg = <2>;
};
ethphy1: ethernet-phy@3 {
reg = <3>;
};
};
&dcan1 { &dcan1 {
status = "ok"; status = "ok";
pinctrl-names = "default", "sleep", "active"; pinctrl-names = "default", "sleep", "active";
......
...@@ -1369,7 +1369,7 @@ mcspi4: spi@480ba000 { ...@@ -1369,7 +1369,7 @@ mcspi4: spi@480ba000 {
status = "disabled"; status = "disabled";
}; };
qspi: qspi@4b300000 { qspi: spi@4b300000 {
compatible = "ti,dra7xxx-qspi"; compatible = "ti,dra7xxx-qspi";
reg = <0x4b300000 0x100>, reg = <0x4b300000 0x100>,
<0x5c000000 0x4000000>; <0x5c000000 0x4000000>;
......
...@@ -203,13 +203,13 @@ &mac { ...@@ -203,13 +203,13 @@ &mac {
}; };
&cpsw_emac0 { &cpsw_emac0 {
phy_id = <&davinci_mdio>, <2>; phy-handle = <&dp83867_0>;
phy-mode = "rgmii-id"; phy-mode = "rgmii-id";
dual_emac_res_vlan = <1>; dual_emac_res_vlan = <1>;
}; };
&cpsw_emac1 { &cpsw_emac1 {
phy_id = <&davinci_mdio>, <3>; phy-handle = <&dp83867_1>;
phy-mode = "rgmii-id"; phy-mode = "rgmii-id";
dual_emac_res_vlan = <2>; dual_emac_res_vlan = <2>;
}; };
......
...@@ -61,13 +61,13 @@ &mac { ...@@ -61,13 +61,13 @@ &mac {
}; };
&cpsw_emac0 { &cpsw_emac0 {
phy_id = <&davinci_mdio>, <2>; phy-handle = <&dp83867_0>;
phy-mode = "rgmii-id"; phy-mode = "rgmii-id";
dual_emac_res_vlan = <1>; dual_emac_res_vlan = <1>;
}; };
&cpsw_emac1 { &cpsw_emac1 {
phy_id = <&davinci_mdio>, <3>; phy-handle = <&dp83867_1>;
phy-mode = "rgmii-id"; phy-mode = "rgmii-id";
dual_emac_res_vlan = <2>; dual_emac_res_vlan = <2>;
}; };
......
...@@ -51,10 +51,16 @@ &mac { ...@@ -51,10 +51,16 @@ &mac {
}; };
&cpsw_emac0 { &cpsw_emac0 {
phy_id = <&davinci_mdio>, <3>; phy-handle = <&ethphy0>;
phy-mode = "rgmii"; phy-mode = "rgmii";
}; };
&davinci_mdio {
ethphy0: ethernet-phy@3 {
reg = <3>;
};
};
&mmc1 { &mmc1 {
pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104"; pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
pinctrl-0 = <&mmc1_pins_default>; pinctrl-0 = <&mmc1_pins_default>;
......
...@@ -375,13 +375,13 @@ &mac { ...@@ -375,13 +375,13 @@ &mac {
}; };
&cpsw_emac0 { &cpsw_emac0 {
phy_id = <&davinci_mdio>, <2>; phy-handle = <&dp83867_0>;
phy-mode = "rgmii-id"; phy-mode = "rgmii-id";
dual_emac_res_vlan = <1>; dual_emac_res_vlan = <1>;
}; };
&cpsw_emac1 { &cpsw_emac1 {
phy_id = <&davinci_mdio>, <3>; phy-handle = <&dp83867_1>;
phy-mode = "rgmii-id"; phy-mode = "rgmii-id";
dual_emac_res_vlan = <2>; dual_emac_res_vlan = <2>;
}; };
......
...@@ -416,7 +416,7 @@ mmc1: mmc@23100000 { ...@@ -416,7 +416,7 @@ mmc1: mmc@23100000 {
clock-names = "fck", "mmchsdb_fck"; clock-names = "fck", "mmchsdb_fck";
}; };
qspi: qspi@2940000 { qspi: spi@2940000 {
compatible = "ti,k2g-qspi", "cdns,qspi-nor"; compatible = "ti,k2g-qspi", "cdns,qspi-nor";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
......
...@@ -114,7 +114,7 @@ i2c2: i2c@48072000 { ...@@ -114,7 +114,7 @@ i2c2: i2c@48072000 {
dma-names = "tx", "rx"; dma-names = "tx", "rx";
}; };
mcspi1: mcspi@48098000 { mcspi1: spi@48098000 {
compatible = "ti,omap2-mcspi"; compatible = "ti,omap2-mcspi";
ti,hwmods = "mcspi1"; ti,hwmods = "mcspi1";
reg = <0x48098000 0x100>; reg = <0x48098000 0x100>;
...@@ -125,7 +125,7 @@ mcspi1: mcspi@48098000 { ...@@ -125,7 +125,7 @@ mcspi1: mcspi@48098000 {
"tx2", "rx2", "tx3", "rx3"; "tx2", "rx2", "tx3", "rx3";
}; };
mcspi2: mcspi@4809a000 { mcspi2: spi@4809a000 {
compatible = "ti,omap2-mcspi"; compatible = "ti,omap2-mcspi";
ti,hwmods = "mcspi2"; ti,hwmods = "mcspi2";
reg = <0x4809a000 0x100>; reg = <0x4809a000 0x100>;
......
...@@ -285,7 +285,7 @@ timer1: timer@49018000 { ...@@ -285,7 +285,7 @@ timer1: timer@49018000 {
ti,timer-alwon; ti,timer-alwon;
}; };
mcspi3: mcspi@480b8000 { mcspi3: spi@480b8000 {
compatible = "ti,omap2-mcspi"; compatible = "ti,omap2-mcspi";
ti,hwmods = "mcspi3"; ti,hwmods = "mcspi3";
reg = <0x480b8000 0x100>; reg = <0x480b8000 0x100>;
......
...@@ -160,10 +160,11 @@ etb@5401b000 { ...@@ -160,10 +160,11 @@ etb@5401b000 {
clocks = <&emu_src_ck>; clocks = <&emu_src_ck>;
clock-names = "apb_pclk"; clock-names = "apb_pclk";
port { in-ports {
etb_in: endpoint { port {
slave-mode; etb_in: endpoint {
remote-endpoint = <&etm_out>; remote-endpoint = <&etm_out>;
};
}; };
}; };
}; };
...@@ -174,9 +175,11 @@ etm@54010000 { ...@@ -174,9 +175,11 @@ etm@54010000 {
clocks = <&emu_src_ck>; clocks = <&emu_src_ck>;
clock-names = "apb_pclk"; clock-names = "apb_pclk";
port { out-ports {
etm_out: endpoint { port {
remote-endpoint = <&etb_in>; etm_out: endpoint {
remote-endpoint = <&etb_in>;
};
}; };
}; };
}; };
......
...@@ -147,10 +147,11 @@ etb@540000000 { ...@@ -147,10 +147,11 @@ etb@540000000 {
clocks = <&emu_src_ck>; clocks = <&emu_src_ck>;
clock-names = "apb_pclk"; clock-names = "apb_pclk";
port { in-ports {
etb_in: endpoint { port {
slave-mode; etb_in: endpoint {
remote-endpoint = <&etm_out>; remote-endpoint = <&etm_out>;
};
}; };
}; };
}; };
...@@ -161,9 +162,11 @@ etm@54010000 { ...@@ -161,9 +162,11 @@ etm@54010000 {
clocks = <&emu_src_ck>; clocks = <&emu_src_ck>;
clock-names = "apb_pclk"; clock-names = "apb_pclk";
port { out-ports {
etm_out: endpoint { port {
remote-endpoint = <&etb_in>; etm_out: endpoint {
remote-endpoint = <&etb_in>;
};
}; };
}; };
}; };
......
This diff is collapsed.
...@@ -9,7 +9,7 @@ ...@@ -9,7 +9,7 @@
#include "omap3-gta04.dtsi" #include "omap3-gta04.dtsi"
/ { / {
model = "Goldelico GTA04A3"; model = "Goldelico GTA04A3/Letux 2804";
}; };
&i2c2 { &i2c2 {
......
...@@ -9,5 +9,5 @@ ...@@ -9,5 +9,5 @@
#include "omap3-gta04.dtsi" #include "omap3-gta04.dtsi"
/ { / {
model = "Goldelico GTA04A4"; model = "Goldelico GTA04A4/Letux 2804";
}; };
/* /*
* Copyright (C) 2014 H. Nikolaus Schaller <hns@goldelico.com> * Copyright (C) 2014-18 H. Nikolaus Schaller <hns@goldelico.com>
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as * it under the terms of the GNU General Public License version 2 as
...@@ -9,9 +9,132 @@ ...@@ -9,9 +9,132 @@
#include "omap3-gta04.dtsi" #include "omap3-gta04.dtsi"
/ { / {
model = "Goldelico GTA04A5"; model = "Goldelico GTA04A5/Letux 2804";
sound { sound {
ti,jack-det-gpio = <&twl_gpio 2 GPIO_ACTIVE_HIGH>; /* GTA04A5 only */ ti,jack-det-gpio = <&twl_gpio 2 GPIO_ACTIVE_HIGH>; /* GTA04A5 only */
};
wlan_en: wlan_en_regulator {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&wlan_pins>;
regulator-name = "wlan-en-regulator";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>; /* GPIO_138 */
startup-delay-us = <70000>;
enable-active-high;
};
pps {
compatible = "pps-gpio";
pinctrl-names = "default";
pinctrl-0 = <&pps_pins>;
gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>; /* GPIN_114 */
};
};
&gpio5 {
irda_en {
gpio-hog;
gpios = <(175-160) GPIO_ACTIVE_HIGH>;
output-high; /* activate gpio_175 to disable IrDA receiver */
};
};
&omap3_pmx_core {
bt_pins: pinmux_bt_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE4) /* mmc2_dat5 = mmc3_dat1 = gpio137 */
>;
};
wlan_pins: pinmux_wlan_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE4) /* mmc2_dat6 = mmc3_dat2 = gpio138 */
>;
};
wlan_irq_pin: pinmux_wlan_irq_pin {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE4) /* mmc2_dat7 = mmc3_dat3 = gpio139 */
>;
};
irda_pins: pinmux_irda {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x21d0, PIN_OUTPUT_PULLUP | MUX_MODE4) /* mcspi1_cs1 = gpio175 */
>;
};
pps_pins: pinmux_pps_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2138, PIN_INPUT | MUX_MODE4) /* gpin114 */
>;
};
};
/*
* for WL183x module see
* http://lxr.free-electrons.com/source/Documentation/devicetree/bindings/net/wireless/ti,wlcore.txt
*/
&wifi_pwrseq {
/delete-property/ reset-gpios;
};
&mmc2 {
vmmc-supply = <&wlan_en>;
bus-width = <4>;
cap-power-off-card;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&wlan_irq_pin>;
#address-cells = <1>;
#size-cells = <0>;
/delete-property/ mmc-pwrseq;
wlcore: wlcore@2 {
compatible = "ti,wl1837";
reg = <2>;
interrupt-parent = <&gpio5>;
interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; /* GPIO_139 */
ref-clock-frequency = <26000000>;
};
};
&i2c2 {
/delete-node/ bmp085@77;
/delete-node/ bma180@41;
/delete-node/ itg3200@68;
/delete-node/ hmc5843@1e;
bmg160@69 {
compatible = "bosch,bmg160";
reg = <0x69>;
};
bmc150@10 {
compatible = "bosch,bmc150_accel";
reg = <0x10>;
};
bmc150@12 {
compatible = "bosch,bmc150_magn";
reg = <0x12>;
};
bme280@76 {
compatible = "bosch,bme280";
reg = <0x76>;
}; };
}; };
/*
* Copyright (C) 2014-18 H. Nikolaus Schaller <hns@goldelico.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include "omap3-gta04a5.dts"
&omap3_pmx_core {
model = "Goldelico GTA04A5/Letux 2804 with OneNAND";
gpmc_pins: pinmux_gpmc_pins {
pinctrl-single,pins = <
/* address lines */
OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0) /* gpmc_a1.gpmc_a1 */
OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0) /* gpmc_a2.gpmc_a2 */
OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0) /* gpmc_a3.gpmc_a3 */
/* data lines, gpmc_d0..d7 not muxable according to TRM */
OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0) /* gpmc_d8.gpmc_d8 */
OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0) /* gpmc_d9.gpmc_d9 */
OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0) /* gpmc_d10.gpmc_d10 */
OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0) /* gpmc_d11.gpmc_d11 */
OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0) /* gpmc_d12.gpmc_d12 */
OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0) /* gpmc_d13.gpmc_d13 */
OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0) /* gpmc_d14.gpmc_d14 */
OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0) /* gpmc_d15.gpmc_d15 */
/*
* gpmc_ncs0, gpmc_nadv_ale, gpmc_noe, gpmc_nwe, gpmc_wait0 not muxable
* according to TRM. OneNAND seems to require PIN_INPUT on clock.
*/
OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs1.gpmc_ncs1 */
OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0) /* gpmc_clk.gpmc_clk */
>;
};
};
&gpmc {
/* switch inherited setup to OneNAND */
ranges = <0 0 0x04000000 0x1000000>; /* CS0: 16MB for OneNAND */
pinctrl-names = "default";
pinctrl-0 = <&gpmc_pins>;
/delete-node/ nand@0,0;
onenand@0,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "ti,omap2-onenand";
reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */
gpmc,sync-read;
gpmc,sync-write;
gpmc,burst-length = <16>;
gpmc,burst-read;
gpmc,burst-wrap;
gpmc,burst-write;
gpmc,device-width = <2>;
gpmc,mux-add-data = <2>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <87>;
gpmc,cs-wr-off-ns = <87>;
gpmc,adv-on-ns = <0>;
gpmc,adv-rd-off-ns = <10>;
gpmc,adv-wr-off-ns = <10>;
gpmc,oe-on-ns = <15>;
gpmc,oe-off-ns = <87>;
gpmc,we-on-ns = <0>;
gpmc,we-off-ns = <87>;
gpmc,rd-cycle-ns = <112>;
gpmc,wr-cycle-ns = <112>;
gpmc,access-ns = <81>;
gpmc,page-burst-access-ns = <15>;
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,wait-monitoring-ns = <0>;
gpmc,clk-activation-ns = <5>;
gpmc,wr-data-mux-bus-ns = <30>;
gpmc,wr-access-ns = <81>;
gpmc,sync-clk-ps = <15000>;
x-loader@0 {
label = "X-Loader";
reg = <0 0x80000>;
};
bootloaders@80000 {
label = "U-Boot";
reg = <0x80000 0x1c0000>;
};
bootloaders_env@240000 {
label = "U-Boot Env";
reg = <0x240000 0x40000>;
};
kernel@280000 {
label = "Kernel";
reg = <0x280000 0x600000>;
};
filesystem@880000 {
label = "File System";
reg = <0x880000 0>; /* 0 = MTDPART_SIZ_FULL */
};
};
};
...@@ -40,7 +40,7 @@ smia_1_1: endpoint { ...@@ -40,7 +40,7 @@ smia_1_1: endpoint {
}; };
&i2c3 { &i2c3 {
ak8975@0f { ak8975@f {
compatible = "asahi-kasei,ak8975"; compatible = "asahi-kasei,ak8975";
reg = <0x0f>; reg = <0x0f>;
}; };
......
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