Commit 9dca4efe authored by Timur Tabi's avatar Timur Tabi Committed by Benjamin Herrenschmidt

powerpc: Add defintion for MSR[GS] to list of MSR bits

Add macros for the GS (guest state) bit to the list of MSR bit definitions.
On PowerPC cores that support embedded hypervisor mode, GS is cleared if
the system is running in hypervisor state (and MSR[PR] is cleared), and set
if it's running in guest state.  See the Power ISA 2.06 specification for
more information.
Signed-off-by: default avatarTimur Tabi <timur@freescale.com>
Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
parent f8ff96db
...@@ -10,6 +10,7 @@ ...@@ -10,6 +10,7 @@
#define __ASM_POWERPC_REG_BOOKE_H__ #define __ASM_POWERPC_REG_BOOKE_H__
/* Machine State Register (MSR) Fields */ /* Machine State Register (MSR) Fields */
#define MSR_GS (1<<28) /* Guest state */
#define MSR_UCLE (1<<26) /* User-mode cache lock enable */ #define MSR_UCLE (1<<26) /* User-mode cache lock enable */
#define MSR_SPE (1<<25) /* Enable SPE */ #define MSR_SPE (1<<25) /* Enable SPE */
#define MSR_DWE (1<<10) /* Debug Wait Enable */ #define MSR_DWE (1<<10) /* Debug Wait Enable */
......
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