Commit 9e91a0ab authored by Russell King's avatar Russell King

[ARM] Move Integrator flash map to driver model.

Since we want to support multiple platforms, we also move the
Integrator flash driver over to the driver model.
parent c2d31305
......@@ -36,6 +36,7 @@
#include <asm/arch/lm.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <asm/mach/irq.h>
#include <asm/mach/map.h>
......@@ -49,6 +50,7 @@
*/
#define VA_IC_BASE IO_ADDRESS(INTEGRATOR_IC_BASE)
#define VA_SC_BASE IO_ADDRESS(INTEGRATOR_SC_BASE)
#define VA_EBI_BASE IO_ADDRESS(INTEGRATOR_EBI_BASE)
#define VA_CMIC_BASE IO_ADDRESS(INTEGRATOR_HDR_BASE) + INTEGRATOR_HDR_IC_OFFSET
/*
......@@ -131,11 +133,85 @@ static void __init ap_init_irq(void)
}
}
/*
* Flash handling.
*/
#define SC_CTRLC (VA_SC_BASE + INTEGRATOR_SC_CTRLC_OFFSET)
#define SC_CTRLS (VA_SC_BASE + INTEGRATOR_SC_CTRLS_OFFSET)
#define EBI_CSR1 (VA_EBI_BASE + INTEGRATOR_EBI_CSR1_OFFSET)
#define EBI_LOCK (VA_EBI_BASE + INTEGRATOR_EBI_LOCK_OFFSET)
static int ap_flash_init(void)
{
u32 tmp;
writel(INTEGRATOR_SC_CTRL_nFLVPPEN | INTEGRATOR_SC_CTRL_nFLWP, SC_CTRLC);
tmp = readl(EBI_CSR1) | INTEGRATOR_EBI_WRITE_ENABLE;
writel(tmp, EBI_CSR1);
if (!(readl(EBI_CSR1) & INTEGRATOR_EBI_WRITE_ENABLE)) {
writel(0xa05f, EBI_LOCK);
writel(tmp, EBI_CSR1);
writel(0, EBI_LOCK);
}
return 0;
}
static void ap_flash_exit(void)
{
u32 tmp;
writel(INTEGRATOR_SC_CTRL_nFLVPPEN | INTEGRATOR_SC_CTRL_nFLWP, SC_CTRLC);
tmp = readl(EBI_CSR1) & ~INTEGRATOR_EBI_WRITE_ENABLE;
writel(tmp, EBI_CSR1);
if (readl(EBI_CSR1) & INTEGRATOR_EBI_WRITE_ENABLE) {
writel(0xa05f, EBI_LOCK);
writel(tmp, EBI_CSR1);
writel(0, EBI_LOCK);
}
}
static void ap_flash_set_vpp(int on)
{
unsigned long reg = on ? SC_CTRLS : SC_CTRLC;
writel(INTEGRATOR_SC_CTRL_nFLVPPEN, reg);
}
static struct flash_platform_data ap_flash_data = {
.map_name = "cfi_probe",
.width = 4,
.init = ap_flash_init,
.exit = ap_flash_exit,
.set_vpp = ap_flash_set_vpp,
};
static struct resource cfi_flash_resource = {
.start = INTEGRATOR_FLASH_BASE,
.end = INTEGRATOR_FLASH_BASE + INTEGRATOR_FLASH_SIZE - 1,
.flags = IORESOURCE_MEM,
};
static struct platform_device cfi_flash_device = {
.name = "armflash",
.id = 0,
.dev = {
.platform_data = &ap_flash_data,
},
.num_resources = 1,
.resource = &cfi_flash_resource,
};
static int __init ap_init(void)
{
unsigned long sc_dec;
int i;
platform_add_device(&cfi_flash_device);
sc_dec = readl(VA_SC_BASE + INTEGRATOR_SC_DEC_OFFSET);
for (i = 0; i < 4; i++) {
struct lm_device *lmdev;
......
......@@ -31,223 +31,181 @@
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/ioport.h>
#include <linux/device.h>
#include <linux/init.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/map.h>
#include <linux/mtd/partitions.h>
#include <asm/mach/flash.h>
#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/system.h>
// board specific stuff - sorry, it should be in arch/arm/mach-*.
#ifdef CONFIG_ARCH_INTEGRATOR
#define FLASH_BASE INTEGRATOR_FLASH_BASE
#define FLASH_SIZE INTEGRATOR_FLASH_SIZE
#define FLASH_PART_SIZE 0x400000
#define SC_CTRLC (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLC_OFFSET)
#define SC_CTRLS (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLS_OFFSET)
#define EBI_CSR1 (IO_ADDRESS(INTEGRATOR_EBI_BASE) + INTEGRATOR_EBI_CSR1_OFFSET)
#define EBI_LOCK (IO_ADDRESS(INTEGRATOR_EBI_BASE) + INTEGRATOR_EBI_LOCK_OFFSET)
/*
* Initialise the flash access systems:
* - Disable VPP
* - Assert WP
* - Set write enable bit in EBI reg
*/
static void armflash_flash_init(void)
{
unsigned int tmp;
__raw_writel(INTEGRATOR_SC_CTRL_nFLVPPEN | INTEGRATOR_SC_CTRL_nFLWP, SC_CTRLC);
tmp = __raw_readl(EBI_CSR1) | INTEGRATOR_EBI_WRITE_ENABLE;
__raw_writel(tmp, EBI_CSR1);
if (!(__raw_readl(EBI_CSR1) & INTEGRATOR_EBI_WRITE_ENABLE)) {
__raw_writel(0xa05f, EBI_LOCK);
__raw_writel(tmp, EBI_CSR1);
__raw_writel(0, EBI_LOCK);
}
}
/*
* Shutdown the flash access systems:
* - Disable VPP
* - Assert WP
* - Clear write enable bit in EBI reg
*/
static void armflash_flash_exit(void)
{
unsigned int tmp;
__raw_writel(INTEGRATOR_SC_CTRL_nFLVPPEN | INTEGRATOR_SC_CTRL_nFLWP, SC_CTRLC);
/*
* Clear the write enable bit in system controller EBI register.
*/
tmp = __raw_readl(EBI_CSR1) & ~INTEGRATOR_EBI_WRITE_ENABLE;
__raw_writel(tmp, EBI_CSR1);
if (__raw_readl(EBI_CSR1) & INTEGRATOR_EBI_WRITE_ENABLE) {
__raw_writel(0xa05f, EBI_LOCK);
__raw_writel(tmp, EBI_CSR1);
__raw_writel(0, EBI_LOCK);
}
}
static void armflash_flash_wp(int on)
{
unsigned int reg;
if (on)
reg = SC_CTRLC;
else
reg = SC_CTRLS;
__raw_writel(INTEGRATOR_SC_CTRL_nFLWP, reg);
}
static void armflash_set_vpp(struct map_info *map, int on)
{
unsigned int reg;
if (on)
reg = SC_CTRLS;
else
reg = SC_CTRLC;
__raw_writel(INTEGRATOR_SC_CTRL_nFLVPPEN, reg);
}
#endif
#ifdef CONFIG_ARCH_P720T
#define FLASH_BASE (0x04000000)
#define FLASH_SIZE (64*1024*1024)
#endif
#define FLASH_PART_SIZE (4*1024*1024)
#define FLASH_BLOCK_SIZE (128*1024)
struct armflash_info {
struct flash_platform_data *plat;
struct resource *res;
struct mtd_partition *parts;
struct mtd_info *mtd;
struct map_info map;
};
static void armflash_flash_init(void)
static void armflash_set_vpp(struct map_info *map, int on)
{
}
struct armflash_info *info = container_of(map, struct armflash_info, map);
static void armflash_flash_exit(void)
{
if (info->plat && info->plat->set_vpp)
info->plat->set_vpp(on);
}
static void armflash_flash_wp(int on)
{
}
static const char *probes[] = { "RedBoot", "afs", NULL };
static void armflash_set_vpp(struct map_info *map, int on)
static int armflash_probe(struct device *_dev)
{
}
#endif
struct platform_device *dev = to_platform_device(_dev);
struct flash_platform_data *plat = dev->dev.platform_data;
struct resource *res = dev->resource;
unsigned int size = res->end - res->start + 1;
struct armflash_info *info;
int err;
void *base;
info = kmalloc(sizeof(struct armflash_info), GFP_KERNEL);
if (!info) {
err = -ENOMEM;
goto out;
}
static struct map_info armflash_map =
{
.name = "AFS",
.set_vpp = armflash_set_vpp,
.phys = FLASH_BASE,
};
memset(info, 0, sizeof(struct armflash_info));
static struct mtd_info *mtd;
static struct mtd_partition *parts;
static const char *probes[] = { "RedBoot", "afs", NULL };
info->plat = plat;
if (plat && plat->init) {
err = plat->init();
if (err)
goto no_resource;
}
static int __init armflash_cfi_init(void *base, u_int size)
{
int ret;
info->res = request_mem_region(res->start, size, "armflash");
if (!info->res) {
err = -EBUSY;
goto no_resource;
}
armflash_flash_init();
armflash_flash_wp(1);
base = ioremap(res->start, size);
if (!base) {
err = -ENOMEM;
goto no_mem;
}
/*
* look for CFI based flash parts fitted to this board
*/
armflash_map.size = size;
armflash_map.buswidth = 4;
armflash_map.virt = (unsigned long) base;
info->map.size = size;
info->map.buswidth = plat->width;
info->map.phys = res->start;
info->map.virt = (unsigned long) base;
info->map.name = dev->dev.bus_id;
info->map.set_vpp = armflash_set_vpp;
simple_map_init(&armflash_map);
simple_map_init(&info->map);
/*
* Also, the CFI layer automatically works out what size
* of chips we have, and does the necessary identification
* for us automatically.
*/
mtd = do_map_probe("cfi_probe", &armflash_map);
if (!mtd)
return -ENXIO;
mtd->owner = THIS_MODULE;
ret = parse_mtd_partitions(mtd, probes, &parts, (void *)0);
if (ret > 0) {
ret = add_mtd_partitions(mtd, parts, ret);
if (ret)
printk(KERN_ERR "mtd partition registration "
"failed: %d\n", ret);
info->mtd = do_map_probe(plat->map_name, &info->map);
if (!info->mtd) {
err = -ENXIO;
goto no_device;
}
info->mtd->owner = THIS_MODULE;
err = parse_mtd_partitions(info->mtd, probes, &info->parts, 0);
if (err > 0) {
err = add_mtd_partitions(info->mtd, info->parts, err);
if (err)
printk(KERN_ERR
"mtd partition registration failed: %d\n", err);
}
if (err == 0)
dev_set_drvdata(&dev->dev, info);
/*
* If we got an error, free all resources.
*/
if (ret < 0) {
del_mtd_partitions(mtd);
map_destroy(mtd);
if (err < 0) {
if (info->mtd) {
del_mtd_partitions(info->mtd);
map_destroy(info->mtd);
}
if (info->parts)
kfree(info->parts);
no_device:
iounmap(base);
no_mem:
release_mem_region(res->start, size);
no_resource:
if (plat && plat->exit)
plat->exit();
kfree(info);
}
return ret;
out:
return err;
}
static void armflash_cfi_exit(void)
static int armflash_remove(struct device *_dev)
{
if (mtd) {
del_mtd_partitions(mtd);
map_destroy(mtd);
}
if (parts)
kfree(parts);
}
struct platform_device *dev = to_platform_device(_dev);
struct armflash_info *info = dev_get_drvdata(&dev->dev);
static int __init armflash_init(void)
{
int err = -EBUSY;
void *base;
dev_set_drvdata(&dev->dev, NULL);
if (request_mem_region(FLASH_BASE, FLASH_SIZE, "flash") == NULL)
goto out;
if (info) {
if (info->mtd) {
del_mtd_partitions(info->mtd);
map_destroy(info->mtd);
}
if (info->parts)
kfree(info->parts);
base = ioremap(FLASH_BASE, FLASH_SIZE);
err = -ENOMEM;
if (base == NULL)
goto release;
iounmap((void *)info->map.virt);
release_resource(info->res);
kfree(info->res);
err = armflash_cfi_init(base, FLASH_SIZE);
if (err) {
iounmap(base);
release:
release_mem_region(FLASH_BASE, FLASH_SIZE);
if (info->plat && info->plat->exit)
info->plat->exit();
kfree(info);
}
out:
return err;
return 0;
}
static struct device_driver armflash_driver = {
.name = "armflash",
.bus = &platform_bus_type,
.probe = armflash_probe,
.remove = armflash_remove,
};
static int __init armflash_init(void)
{
return driver_register(&armflash_driver);
}
static void __exit armflash_exit(void)
{
armflash_cfi_exit();
iounmap((void *)armflash_map.virt);
release_mem_region(FLASH_BASE, FLASH_SIZE);
armflash_flash_exit();
driver_unregister(&armflash_driver);
}
module_init(armflash_init);
......
/*
* linux/include/asm-arm/mach/flash.h
*
* Copyright (C) 2003 Russell King, All Rights Reserved.
*/
#ifndef ASMARM_MACH_FLASH_H
#define ASMAMR_MACH_FLASH_H
struct mtd_partition;
struct flash_platform_data {
const char *map_name;
int width;
int (*init)(void);
void (*exit)(void);
void (*set_vpp)(int on);
};
#endif
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