Commit a0136c28 authored by Thomas Bogendoerfer's avatar Thomas Bogendoerfer

MIPS: sibyte: Remove Sibyte CARMEL and CRHINE board support

Looks like these boards were nether in active use, so let's remove them.
Signed-off-by: default avatarThomas Bogendoerfer <tsbogend@alpha.franken.de>
parent b984d7b5
...@@ -794,24 +794,6 @@ config SGI_IP32 ...@@ -794,24 +794,6 @@ config SGI_IP32
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If you want this kernel to run on SGI O2 workstation, say Y here. If you want this kernel to run on SGI O2 workstation, say Y here.
config SIBYTE_CRHINE
bool "Sibyte BCM91120C-CRhine"
select BOOT_ELF32
select SIBYTE_BCM1120
select SWAP_IO_SPACE
select SYS_HAS_CPU_SB1
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_LITTLE_ENDIAN
config SIBYTE_CARMEL
bool "Sibyte BCM91120x-Carmel"
select BOOT_ELF32
select SIBYTE_BCM1120
select SWAP_IO_SPACE
select SYS_HAS_CPU_SB1
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_LITTLE_ENDIAN
config SIBYTE_CRHONE config SIBYTE_CRHONE
bool "Sibyte BCM91125C-CRhone" bool "Sibyte BCM91125C-CRhone"
select BOOT_ELF32 select BOOT_ELF32
......
...@@ -7,7 +7,7 @@ ...@@ -7,7 +7,7 @@
#define _SIBYTE_BOARD_H #define _SIBYTE_BOARD_H
#if defined(CONFIG_SIBYTE_SWARM) || defined(CONFIG_SIBYTE_CRHONE) || \ #if defined(CONFIG_SIBYTE_SWARM) || defined(CONFIG_SIBYTE_CRHONE) || \
defined(CONFIG_SIBYTE_CRHINE) || defined(CONFIG_SIBYTE_LITTLESUR) defined(CONFIG_SIBYTE_LITTLESUR)
#include <asm/sibyte/swarm.h> #include <asm/sibyte/swarm.h>
#endif #endif
...@@ -15,10 +15,6 @@ ...@@ -15,10 +15,6 @@
#include <asm/sibyte/sentosa.h> #include <asm/sibyte/sentosa.h>
#endif #endif
#ifdef CONFIG_SIBYTE_CARMEL
#include <asm/sibyte/carmel.h>
#endif
#ifdef CONFIG_SIBYTE_BIGSUR #ifdef CONFIG_SIBYTE_BIGSUR
#include <asm/sibyte/bigsur.h> #include <asm/sibyte/bigsur.h>
#endif #endif
......
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Copyright (C) 2002 Broadcom Corporation
*/
#ifndef __ASM_SIBYTE_CARMEL_H
#define __ASM_SIBYTE_CARMEL_H
#include <asm/sibyte/sb1250.h>
#include <asm/sibyte/sb1250_int.h>
#define SIBYTE_BOARD_NAME "Carmel"
#define GPIO_PHY_INTERRUPT 2
#define GPIO_NONMASKABLE_INT 3
#define GPIO_CF_INSERTED 6
#define GPIO_MONTEREY_RESET 7
#define GPIO_QUADUART_INT 8
#define GPIO_CF_INT 9
#define GPIO_FPGA_CCLK 10
#define GPIO_FPGA_DOUT 11
#define GPIO_FPGA_DIN 12
#define GPIO_FPGA_PGM 13
#define GPIO_FPGA_DONE 14
#define GPIO_FPGA_INIT 15
#define LEDS_CS 2
#define LEDS_PHYS 0x100C0000
#define MLEDS_CS 3
#define MLEDS_PHYS 0x100A0000
#define UART_CS 4
#define UART_PHYS 0x100D0000
#define ARAVALI_CS 5
#define ARAVALI_PHYS 0x11000000
#define IDE_CS 6
#define IDE_PHYS 0x100B0000
#define ARAVALI2_CS 7
#define ARAVALI2_PHYS 0x100E0000
#if defined(CONFIG_SIBYTE_CARMEL)
#define K_GPIO_GB_IDE 9
#define K_INT_GB_IDE (K_INT_GPIO_0 + K_GPIO_GB_IDE)
#endif
#endif /* __ASM_SIBYTE_CARMEL_H */
...@@ -24,11 +24,6 @@ ...@@ -24,11 +24,6 @@
#define SIBYTE_HAVE_PCMCIA 0 #define SIBYTE_HAVE_PCMCIA 0
#define SIBYTE_HAVE_IDE 0 #define SIBYTE_HAVE_IDE 0
#endif #endif
#ifdef CONFIG_SIBYTE_CRHINE
#define SIBYTE_BOARD_NAME "BCM91120C (CRhine)"
#define SIBYTE_HAVE_PCMCIA 0
#define SIBYTE_HAVE_IDE 0
#endif
/* Generic bus chip selects */ /* Generic bus chip selects */
#define LEDS_CS 3 #define LEDS_CS 3
......
...@@ -10,15 +10,6 @@ config SIBYTE_SB1250 ...@@ -10,15 +10,6 @@ config SIBYTE_SB1250
select SIBYTE_SB1xxx_SOC select SIBYTE_SB1xxx_SOC
select SYS_SUPPORTS_SMP select SYS_SUPPORTS_SMP
config SIBYTE_BCM1120
bool
select CEVT_SB1250
select CSRC_SB1250
select IRQ_MIPS_CPU
select SIBYTE_BCM112X
select SIBYTE_HAS_ZBUS_PROFILING
select SIBYTE_SB1xxx_SOC
config SIBYTE_BCM1125 config SIBYTE_BCM1125
bool bool
select CEVT_SB1250 select CEVT_SB1250
......
...@@ -10,15 +10,11 @@ obj-$(CONFIG_SIBYTE_BCM1x80) += bcm1480/ ...@@ -10,15 +10,11 @@ obj-$(CONFIG_SIBYTE_BCM1x80) += bcm1480/
obj-$(CONFIG_SIBYTE_BCM1x80) += common/ obj-$(CONFIG_SIBYTE_BCM1x80) += common/
# #
# Sibyte BCM91120x (Carmel) board
# Sibyte BCM91120C (CRhine) board
# Sibyte BCM91125C (CRhone) board # Sibyte BCM91125C (CRhone) board
# Sibyte BCM91125E (Rhone) board # Sibyte BCM91125E (Rhone) board
# Sibyte SWARM board # Sibyte SWARM board
# Sibyte BCM91x80 (BigSur) board # Sibyte BCM91x80 (BigSur) board
# #
obj-$(CONFIG_SIBYTE_CARMEL) += swarm/
obj-$(CONFIG_SIBYTE_CRHINE) += swarm/
obj-$(CONFIG_SIBYTE_CRHONE) += swarm/ obj-$(CONFIG_SIBYTE_CRHONE) += swarm/
obj-$(CONFIG_SIBYTE_RHONE) += swarm/ obj-$(CONFIG_SIBYTE_RHONE) += swarm/
obj-$(CONFIG_SIBYTE_SENTOSA) += swarm/ obj-$(CONFIG_SIBYTE_SENTOSA) += swarm/
......
...@@ -18,16 +18,12 @@ cflags-$(CONFIG_SIBYTE_BCM1x80) += \ ...@@ -18,16 +18,12 @@ cflags-$(CONFIG_SIBYTE_BCM1x80) += \
-DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
# #
# Sibyte BCM91120x (Carmel) board
# Sibyte BCM91120C (CRhine) board
# Sibyte BCM91125C (CRhone) board # Sibyte BCM91125C (CRhone) board
# Sibyte BCM91125E (Rhone) board # Sibyte BCM91125E (Rhone) board
# Sibyte BCM91250A (SWARM) board # Sibyte BCM91250A (SWARM) board
# Sibyte BCM91250C2 (LittleSur) board # Sibyte BCM91250C2 (LittleSur) board
# Sibyte BCM91x80 (BigSur) board # Sibyte BCM91x80 (BigSur) board
# #
load-$(CONFIG_SIBYTE_CARMEL) := 0xffffffff80100000
load-$(CONFIG_SIBYTE_CRHINE) := 0xffffffff80100000
load-$(CONFIG_SIBYTE_CRHONE) := 0xffffffff80100000 load-$(CONFIG_SIBYTE_CRHONE) := 0xffffffff80100000
load-$(CONFIG_SIBYTE_RHONE) := 0xffffffff80100000 load-$(CONFIG_SIBYTE_RHONE) := 0xffffffff80100000
load-$(CONFIG_SIBYTE_SENTOSA) := 0xffffffff80100000 load-$(CONFIG_SIBYTE_SENTOSA) := 0xffffffff80100000
......
...@@ -146,12 +146,6 @@ void __init plat_mem_setup(void) ...@@ -146,12 +146,6 @@ void __init plat_mem_setup(void)
#ifdef LEDS_PHYS #ifdef LEDS_PHYS
#ifdef CONFIG_SIBYTE_CARMEL
/* XXXKW need to detect Monterey/LittleSur/etc */
#undef LEDS_PHYS
#define LEDS_PHYS MLEDS_PHYS
#endif
void setleds(char *str) void setleds(char *str)
{ {
void *reg; void *reg;
......
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