[PATCH] (3/4) eicon iomem annotations and fixes

 * new helpers - READ_BYTE() and WRITE_BYTE().  On Linux they are
   needed, since direct access to iomem pointers is not allowed (and
   does not work on some architectures).
 * memcpy() to/from iomem is not allowed on Linux (same story).

Proper primitives are memcpy_toio() and memcpy_fromio().  Several places
misused memcpy(); switched to memcpy_{to,from}io().
Signed-off-by: Armin Schindler <armin@melware.de>
Signed-off-by: Al Viro <viro@parcelfarce.linux.theplanet.co.uk>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

drivers/isdn/hardware/eicon/io.c

@@ -596,7 +596,7 @@ byte mem_in (ADAPTER *a, void *addr)
 {
  byte val;
  volatile byte __iomem *Base = DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io);
- val = *(Base + (unsigned long)addr);
+ val = READ_BYTE(Base + (unsigned long)addr);
  DIVA_OS_MEM_DETACH_RAM((PISDN_ADAPTER)a->io, Base);
  return (val);
 }
@@ -620,7 +620,7 @@ void mem_in_dw (ADAPTER *a, void *addr, dword* data, int dwords)
 void mem_in_buffer (ADAPTER *a, void *addr, void *buffer, word length)
 {
  volatile byte __iomem *Base = DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io);
- memcpy (buffer, (void *)(Base + (unsigned long)addr), length);
+ memcpy_fromio(buffer, (Base + (unsigned long)addr), length);
  DIVA_OS_MEM_DETACH_RAM((PISDN_ADAPTER)a->io, Base);
 }
 void mem_look_ahead (ADAPTER *a, PBUFFER *RBuffer, ENTITY *e)
@@ -634,7 +634,7 @@ void mem_look_ahead (ADAPTER *a, PBUFFER *RBuffer, ENTITY *e)
 void mem_out (ADAPTER *a, void *addr, byte data)
 {
  volatile byte __iomem *Base = DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io);
- *(Base + (unsigned long)addr) = data ;
+ WRITE_BYTE(Base + (unsigned long)addr, data);
  DIVA_OS_MEM_DETACH_RAM((PISDN_ADAPTER)a->io, Base);
 }
 void mem_outw (ADAPTER *a, void *addr, word data)
@@ -656,14 +656,14 @@ void mem_out_dw (ADAPTER *a, void *addr, const dword* data, int dwords)
 void mem_out_buffer (ADAPTER *a, void *addr, void *buffer, word length)
 {
  volatile byte __iomem * Base = DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io);
- memcpy ((void *)(Base + (unsigned long)addr), buffer, length) ;
+ memcpy_toio((Base + (unsigned long)addr), buffer, length) ;
  DIVA_OS_MEM_DETACH_RAM((PISDN_ADAPTER)a->io, Base);
 }
 void mem_inc (ADAPTER *a, void *addr)
 {
  volatile byte __iomem *Base = DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io);
- byte  x = *(Base + (unsigned long)addr);
- *(Base + (unsigned long)addr) = x + 1 ;
+ byte  x = READ_BYTE(Base + (unsigned long)addr);
+ WRITE_BYTE(Base + (unsigned long)addr, x + 1);
  DIVA_OS_MEM_DETACH_RAM((PISDN_ADAPTER)a->io, Base);
 }
 /*------------------------------------------------------------------*/

drivers/isdn/hardware/eicon/os_4bri.c

@@ -424,7 +424,7 @@ int diva_4bri_init_card(diva_os_xdi_adapter_t * a)
 	   reset contains the base address for the PLX 9054 register set
 	 */
 	p = DIVA_OS_MEM_ATTACH_RESET(&a->xdi_adapter);
-	p[PLX9054_INTCSR] = 0x00;	/* disable PCI interrupts */
+	WRITE_BYTE(&p[PLX9054_INTCSR], 0x00);	/* disable PCI interrupts */
 	DIVA_OS_MEM_DETACH_RESET(&a->xdi_adapter, p);
 
 	/*
@@ -796,7 +796,7 @@ diva_4bri_cmd_card_proc(struct _diva_os_xdi_adapter *a,
 						src += cmd->command_data.read_sdram.offset;
 
 						while (len--) {
-							*dst++ = *src++;
+							*dst++ = READ_BYTE(src++);
 						}
 						DIVA_OS_MEM_DETACH_ADDRESS(&a->xdi_adapter, p);
 						a->xdi_mbox.status = DIVA_XDI_MBOX_BUSY;
@@ -922,7 +922,7 @@ diva_4bri_write_sdram_block(PISDN_ADAPTER IoAdapter,
 	mem += address;
 
 	while (length--) {
-		*mem++ = *data++;
+		WRITE_BYTE(mem++, *data++);
 	}
 
 	DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, p);
@@ -1019,7 +1019,7 @@ static int check_qBri_interrupt(PISDN_ADAPTER IoAdapter)
 		return (-1);
 
 	p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter);
-	p[PLX9054_INTCSR] = PLX9054_INT_ENABLE;
+	WRITE_BYTE(&p[PLX9054_INTCSR], PLX9054_INT_ENABLE);
 	DIVA_OS_MEM_DETACH_RESET(IoAdapter, p);
 	/*
 	   interrupt test
@@ -1047,7 +1047,7 @@ static int check_qBri_interrupt(PISDN_ADAPTER IoAdapter)
 	DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p);
 
 	p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter);
-	p[PLX9054_INTCSR] = PLX9054_INT_ENABLE;
+	WRITE_BYTE(&p[PLX9054_INTCSR], PLX9054_INT_ENABLE);
 	DIVA_OS_MEM_DETACH_RESET(IoAdapter, p);
 
 	diva_os_wait(100);

drivers/isdn/hardware/eicon/os_pri.c

@@ -419,8 +419,9 @@ diva_pri_write_sdram_block(PISDN_ADAPTER IoAdapter,
 	}
 	mem += address;
 
+	/* memcpy_toio(), maybe? */
 	while (length--) {
-		*mem++ = *data++;
+		WRITE_BYTE(mem++, *data++);
 	}
 
 	DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, p);
@@ -737,7 +738,7 @@ diva_pri_cmd_card_proc(struct _diva_os_xdi_adapter *a,
 						src += cmd->command_data.read_sdram.offset;
 
 						while (len--) {
-							*dst++ = *src++;
+							*dst++ = READ_BYTE(src++);
 						}
 						a->xdi_mbox.status = DIVA_XDI_MBOX_BUSY;
 						DIVA_OS_MEM_DETACH_ADDRESS(&a->xdi_adapter, p);
@@ -766,16 +767,18 @@ static int pri_get_serial_number(diva_os_xdi_adapter_t * a)
 	dword len = sizeof(data);
 	volatile byte __iomem *config;
 	volatile byte __iomem *flash;
+	byte c;
 
 /*
  *  First set some GT6401x config registers before accessing the BOOT-ROM
  */
  	config = DIVA_OS_MEM_ATTACH_CONFIG(&a->xdi_adapter);
-	if (!(config[0xc3c] & 0x08)) {
-		config[0xc3c] |= 0x08;	/* Base Address enable register */
+	c = READ_BYTE(&config[0xc3c]);
+	if (!(c & 0x08)) {
+		WRITE_BYTE(&config[0xc3c], c);	/* Base Address enable register */
 	}
-	config[LOW_BOOTCS_DREG] = 0x00;
-	config[HI_BOOTCS_DREG] = 0xFF;
+	WRITE_BYTE(&config[LOW_BOOTCS_DREG], 0x00);
+	WRITE_BYTE(&config[HI_BOOTCS_DREG], 0xFF);
  	DIVA_OS_MEM_DETACH_CONFIG(&a->xdi_adapter, config);
 /*
  *  Read only the last 64 bytes of manufacturing data
@@ -783,13 +786,13 @@ static int pri_get_serial_number(diva_os_xdi_adapter_t * a)
 	memset(data, '\0', len);
  	flash = DIVA_OS_MEM_ATTACH_PROM(&a->xdi_adapter);
 	for (i = 0; i < len; i++) {
-		data[i] = flash[0x8000 - len + i];
+		data[i] = READ_BYTE(&flash[0x8000 - len + i]);
 	}
  	DIVA_OS_MEM_DETACH_PROM(&a->xdi_adapter, flash);
 
  	config = DIVA_OS_MEM_ATTACH_CONFIG(&a->xdi_adapter);
-	config[LOW_BOOTCS_DREG] = 0xFC;	/* Disable FLASH EPROM access */
-	config[HI_BOOTCS_DREG] = 0xFF;
+	WRITE_BYTE(&config[LOW_BOOTCS_DREG], 0xFC);	/* Disable FLASH EPROM access */
+	WRITE_BYTE(&config[HI_BOOTCS_DREG], 0xFF);
  	DIVA_OS_MEM_DETACH_CONFIG(&a->xdi_adapter, config);
 
 	if (memcmp(&data[48], "DIVAserverPR", 12)) {
@@ -972,7 +975,7 @@ static dword diva_pri_detect_dsps(diva_os_xdi_adapter_t * a)
 	}
 
 	p = DIVA_OS_MEM_ATTACH_RESET(&a->xdi_adapter);
-	*(volatile byte *) p = _MP_RISC_RESET | _MP_DSP_RESET;
+	WRITE_BYTE(p, _MP_RISC_RESET | _MP_DSP_RESET);
 	DIVA_OS_MEM_DETACH_RESET(&a->xdi_adapter, p);
 	diva_os_wait(5);
 
@@ -999,7 +1002,7 @@ static dword diva_pri_detect_dsps(diva_os_xdi_adapter_t * a)
 	DIVA_OS_MEM_DETACH_CONTROL(&a->xdi_adapter, base);
 
 	p = DIVA_OS_MEM_ATTACH_RESET(&a->xdi_adapter);
-	*(volatile byte *) p = _MP_RISC_RESET | _MP_LED1 | _MP_LED2;
+	WRITE_BYTE(p, _MP_RISC_RESET | _MP_LED1 | _MP_LED2);
 	DIVA_OS_MEM_DETACH_RESET(&a->xdi_adapter, p);
 	diva_os_wait(5);
 

drivers/isdn/hardware/eicon/platform.h

@@ -339,9 +339,11 @@ diva_os_atomic_decrement(diva_os_atomic_t* pv)
 ** If only...  In some cases we did use them for endianness conversion;
 ** unfortunately, other uses were real iomem accesses.
 */
+#define READ_BYTE(addr)   readb(addr)
 #define READ_WORD(addr)   readw(addr)
 #define READ_DWORD(addr)  readl(addr)
 
+#define WRITE_BYTE(addr,v)  writeb(v,addr)
 #define WRITE_WORD(addr,v)  writew(v,addr)
 #define WRITE_DWORD(addr,v) writel(v,addr)
 

drivers/isdn/hardware/eicon/s_4bri.c

@@ -83,7 +83,7 @@ static void qBri_cpu_trapped (PISDN_ADAPTER IoAdapter) {
 		size = offset + (IoAdapter->MemorySize >> factor) - regs[0] ;
 		if ( size > MAX_XLOG_SIZE )
 			size = MAX_XLOG_SIZE ;
-		memcpy (Xlog, &base[regs[0]], size) ;
+		memcpy_fromio (Xlog, &base[regs[0]], size) ;
 		xlogDesc.buf = Xlog ;
 		xlogDesc.cnt = READ_WORD(&base[regs[1] & (IoAdapter->MemorySize - 1)]) ;
 		xlogDesc.out = READ_WORD(&base[regs[2] & (IoAdapter->MemorySize - 1)]) ;
@@ -166,7 +166,7 @@ static void stop_qBri_hardware (PISDN_ADAPTER IoAdapter) {
 	DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p);
 	
 	p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter);
-	p[PLX9054_INTCSR] = 0x00 ;	/* disable PCI interrupts */
+	WRITE_BYTE(&p[PLX9054_INTCSR], 0x00);	/* disable PCI interrupts */
 	DIVA_OS_MEM_DETACH_RESET(IoAdapter, p);
 	
 	p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
@@ -874,7 +874,7 @@ static int qBri_ISR (struct _ISDN_ADAPTER* IoAdapter) {
 
 	p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter);
 
-	if ( !(p[PLX9054_INTCSR] & 0x80) ) {
+	if ( !(READ_BYTE(&p[PLX9054_INTCSR]) & 0x80) ) {
 		DIVA_OS_MEM_DETACH_RESET(IoAdapter, p);
 		return (0) ;
 	}
@@ -917,7 +917,7 @@ static void disable_qBri_interrupt (PISDN_ADAPTER IoAdapter) {
  *	clear interrupt line (reset Local Interrupt Test Register)
  */
 	p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter);
-	p[PLX9054_INTCSR] = 0x00 ;	/* disable PCI interrupts */
+	WRITE_BYTE(&p[PLX9054_INTCSR], 0x00);	/* disable PCI interrupts */
 	DIVA_OS_MEM_DETACH_RESET(IoAdapter, p);
 
 	p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);

drivers/isdn/hardware/eicon/s_pri.c

@@ -75,7 +75,7 @@ static void pri_cpu_trapped (PISDN_ADAPTER IoAdapter) {
   size = IoAdapter->MemorySize - regs[0] ;
   if ( size > MAX_XLOG_SIZE )
    size = MAX_XLOG_SIZE ;
-  memcpy (Xlog, &base[regs[0]], size) ;
+  memcpy_fromio(Xlog, &base[regs[0]], size) ;
   xlogDesc.buf = Xlog ;
   xlogDesc.cnt = READ_WORD(&base[regs[1] & (IoAdapter->MemorySize - 1)]) ;
   xlogDesc.out = READ_WORD(&base[regs[2] & (IoAdapter->MemorySize - 1)]) ;
@@ -90,9 +90,9 @@ static void pri_cpu_trapped (PISDN_ADAPTER IoAdapter) {
   ------------------------------------------------------------------------- */
 static void reset_pri_hardware (PISDN_ADAPTER IoAdapter) {
  byte __iomem *p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter);
- *p = _MP_RISC_RESET | _MP_LED1 | _MP_LED2 ;
+ WRITE_BYTE(p, _MP_RISC_RESET | _MP_LED1 | _MP_LED2);
  diva_os_wait (50) ;
- *p = 0x00 ;
+ WRITE_BYTE(p, 0x00);
  diva_os_wait (50) ;
  DIVA_OS_MEM_DETACH_RESET(IoAdapter, p);
 }
@@ -103,8 +103,8 @@ static void stop_pri_hardware (PISDN_ADAPTER IoAdapter) {
  dword i;
  byte __iomem *p;
  dword volatile __iomem *cfgReg = (void __iomem *)DIVA_OS_MEM_ATTACH_CFG(IoAdapter);
- cfgReg[3] = 0x00000000 ;
- cfgReg[1] = 0x00000000 ;
+ WRITE_DWORD(&cfgReg[3], 0);
+ WRITE_DWORD(&cfgReg[1], 0);
  DIVA_OS_MEM_DETACH_CFG(IoAdapter, cfgReg);
  IoAdapter->a.ram_out (&IoAdapter->a, &RAM->SWReg, SWREG_HALT_CPU) ;
  i = 0 ;
@@ -119,7 +119,7 @@ static void stop_pri_hardware (PISDN_ADAPTER IoAdapter) {
  DIVA_OS_MEM_DETACH_CFG(IoAdapter, cfgReg);
  diva_os_wait (1) ;
  p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter);
- *p = _MP_RISC_RESET | _MP_LED1 | _MP_LED2 ;
+ WRITE_BYTE(p, _MP_RISC_RESET | _MP_LED1 | _MP_LED2);
  DIVA_OS_MEM_DETACH_RESET(IoAdapter, p);
 }
 #if !defined(DIVA_USER_MODE_CARD_CONFIG) /* { */
@@ -513,8 +513,8 @@ static int pri_ISR (struct _ISDN_ADAPTER* IoAdapter) {
   ------------------------------------------------------------------------- */
 static void disable_pri_interrupt (PISDN_ADAPTER IoAdapter) {
  dword volatile __iomem *cfgReg = (dword volatile __iomem *)DIVA_OS_MEM_ATTACH_CFG(IoAdapter) ;
- cfgReg[3] = 0x00000000 ;
- cfgReg[1] = 0x00000000 ;
+ WRITE_DWORD(&cfgReg[3], 0);
+ WRITE_DWORD(&cfgReg[1], 0);
  WRITE_DWORD(&cfgReg[0], (dword)(~0x03E00000)) ;
  DIVA_OS_MEM_DETACH_CFG(IoAdapter, cfgReg);
 }