Commit c6ce68e6 authored by Evan Quan's avatar Evan Quan Committed by Alex Deucher

drm/amd/pm: label these APIs used internally as static

Also drop unnecessary header file and declarations.
Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 5f400639
...@@ -24,7 +24,6 @@ ...@@ -24,7 +24,6 @@
#include <linux/list.h> #include <linux/list.h>
#include "amdgpu.h" #include "amdgpu.h"
#include "amdgpu_xgmi.h" #include "amdgpu_xgmi.h"
#include "amdgpu_smu.h"
#include "amdgpu_ras.h" #include "amdgpu_ras.h"
#include "soc15.h" #include "soc15.h"
#include "df/df_3_6_offset.h" #include "df/df_3_6_offset.h"
......
...@@ -29,7 +29,6 @@ ...@@ -29,7 +29,6 @@
#include "amdgpu.h" #include "amdgpu.h"
#include "amdgpu_gfx.h" #include "amdgpu_gfx.h"
#include "amdgpu_psp.h" #include "amdgpu_psp.h"
#include "amdgpu_smu.h"
#include "nv.h" #include "nv.h"
#include "nvd.h" #include "nvd.h"
......
...@@ -34,7 +34,6 @@ ...@@ -34,7 +34,6 @@
#include "amdgpu_vce.h" #include "amdgpu_vce.h"
#include "amdgpu_ucode.h" #include "amdgpu_ucode.h"
#include "amdgpu_psp.h" #include "amdgpu_psp.h"
#include "amdgpu_smu.h"
#include "atom.h" #include "atom.h"
#include "amd_pcie.h" #include "amd_pcie.h"
......
...@@ -76,7 +76,6 @@ ...@@ -76,7 +76,6 @@
#include "smuio_v13_0.h" #include "smuio_v13_0.h"
#include "dce_virtual.h" #include "dce_virtual.h"
#include "mxgpu_ai.h" #include "mxgpu_ai.h"
#include "amdgpu_smu.h"
#include "amdgpu_ras.h" #include "amdgpu_ras.h"
#include "amdgpu_xgmi.h" #include "amdgpu_xgmi.h"
#include <uapi/linux/kfd_ioctl.h> #include <uapi/linux/kfd_ioctl.h>
......
...@@ -27,7 +27,6 @@ ...@@ -27,7 +27,6 @@
#include "amdgpu_drv.h" #include "amdgpu_drv.h"
#include "amdgpu_pm.h" #include "amdgpu_pm.h"
#include "amdgpu_dpm.h" #include "amdgpu_dpm.h"
#include "amdgpu_smu.h"
#include "atom.h" #include "atom.h"
#include <linux/pci.h> #include <linux/pci.h>
#include <linux/hwmon.h> #include <linux/hwmon.h>
...@@ -927,14 +926,7 @@ static ssize_t amdgpu_set_pp_features(struct device *dev, ...@@ -927,14 +926,7 @@ static ssize_t amdgpu_set_pp_features(struct device *dev,
return ret; return ret;
} }
if (is_support_sw_smu(adev)) { if (adev->powerplay.pp_funcs->set_ppfeature_status) {
ret = smu_sys_set_pp_feature_mask(&adev->smu, featuremask);
if (ret) {
pm_runtime_mark_last_busy(ddev->dev);
pm_runtime_put_autosuspend(ddev->dev);
return -EINVAL;
}
} else if (adev->powerplay.pp_funcs->set_ppfeature_status) {
ret = amdgpu_dpm_set_ppfeature_status(adev, featuremask); ret = amdgpu_dpm_set_ppfeature_status(adev, featuremask);
if (ret) { if (ret) {
pm_runtime_mark_last_busy(ddev->dev); pm_runtime_mark_last_busy(ddev->dev);
......
...@@ -1246,50 +1246,22 @@ int smu_load_microcode(struct smu_context *smu); ...@@ -1246,50 +1246,22 @@ int smu_load_microcode(struct smu_context *smu);
int smu_check_fw_status(struct smu_context *smu); int smu_check_fw_status(struct smu_context *smu);
int smu_set_gfx_cgpg(struct smu_context *smu, bool enabled);
int smu_set_fan_speed_rpm(void *handle, uint32_t speed);
int smu_get_power_limit(struct smu_context *smu, int smu_get_power_limit(struct smu_context *smu,
uint32_t *limit, uint32_t *limit,
enum smu_ppt_limit_level limit_level); enum smu_ppt_limit_level limit_level);
int smu_set_power_limit(void *handle, uint32_t limit);
int smu_print_ppclk_levels(void *handle, enum pp_clock_type type, char *buf);
int smu_od_edit_dpm_table(void *handle,
enum PP_OD_DPM_TABLE_COMMAND type,
long *input, uint32_t size);
int smu_read_sensor(void *handle, int sensor, void *data, int *size);
int smu_get_power_profile_mode(void *handle, char *buf);
int smu_set_power_profile_mode(void *handle, long *param, uint32_t param_size);
u32 smu_get_fan_control_mode(void *handle);
int smu_set_fan_control_mode(struct smu_context *smu, int value);
void smu_pp_set_fan_control_mode(void *handle, u32 value);
int smu_get_fan_speed_percent(void *handle, u32 *speed);
int smu_set_fan_speed_percent(void *handle, u32 speed);
int smu_get_fan_speed_rpm(void *handle, uint32_t *speed);
int smu_set_xgmi_pstate(void *handle,
uint32_t pstate);
int smu_set_azalia_d3_pme(struct smu_context *smu); int smu_set_azalia_d3_pme(struct smu_context *smu);
bool smu_baco_is_support(struct smu_context *smu); bool smu_baco_is_support(struct smu_context *smu);
int smu_get_baco_capability(void *handle, bool *cap);
int smu_baco_get_state(struct smu_context *smu, enum smu_baco_state *state); int smu_baco_get_state(struct smu_context *smu, enum smu_baco_state *state);
int smu_baco_enter(struct smu_context *smu); int smu_baco_enter(struct smu_context *smu);
int smu_baco_exit(struct smu_context *smu); int smu_baco_exit(struct smu_context *smu);
int smu_baco_set_state(void *handle, int state);
bool smu_mode1_reset_is_support(struct smu_context *smu); bool smu_mode1_reset_is_support(struct smu_context *smu);
bool smu_mode2_reset_is_support(struct smu_context *smu); bool smu_mode2_reset_is_support(struct smu_context *smu);
int smu_mode1_reset(struct smu_context *smu); int smu_mode1_reset(struct smu_context *smu);
int smu_mode2_reset(void *handle);
extern const struct amd_ip_funcs smu_ip_funcs; extern const struct amd_ip_funcs smu_ip_funcs;
...@@ -1299,48 +1271,23 @@ extern const struct amdgpu_ip_block_version smu_v13_0_ip_block; ...@@ -1299,48 +1271,23 @@ extern const struct amdgpu_ip_block_version smu_v13_0_ip_block;
bool is_support_sw_smu(struct amdgpu_device *adev); bool is_support_sw_smu(struct amdgpu_device *adev);
bool is_support_cclk_dpm(struct amdgpu_device *adev); bool is_support_cclk_dpm(struct amdgpu_device *adev);
int smu_reset(struct smu_context *smu);
int smu_sys_get_pp_table(void *handle, char **table);
int smu_sys_set_pp_table(void *handle, const char *buf, size_t size);
int smu_get_power_num_states(void *handle, struct pp_states_info *state_info);
enum amd_pm_state_type smu_get_current_power_state(void *handle);
int smu_write_watermarks_table(struct smu_context *smu); int smu_write_watermarks_table(struct smu_context *smu);
/* smu to display interface */ /* smu to display interface */
extern int smu_dpm_set_power_gate(void *handle, uint32_t block_type, bool gate); extern int smu_dpm_set_power_gate(void *handle, uint32_t block_type, bool gate);
extern int smu_handle_task(struct smu_context *smu,
enum amd_dpm_forced_level level,
enum amd_pp_task task_id,
bool lock_needed);
extern int smu_handle_dpm_task(void *handle,
enum amd_pp_task task_id,
enum amd_pm_state_type *user_state);
int smu_switch_power_profile(void *handle,
enum PP_SMC_POWER_PROFILE type,
bool en);
int smu_get_dpm_freq_range(struct smu_context *smu, enum smu_clk_type clk_type, int smu_get_dpm_freq_range(struct smu_context *smu, enum smu_clk_type clk_type,
uint32_t *min, uint32_t *max); uint32_t *min, uint32_t *max);
u32 smu_get_mclk(void *handle, bool low);
u32 smu_get_sclk(void *handle, bool low);
int smu_set_soft_freq_range(struct smu_context *smu, enum smu_clk_type clk_type, int smu_set_soft_freq_range(struct smu_context *smu, enum smu_clk_type clk_type,
uint32_t min, uint32_t max); uint32_t min, uint32_t max);
enum amd_dpm_forced_level smu_get_performance_level(void *handle);
int smu_force_performance_level(void *handle, enum amd_dpm_forced_level level);
int smu_set_ac_dc(struct smu_context *smu); int smu_set_ac_dc(struct smu_context *smu);
int smu_sys_get_pp_feature_mask(void *handle, char *buf);
int smu_sys_set_pp_feature_mask(void *handle, uint64_t new_mask);
int smu_force_ppclk_levels(void *handle, enum pp_clock_type type, uint32_t mask);
int smu_set_mp1_state(void *handle,
enum pp_mp1_state mp1_state);
int smu_set_df_cstate(void *handle,
enum pp_df_cstate state);
int smu_allow_xgmi_power_down(struct smu_context *smu, bool en); int smu_allow_xgmi_power_down(struct smu_context *smu, bool en);
int smu_get_status_gfxoff(struct amdgpu_device *adev, uint32_t *value); int smu_get_status_gfxoff(struct amdgpu_device *adev, uint32_t *value);
ssize_t smu_sys_get_gpu_metrics(void *handle, void **table);
int smu_enable_mgpu_fan_boost(void *handle);
int smu_gfx_state_change_set(struct smu_context *smu, uint32_t state); int smu_gfx_state_change_set(struct smu_context *smu, uint32_t state);
int smu_set_light_sbr(struct smu_context *smu, bool enable); int smu_set_light_sbr(struct smu_context *smu, bool enable);
......
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