- 04 Mar, 2014 1 commit
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Sebastian Hesselbarth authored
With all the DT support preparation done, we are able to move Dove to MVEBU easily. Legacy non-DT mach-dove is left untouched to rot for a while before removal. Signed-off-by:
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by:
Jason Cooper <jason@lakedaemon.net>
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- 01 Mar, 2014 2 commits
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Jason Cooper authored
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Jason Cooper authored
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- 25 Feb, 2014 2 commits
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Andrew Lunn authored
Convert the kirkwood t5325-setup.c to mostly device tree for mach-mvebu. Part of the audio setup needs to remain in C for the moment until suitable bindings are designed and implemented. So add board code, triggered by the compatibility string. Signed-off-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
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Jason Cooper authored
To prevent problems later with mvebu_v5_defconfig builds, we restrict the scope of the changes this series makes. Selecting ARCH_KIRKWOOD and MACH_KIRKWOOD is necessary during the migration from mach-kirkwood to mach-mvebu. Until the last four legacy kirkwood board files have a DT equivalent, we need to support building DT from both mach-kirkwood and mach-mvebu. Reported-by:
Kevin Hilman <khilman@linaro.org> Acked-by:
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- 24 Feb, 2014 2 commits
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Andrew Lunn authored
The PCIe driver has been fully clock aware for quite a while. Remove the kexec code to enable the PCIe clock, since the PCIe driver will do the right thing. jac adds: [arnd]: fixes a build error when KEXEC is enabled and KIRKWOOD_LEGACY is not Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
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Jason Cooper authored
During this release cycle, we're adding the new Armada 375, 380, and 385 SoCs. We're also migrating DT kirkwood boards into mach-mvebu. The kirkwood changes make the different SoCs in mach-mvebu/ depend on MULTI_V7 or MULTI_V5 as appropriate. We add this dependency to the new SoCs so that when the branches are merged, everything is as it should be. Acked-by:
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- 22 Feb, 2014 25 commits
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Andrew Lunn authored
kirkwood is very nearly fully DT. Remove most of the address definitions from the header files and make it a local header file. Signed-off-by:
Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Signed-off-by:
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Andrew Lunn authored
Add the Kirkwood PCIe compatibility string to mvebu-soc-id, so that it can get the SoC ID and revision from the PCIe endpoints. Signed-off-by:
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Andrew Lunn authored
The mvebu system controller already supports restarting orion systems. Remove all the C code which will be replaced by the system controller. Signed-off-by:
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Andrew Lunn authored
Move the kirkwood DT support into mach-mvebu, and make them part of ARCH_MULTI_V5. Minimal changes have been made in order to make it boot. Cleanup of the header files and integration with mvebu will take place in following patches. In order to help Debian transition between mach-kirkwood and mach-mvebu, the DTS files are compiled for both, allowing Debian to continue using mach-kirkwood until all remaining boards are supported by mach-mvebu. Debian is then expected to simply swap from mach-kirkwood to mach-mvebu and mach-kirkwood will be removed. Signed-off-by:
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Andrew Lunn authored
Kirkwood, which uses the Feroceon L2 cache controller will soon be moving into mach-mvebu. Allow the cache controller to be built in this situation. Signed-off-by:
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Andrew Lunn authored
CPU_ARM926T should be selected if no other CPU is. Put the ! in the right place so this works. Signed-off-by:
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Andrew Lunn authored
Instantiate the L2 cache from DT. Indicate in DT where the cache control register is so that it is possible to enable/disable write through on the CPU. Signed-off-by:
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Andrew Lunn authored
With the gradual move to DT, kirkwood has become a lot less dependent on plat-orion. cache-feroceon-l2.h is the last dependency. Move it out so we can drop plat-orion when building DT only kirkwood boards. Signed-off-by:
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Andrew Lunn authored
Prepare mach-mvebu to house both ARCH_MULTI_V7 and ARCH_MULTI_V5 systems by adding ARCH_MULTI_V7 to the existing SOCs. Signed-off-by:
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Andrew Lunn authored
To allow removal of the global map of registers, make the pm code ioremap the registers it needs. Signed-off-by:
Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by:
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Andrew Lunn authored
With the move to mach-mvebu and MULTI_V5, the global iomap for all registers will be going away. So explicitly map the CPU configuration register before using it. Signed-off-by:
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Andrew Lunn authored
In order to be able to move DT support into mach-mvebu, the DT code needs to be cleanly separated from common and pcie code. Import the needed bits of these files into board-dt.c. The "common" code then becomes purely legacy, supporting non-DT boards, so reflect this in the Makefile targets. Signed-off-by:
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Andrew Lunn authored
This will be added back using the mach-mvebu equivalent once the move has been made. Signed-off-by:
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Andrew Lunn authored
The mv88f6281gtw_ge has a ethernet switch connected to the ethernet port of the SoC. Convert the platform device instantiation to a DT instantiation. Signed-off-by:
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Andrew Lunn authored
The pm code needs to be separated from common.h in order to split DT and non-DT systems apart. Move the declarations into a header file of its own and include it where needed. Signed-off-by:
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Ezequiel Garcia authored
The previous name "Marvell SOCs with Device Tree support" is a bit ambiguous and not too informative for users. Instead, use a more appropriate name. Signed-off-by:
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Thomas Petazzoni authored
This commit updates the documentation that describes the various families of SOCs produced by Marvell, together with the corresponding available technical documents. It adds Armada 375 and Armada 38x, and adds a link to the product brief for the already supported Armada 370. Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by:
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Thomas Petazzoni authored
This commit adds the basic support for the Armada 380 and Armada 385 SOCs. These SoCs share most of their IP with the Armada 370/XP SoCs. The main difference is the use of a Cortex A9 CPU instead of the PJ4B CPU. The Armada 380 is a single core Cortex-A9, while the Armada 385 is a dual-core Cortex-A9. The support is introduced in board-v7.c, together with Armada 370/XP, but a separate DT structure is added, because Armada 38x will need a different set of SMP operations when the SMP support is introduced. Signed-off-by:
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Thomas Petazzoni authored
Early versions of Armada 375 SoC have a bug where the BootROM leaves an external data abort pending. The kernel is hit by this data abort as soon as it enters userspace, because it unmasks the data aborts at this moment. We register a custom abort handler below to ignore the first data abort to work around this problem. Signed-off-by:
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Gregory CLEMENT authored
This commit adds the basic support for the Armada 375 SOCs. These SoCs share most of their IP with the Armada 370/XP SoCs. The main difference is the use of a Cortex A9 CPU instead of the PJ4B CPU. The interrupt controller and the L2 cache controller are also different they are respectively the GIC and the PL310. The support is introduced in board-v7.c, together with Armada 370/XP, but a separate DT structure is added, because Armada 375 will need a different set of SMP operations when the SMP support is introduced. Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by:
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Thomas Petazzoni authored
The system controller block in the Armada 375 has different register offsets for the system reset and other related functions. Therefore, this commit introduces the new "armada-375-system-controller" compatible string to identify the Armada 375 variant of the system controller. Signed-off-by:
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Thomas Petazzoni authored
Until now, the CPU_PJ4B Kconfig option was selected by MACH_ARMADA_MVEBU, i.e for all Armada MVEBU SOCs. In preparation to the introduction of Cortex-A9 based Armada MVEBU SOCs, this selection is moved down to the Armada 370 and Armada XP specific options. Signed-off-by:
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Thomas Petazzoni authored
Due to a mistake made when merging Armada 370 and Armada XP DT machine structures, the name of the structure was incorrectly chosen as being ARMADA_XP_DT, while the structure also covers Armada 370. Therefore, we rename the structure to ARMADA_370_XP_DT. Signed-off-by:
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Thomas Petazzoni authored
In preparation to the introduction of the support of Armada 375 and Armada 38x, this commit renames arch/arm/mach-mvebu/armada-370-xp.c to arch/arm/mach-mvebu/board-v7.c. The board-v7.c name as we expect this file to ultimately contain the DT_MACHINE_START definitions for all ARMv7 Marvell EBU platforms (370, 375, 38x, XP and Dove as of today). In relation to this file rename, this commit also: * Renames the hidden Kconfig symbol MACH_ARMADA_370_XP to MACH_MVEBU_V7. This hidden symbol is selected by the various per-SoC visible Kconfig options to trigger the build of board-v7.c. * Renames a certain number of functions in board-v7.c so that their armada_370_xp prefix is replaced by a mvebu prefix. The .dt_compat array keeps its armada_370_xp prefix because the new SOCs will be introduced with separate .dt_compat arrays, due to the need for different SMP operations. Signed-off-by:
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Jason Cooper authored
mvebu soc changes for v3.15 - mvebu - Makefile cleanup and remove map_io - use of_find_matching_node_and_match
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- 11 Feb, 2014 2 commits
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Thomas Petazzoni authored
The ->map_io() implementation of Armada 370/XP simply calls debug_ll_io_init(), which is exactly what the kernel does when ->map_io is NULL. Therefore, there is no need to have a specific ->map_io() implementation in Armada 370/XP. Signed-off-by:
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Josh Cartwright authored
Instead of the of_find_matching_node()/of_match_node() pair, which requires two iterations through the match table, make use of of_find_matching_node_and_match(), which only iterates through the table once. While we're here, mark the of_system_controller table const. Signed-off-by:
Josh Cartwright <joshc@codeaurora.org> Reviewed-by:
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- 05 Feb, 2014 1 commit
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Gregory CLEMENT authored
Some objects depend on CONFIG_ARCH_MVEBU whereas this whole Makefile depends on the same symbol. Moreover CONFIG_ARCH_MVEBU can't be selected as a module. So we can simplify this Makefile by moving all the object from obj-$(CONFIG_ARCH_MVEBU) to obj-y. Signed-off-by:
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- 03 Feb, 2014 4 commits
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Linus Torvalds authored
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git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linuxLinus Torvalds authored
Pull parisc updates from Helge Deller: "The three major changes in this patchset is a implementation for flexible userspace memory maps, cache-flushing fixes (again), and a long-discussed ABI change to make EWOULDBLOCK the same value as EAGAIN. parisc has been the only platform where we had EWOULDBLOCK != EAGAIN to keep HP-UX compatibility. Since we will probably never implement full HP-UX support, we prefer to drop this compatibility to make it easier for us with Linux userspace programs which mostly never checked for both values. We don't expect major fall-outs because of this change, and if we face some, we will simply rebuild the necessary applications in the debian archives" * 'parisc-3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: parisc: add flexible mmap memory layout support parisc: Make EWOULDBLOCK be equal to EAGAIN on parisc parisc: convert uapi/asm/stat.h to use native types only parisc: wire up sched_setattr and sched_getattr parisc: fix cache-flushing parisc/sti_console: prefer Linux fonts over built-in ROM fonts
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Mikulas Patocka authored
HPFS needs to load 4 consecutive 512-byte sectors when accessing the directory nodes or bitmaps. We can't switch to 2048-byte block size because files are allocated in the units of 512-byte sectors. Previously, the driver would allocate a 2048-byte area using kmalloc, copy the data from four buffers to this area and eventually copy them back if they were modified. In the current implementation of the buffer cache, buffers are allocated in the pagecache. That means that 4 consecutive 512-byte buffers are stored in consecutive areas in the kernel address space. So, we don't need to allocate extra memory and copy the content of the buffers there. This patch optimizes the code to avoid copying the buffers. It checks if the four buffers are stored in contiguous memory - if they are not, it falls back to allocating a 2048-byte area and copying data there. Signed-off-by:
Mikulas Patocka <mikulas@artax.karlin.mff.cuni.cz> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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Mikulas Patocka authored
Previously, hpfs scanned all bitmaps each time the user asked for free space using statfs. This patch changes it so that hpfs scans the bitmaps only once, remembes the free space and on next invocation of statfs it returns the value instantly. New versions of wine are hammering on the statfs syscall very heavily, making some games unplayable when they're stored on hpfs, with load times in minutes. This should be backported to the stable kernels because it fixes user-visible problem (excessive level load times in wine). Signed-off-by:
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- 02 Feb, 2014 1 commit
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Helge Deller authored
Add support for the flexible mmap memory layout (as described in http://lwn.net/Articles/91829). This is especially very interesting on parisc since we currently only support 32bit userspace (even with a 64bit Linux kernel). Signed-off-by:
Helge Deller <deller@gmx.de>
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