into ppc970.osdl.org:/home/torvalds/v2.6/linux

This set of changes came from a larger patch by Adrian Bunk.

Patch from Liam Girdwood

Adds some PXA register and bit definitions:-
  o SSP ports
  o I2S
  o AC97_SYSCLK (Mainstone)
  o I2C Alternate function and direction
  o ASSP and NSSP Clock enables

Signed-off-by: Liam Girdwood 

Patch from Liam Girdwood

This patch adds support the PXA250, 255, 26x and 27x SSP ports. It
provides a generic core for simple IO-based SSP applications and allows
easy port setup for DMA access.

Depends on register definitions in patch 2084/1

Signed-off-by: Liam Girdwood 

 follows non-static declaration build error

Patch from George G. Davis

Building kernels with recent gcc-4.0-20041024 snapshot results in
"static declaration of '__clz_tab' follows non-static declaration"
build error. Since the "extern const UQItype __clz_tab[]" definition
is not required, this patch removes it to fix the build.

Signed-off-by: George G. Davis 

 static declaration build error

Patch from George G. Davis

Building kernels with recent gcc-4.0-20041024 snapshot results in
"static declaration of 'meminfo' follows non-static declaration"
build error. Since the "extern struct meminfo meminfo" definition
is not required, this patch removes it to fix the build.

Signed-off-by: George G. Davis 

 endian

Patch from Lennert Buytenhek

When you issue the mnfd opcode to negate a double, nwfpe is supposed
to flip the most significant bit of your double, which is the sign
bit.  However, on big endian systems, it ended up flipping the most
significant bit of the least significant sub-u32, which is one of the
mantissa bits.

On my system this was manifesting itself as sed regression tests
failing, and ntpd/ntpdate consistently adjusting the system clock
into the wrong direction.

In pretty much all of NWFPE, doubles are stored in u64s and
manipulations on those doubles are done by using u64 bitops.  But
for negation and fabs() it was poking into one of the sub-u32s
directly instead of XORing the u64 with 0x8000000000000000 resp.
ANDing with 0x7fffffffffffffff.

Since on big-endian, 'native u64 order' means that the most
significant byte (containing bits 63-56) is kept at the lowest
byte address, the sign bit is the MSB of the first sub-u32,
instead of the MSB of the second one as is the case on little
endian.

Signed-off-by: Lennert Buytenhek 

 conditional on ARCH_H720X

Patch from G N Barzini

Currently under "System Type" you are always offered "h720x
Implementations" regardless of the system type selected. The fix for
this in the other Kconfig files seems to be enclose their contents
conditional in 'if ARCH_FOO'/'endif'. This patch does that.

Patch from Ben Dooks

This patch fixes the following problems:

- panic() in reset should be warning print, so that the
  system can then be soft-reset if this ever happens

- arch_idle() can now be over-ridden for purposes of
  implementing dyanmic voltage scaling (DVS) or any
  other form of idling

Signed-off-by: Ben Dooks 

Patch from Nicolas Pitre

Signed-off-by: Nicolas Pitre 

- Add iomd, keyboard and acornfb platform devices.
- Convert rpckbd to use centrally registered platform device.
- Convert acornfb to use a platform device.

m68k used to do this by hand, but it really ends up being needed
for any environment that does cross-builds, so just do it
unconditionally.

This should mean that you never need to cross-build sparse or
have any other hacks for checking a cross-built environment.

This way you can do a checking run on UP too - even if the
locks don't actually _matter_, they should still be right,
I'd hope.

In particular, a function that is called with a lock held, and
releases it only to re-acquire it needs to be annotated as such,
since otherwise sparse will complain about an unexpected unlock,
even though "globally" the lock is constant over the call.

This annotates the scheduler routines for locking, telling
what locks a function releases or acquires, allowing sparse
to check the lock usage (and documenting it at the same time).

and atomic_dec_and_lock.

This means that we now have all of the spinlock context counting
infrastructure in place, and you can check-compile the kernel with 
sparse -Wcontext.

We rename the actual architecture-specific low-level implementation
to have a prepended underscore: "_atomic_dec_and_lock()".

This extra macro indirection is so that we can make the macro do
the lock context counting. That will be the next patch.

into ppc970.osdl.org:/home/torvalds/v2.6/linux

- Add definition for SActive register
- Add most interrupt sources to default interrupt mask
- Write low 32 bits of FIS address to PxFB, where they belong
- Set command active bit in PxSACT before setting command issue bit in PxCI
- Announce Sub Class Code in driver info message [IDE, SATA or RAID]

and additionally, from me [jgarzik]:
- ignore ports-implemented bitmap for now; it's a write-only register
  that silly BIOSen initialize incorreclty
Signed-off-by: Matthijs Melchior <mmelchior@xs4all.nl>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>

into ppc970.osdl.org:/home/torvalds/v2.6/linux

That's "cpu", not "cpy".

 - Add the PARISC tag (Thibaut Varene)
 - Mark some existing PA-RISC specific entries with it (Thibaut Varene)
 - Document pdcchassis (Thibaut Varene)

 - Fix "sti= parameter ignored by stifb" bug (Stuart Brady)
 - Fix the STI crash with HCRX-24 in 32bpp mode (Helge Deller)

100% cosmetic:  rename various symbols with 'sata' in them to 'ata',
in preparation for addition of support for a PATA controller.
Signed-off-by: Tobias Lorenz <tobias.lorenz@gmx.net>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>

Description: Uses msleep() / ssleep() [as appropriate] instead of
schedule_timeout() to guarantee the task delays as expected.
Signed-off-by: Nishanth Aravamudan <nacc@us.ibm.com>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>

into ppc970.osdl.org:/home/torvalds/v2.6/linux

Fix __init section usage:
rhine_resume calls enable_mmio, so latter cannot be __devinit;
Error: ./drivers/net/via-rhine.o .text refers to 0000000000000925 R_X86_64_PC32
.init.text+0xfffffffffffffffc
Signed-off-by: Randy Dunlap <rddunlap@osdl.org>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>

This patch adds a few memory barriers, cleans up a little bit the
use of the "status" field in the rx & tx routines, and adds probing
for the external PHY to the driver.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>

This patch does an indentation fix to amd8111e_rx_poll() which was
incorrectly shifting left in the middle of a while() loop, thus
rendering the function difficult to read. There is no actual code
change.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>

My intel.com address will bounce.
Signed-off-by: Scott Feldman <sfeldma@pobox.com>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>

It looks like this bit got mismerged (pci.h removed but DMA arguments
convertion missing).
Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>

ARM udelay can't cope with >2ms delays.
Signed-off-by: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>