- 23 Apr, 2021 1 commit
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Andy Shevchenko authored
Since it has been converted to use device property API, the function and field descriptions become outdated. Correct them. Fixes: 73a47a9b ("mmc: core: Use device_property_read instead of of_property_read") Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20210419112459.25241-1-andriy.shevchenko@linux.intel.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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- 19 Apr, 2021 2 commits
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Ulf Hansson authored
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Neil Armstrong authored
Since commit e085b51c ("mmc: meson-gx: check for scatterlist size alignment in block mode"), support for SDIO SD_IO_RW_EXTENDED transferts are properly filtered but some driver like brcmfmac still gives a block sg buffer size not aligned with SDIO block, triggerring a WARN_ONCE() with scary stacktrace even if the transfer works fine but with possible degraded performances. Simply replace with dev_warn_once() to inform user this should be fixed to avoid degraded performance. This should be ultimately fixed in brcmfmac, but since it's only a performance issue the warning should be removed. Fixes: e085b51c ("mmc: meson-gx: check for scatterlist size alignment in block mode") Reported-by:
Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by:
Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20210416094347.2015896-1-narmstrong@baylibre.comSigned-off-by:
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- 16 Apr, 2021 1 commit
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Shawn Lin authored
.set_ios() is called from .resume() as well. For SDIO device which sets keep-power-in-suspend, nothing should be changed after resuming, as well as sample tuning value, since this value is tuned already. So we should not overwrite it with the default value. Signed-off-by:
Shawn Lin <shawn.lin@rock-chips.com> Link: https://lore.kernel.org/r/1618539454-182170-1-git-send-email-shawn.lin@rock-chips.comSigned-off-by:
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- 15 Apr, 2021 8 commits
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Krzysztof Kozlowski authored
The driver data (struct sdhci_s3c_drv_data) stored in of_device_id table is allocated as const and used only in const-way. Skip unnecessary const-away casts and convert all users to work with pointer to const. This is both more logical and safer. Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by:
Sylwester Nawrocki <snawrocki@kernel.org> Link: https://lore.kernel.org/r/20210415084412.51125-3-krzysztof.kozlowski@canonical.comSigned-off-by:
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Krzysztof Kozlowski authored
Correct the name of sdhci_s3c_drv_data structure in kerneldoc: drivers/mmc/host/sdhci-s3c.c:143: warning: expecting prototype for struct sdhci_s3c_driver_data. Prototype was for struct sdhci_s3c_drv_data instead Signed-off-by: -
Krzysztof Kozlowski authored
Use of_device_get_match_data() to make the code slightly smaller and to remove the of_device_id table forward declaration. Signed-off-by:
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Wolfram Sang authored
Currently, only SDHI on R-Car Gen2+ reinitializes the irq register during reset but it should be done on all instances. We can move it from the SDHI driver to the TMIO core, because we now have the 'sd_irq_mask_all' variable which carries the proper value to use. That also means we can remove the initialization from tmio_mmc_probe() because it calls tmio_mmc_reset(), too. We only move that tmio_mmc_reset() call there a little to ensure 'sd_irq_mask_all' is properly set. Signed-off-by:
Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by:
Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by:
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by:
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Ben Chuang authored
GL975x enters ASPM L1 state after a short idle in default. Enlarge the idle period to 7.9us for improving the R/W performance. Signed-off-by:
Ben Chuang <benchuanggli@gmail.com> Link: https://lore.kernel.org/r/20210415032637.5219-1-benchuanggli@gmail.comSigned-off-by:
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Bean Huo authored
Not all commands need to be retried in case of a timeout/failure. This is the case for the eMMC sanitize command, for example, which is issued through the ioctl interface. More precisely, in case of timeout, retrying could make the user wait for a very long time as each retry loop could last for a couple of minutes. Therefore, let's not use retries for the eMMC sanitize command. Signed-off-by:
Bean Huo <beanhuo@micron.com> Link: https://lore.kernel.org/r/20210414212236.346813-3-huobean@gmail.comSigned-off-by:
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Bean Huo authored
Add command retries parameter to __mmc_switch(), let caller pass retries according to the caller's condition. Signed-off-by:
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Jiapeng Chong authored
Fix the following clang warning: drivers/memstick/host/r592.c:363:6: warning: variable ‘len’ set but not used [-Wunused-but-set-variable]. Reported-by:
Abaci Robot <abaci@linux.alibaba.com> Signed-off-by:
Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Link: https://lore.kernel.org/r/1618366903-94346-1-git-send-email-jiapeng.chong@linux.alibaba.comSigned-off-by:
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- 12 Apr, 2021 9 commits
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Laibin Qiu authored
devm_ioremap_resource() has recorded error log, so it's unnecessary to record log again. Reported-by:
Hulk Robot <hulkci@huawei.com> Signed-off-by:
Laibin Qiu <qiulaibin@huawei.com> Reviewed-by:
Patrice Chotard <patrice.chotard@foss.st.com> Link: https://lore.kernel.org/r/20210409023801.3326572-1-qiulaibin@huawei.comSigned-off-by:
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Jia Yang authored
devm_ioremap_resource() has recorded error log, so it's unnecessary to record log again. Reported-by:
Jia Yang <jiayang5@huawei.com> Reviewed-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210409015424.3277212-1-jiayang5@huawei.comSigned-off-by:
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Laibin Qiu authored
devm_ioremap_resource() has recorded error log, so it's unnecessary to record log again. Reported-by:
Manivannan Sadhasivam <mani@kernel.org> Link: https://lore.kernel.org/r/20210409023349.3325907-1-qiulaibin@huawei.comSigned-off-by:
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Wolfram Sang authored
Now that we got the timeout handling in the driver correct, we can use this capability to avoid polling via the MMC core. Signed-off-by:
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Aniruddha Tvs Rao authored
CMD8 is not supported with Command Queue Enabled. Add required callback to clear CQE_EN and CQE_INTR fields in the host controller register before sending CMD8. Add corresponding callback in the CQHCI resume path to re-enable CQE_EN and CQE_INTR fields. Reported-by:
Kamal Mostafa <kamal@canonical.com> Tested-by:
Aniruddha Tvs Rao <anrao@nvidia.com> Signed-off-by:
Jon Hunter <jonathanh@nvidia.com> Acked-by:
Adrian Hunter <adrian.hunter@intel.com> Acked-by:
Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20210407094617.770495-1-jonathanh@nvidia.com Cc: stable@vger.kernel.org # v5.10+ Signed-off-by:
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Ben Chuang authored
For GL9763E, although there is the best performance at the maximum delay. Change the value to 20us in order to have better power consumption. This change may reduce the maximum performance by 10%. Signed-off-by:
Ben Chuang <ben.chuang@genesyslogic.com.tw> Link: https://lore.kernel.org/r/20210407093816.8863-1-benchuanggli@gmail.comSigned-off-by:
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Nicolas Saenz Julienne authored
Convert the brcm,iproc-sdhci binding to DT schema format using json-schema Signed-off-by:
Nicolas Saenz Julienne <nsaenz@kernel.org> Reviewed-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210406104802.20898-2-nsaenz@kernel.orgSigned-off-by:
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Yang Li authored
Fixes the following W=1 kernel build warning(s): drivers/mmc/host/moxart-mmc.c:257:7: warning: variable ‘dma_time’ set but not used drivers/mmc/host/moxart-mmc.c:395:7: warning: variable ‘pio_time’ set but not used Reported-by:
Yang Li <yang.lee@linux.alibaba.com> Link: https://lore.kernel.org/r/1617357231-93064-1-git-send-email-yang.lee@linux.alibaba.comSigned-off-by:
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Bean Huo authored
As the density increases, the 4-minute timeout value for sanitize is no longer feasible. At the same time, devices of different densities have different timeout values, which makes it difficult to use a common timeout value. Therefore, let's pass down the userland-specified sanitize timeout value so it can be used. Signed-off-by:
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- 31 Mar, 2021 2 commits
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Adrian Hunter authored
Bus power may control card power, but the full reset done by SDHCI at initialization still may not reset the power, whereas a direct write to SDHCI_POWER_CONTROL can. That might be needed to initialize correctly, if the card was left powered on previously. Signed-off-by:
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Hao Fang authored
s/Hisilicon/HiSilicon/g. It should use capital S, according to https://www.hisilicon.com/en/terms-of-use. Signed-off-by:
Hao Fang <fanghao11@huawei.com> Acked-by:
Zhangfei Gao <zhangfei.gao@linaro.org> Link: https://lore.kernel.org/r/1617086448-51054-1-git-send-email-fanghao11@huawei.comSigned-off-by:
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- 30 Mar, 2021 17 commits
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Shawn Guo authored
As indicated by function esdhc_change_pinstate(), SDR50 and DDR50 require pins_100mhz, while SDR104 and HS400 require pins_200mhz. Some system design may support SDR50 and DDR50 with 100mhz pin state only (without 200mhz one). Currently the combined 100/200 MHz pinctrl state check prevents such system from running SDR50 and DDR50. Separate the check to support such system design. Signed-off-by:
Shawn Guo <shawn.guo@linaro.org> Reviewed-by:
Haibo Chen <haibo.chen@nxp.com> Link: https://lore.kernel.org/r/20210326110214.28416-1-shawnguo@kernel.orgSigned-off-by:
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Al Cooper authored
Remove the CQHCI_QUIRK_SHORT_TXFR_DESC_SZ quirk because the latest chips have this fixed and earlier chips have other CQE problems that prevent the feature from being enabled. Signed-off-by:
Al Cooper <alcooperx@gmail.com> Acked-by:
Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20210325192834.42955-1-alcooperx@gmail.comSigned-off-by:
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Jisheng Zhang authored
As pointed out by Ulf, "both "mmc->parent" and mmc_dev(mmc) are being used in the entire c-file". Convert all the mmc->parent usage in all sdhci host driver to mmc_dev() for consistency. Suggested-by:
Jisheng Zhang <Jisheng.Zhang@synaptics.com> Link: https://lore.kernel.org/r/20210324155013.1e5faa3c@xhacker.debianSigned-off-by:
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Jisheng Zhang authored
The host supports HW busy detection of the device busy signaling over dat0 line. Set MMC_CAP_wAIT_WHILE_BUSY host capability. Signed-off-by:
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Wei Yongjun authored
Fix to return negative error code -ENOMEM from the error handling case instead of 0, as done elsewhere in this function. Fixes: c2c4da37837e ("mmc: sdhci-of-dwcmshc: add rockchip platform support") Reported-by:Wei Yongjun <weiyongjun1@huawei.com> Link: https://lore.kernel.org/r/20210323112956.1016884-1-weiyongjun1@huawei.comSigned-off-by:
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Liming Sun authored
This commit adds ACPI support in the sdhci-of-dwcmshc driver for BlueField-3 SoC. It has changes to only use the clock hierarchy for Deviec Tree since the clk is not supported by ACPI. Instead, ACPI can define 'clock-frequency' which is parsed by existing sdhci_get_property(). This clock value will be returned in function dwcmshc_get_max_clock(). Signed-off-by:
Liming Sun <limings@nvidia.com> Reviewed-by:
Khalil Blaiech <kblaiech@nvidia.com> Link: https://lore.kernel.org/r/1616453211-275165-1-git-send-email-limings@nvidia.comSigned-off-by:
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Adrian Hunter authored
Add PCI IDs for Intel LKF eMMC and SD card host controllers. Signed-off-by:
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Wolfram Sang authored
After reset, we manually flagged retune in runtime resume, but missed it in the workqueue. To fix that and avoid the problem in the future, let's flag retune in the reset handler directly whenever a card is present. Reported-by:
Takeshi Saito <takeshi.saito.xv@renesas.com> Signed-off-by:
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Takeshi Saito authored
Resetting the IP core will lose the bus width information and not all code paths recover it. So, make sure the latest bus width gets restored in the reset routine. For that, tmio_mmc_set_bus_width() is moved, but not modified. Signed-off-by:
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Bean Huo authored
Use preferred way '"%s...", __func__' to print function name. Signed-off-by:
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James Young authored
This variant is present on a Lenovo IdeaPad Slim 1, which uses an AMD Dali/Athlon Silver 3050e. The Windows AMD SD Host Controller driver also lists this as a valid device ID. Adding this device ID makes the internal eMMC storage on the Lenovo accessible. Consequently this makes Linux installable and usable on it as well. Signed-off-by:
James Young <james@pocketfluff.org> Link: https://lore.kernel.org/r/20210318124025.3002861-1-james@pocketfluff.orgSigned-off-by:
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Seiya Wang authored
This commit adds dt-binding documentation of mmc for Mediatek MT8195 SoC Platform. Signed-off-by:
Seiya Wang <seiya.wang@mediatek.com> Link: https://lore.kernel.org/r/20210319023427.16711-6-seiya.wang@mediatek.comSigned-off-by:
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Wolfram Sang authored
All recent SDHI instances can be reset via the reset controller. If one is found, use it instead of the open coded reset. This is to get a future-proof sane reset state. Reviewed-by:
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Wolfram Sang authored
renesas_sdhi_reset used to mainly reset the SCC but is now doing more and even more will be added. So, factor out SCC reset to have a clear distinction when we want to reset either SCC or SDHI+SCC. Reviewed-by:
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Wolfram Sang authored
We will soon allow resetting the whole IP core via a reset controller. For this case, DMA must be terminated before the actual reset. For the other cases, it is probably better, too. Reviewed-by:
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Shawn Lin authored
sdhci based synopsys MMC IP is also used on some rockchip platforms, so add a basic support here. Signed-off-by:
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Shawn Lin authored
This patch adds rockchip support in sdhci-of-dwcmhsc.yaml Signed-off-by:
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